Chapter 16: Single-Phase Voltage Source Inverters — Power Electronics

Where this sits

Part 4 · DC–AC Converters
Chapter 16 of 30 — the first of Part 4

You should already know

The half-bridge leg, dead time and shoot-through from Chapter 11, device switching from Chapter 5, and Fourier series of a periodic waveform.

By the end you can

Derive the harmonic spectrum of a square and quasi-square wave, choose a pulse width to eliminate a chosen harmonic, and work out which device conducts at every instant with an inductive load.

Time

≈ 55 min reading · ≈ 50 min problems

i What you'll learn

Why turning DC into AC is a fundamentally different problem from every converter in Part 3 — you must synthesise a shape, not an average.
The half-bridge inverter, its two output levels, and why it wastes half the supply.
The full-bridge (H-bridge), which doubles the output and unlocks a third level.
The Fourier series of a square wave, \( V_1 = \dfrac{4V_s}{\pi\sqrt2} \), and why its THD is 48.3% no matter what you do.
Quasi-square-wave control: how one pulse-width choice both regulates the output and annihilates a chosen harmonic.
Why an inverter feeding an inductive load needs feedback diodes, and how to work out which of the four devices is conducting at any instant.
Why square-wave inverters survive at all, given that Chapter 18's PWM is better in almost every way.

Section 16-1

A Different Kind of Problem

Part 3 was, in the end, about one number. Every converter in it produced a DC output, and the whole design problem was to get the average right and to make the ripple small enough to ignore.

An inverter cannot be described that way. Its output has an average of zero. What matters is the shape: the amplitude, the frequency, and how closely the waveform resembles a sine.

What changes when the output must be AC
Question	DC–DC converter (Part 3)	Inverter (Part 4)
What is controlled	Output average	Fundamental amplitude and frequency
What "ripple" means	Deviation from a constant	Everything that is not the fundamental — the harmonics
Quality measure	\(\Delta V_o / V_o\)	Total harmonic distortion
What the filter must do	Pass DC, block \(f_s\)	Pass \(f_1\), block everything above it — a much harder job
Current direction	One way (unless four-quadrant)	Reverses every half cycle, always
Device count	1 or 2 typical	2 minimum, 4 usual, 6 for three phase

◇Intuition · the light switch and the dimmer

You have a light switch — on or off, nothing between — and you are asked to make a lamp glow with a smoothly rising and falling brightness, like a sine wave.

The naive attempt: flick it on for half a second, off for half a second. Averaged over each half-second the brightness is roughly right, but nobody would call the result a sine wave. It is a square wave that happens to have the right frequency.

That is exactly the square-wave inverter of this chapter, and it is where every inverter design starts. The output alternates between \( +V_s \) and \( -V_s \) at the required frequency. Its fundamental component is correct. Everything else about it is wrong.

The two ways forward, and both are used:

Filter the harmonics away. They are at 3, 5, 7 times the fundamental, so a low-pass filter can attenuate them — but at 50 Hz fundamental the filter must pass 50 Hz and block 150 Hz, which is a demanding ratio and therefore a large, expensive filter.
Switch faster and cleverer. Chop each half cycle into many pulses whose widths vary sinusoidally. The harmonics then appear near the switching frequency, thousands of hertz up, where a tiny filter removes them. This is pulse-width modulation, and it is Chapter 18.

This chapter does the first properly, because the second cannot be understood without it. Every PWM result in Chapter 18 is measured against the square wave established here.

Section recap. An inverter's output averages zero, so the design target moves from a number to a shape. Quality is measured as harmonic distortion, the current reverses every half cycle by definition, and the two routes to a clean output are a big filter or faster switching.

Section 16-2

The Half-Bridge and the Full-Bridge

The simplest circuit that can produce AC from DC is one you have already met. It is the half-bridge leg of Chapter 11's Class C chopper, with the load connected to a mid-point instead of to a rail.

The half-bridge produces \( \pm V_s/2 \); the full bridge produces \( \pm V_s \) and, uniquely, a genuine zero. That third level is what makes pulse-width control possible.

🔑

Square-wave output, half-bridge and full-bridge

\[ \text{Half-bridge: } V_{o(rms)} = \frac{V_s}{2}, \quad V_{1(rms)} = \frac{2V_s}{\pi\sqrt2} = 0.45\,V_s \] \[ \text{Full-bridge: } V_{o(rms)} = V_s, \quad V_{1(rms)} = \frac{4V_s}{\pi\sqrt2} = 0.90\,V_s \]

The full bridge doubles both figures for twice the devices — and since the output power goes as \( V^2 \), it delivers four times the power from the same DC supply.

◈Why the third level is the real prize

The doubled voltage is the obvious advantage of the full bridge. The one that matters more is easy to miss: the full bridge can produce zero volts across the load, and the half-bridge cannot.

Count the switch combinations. Each leg's output is either \( +V_s \) or \( 0 \), and the load sees the difference between the two legs:

Leg A high, leg B low → \( +V_s \)
Leg A low, leg B high → \( -V_s \)
Both legs high → both load terminals at \( +V_s \) → \( 0 \) across the load
Both legs low → both terminals at 0 → \( 0 \) across the load

The half-bridge has only two combinations and therefore only two levels. Its output is at \( \pm V_s/2 \) always; it can never rest.

Why zero is worth so much:

It permits amplitude control without changing the DC link. Insert a zero interval into each half cycle and the fundamental falls. That is the quasi-square wave of Section 16-4, and it is the only way a square-wave inverter can regulate at all.
It permits harmonic elimination. Choose the width of that zero interval and you choose which harmonic vanishes.
It permits a freewheeling state. With both legs high, the load current circulates through the top devices without touching the DC link. Chapter 18's PWM uses this constantly.
It halves the switching-frequency ripple. A three-level waveform steps by \( V_s \) at a time rather than \( 2V_s \), so the current ripple in the load is halved for the same frequency.

The generalisation, which sets up the rest of Part 4: more levels means a waveform closer to a sine, so smaller filters and lower distortion. Three levels are better than two; Chapter 20's multilevel inverters take the idea to five, seven and beyond, and are the reason modern HVDC converters exist.

▲Common mistake

"A half-bridge just needs a supply mid-point, so split the DC link with two capacitors and you are done."

Wrong Treating the capacitor mid-point as a stiff, fixed \( V_s/2 \).

Right The load current flows through those capacitors, and it is the full load current at the fundamental frequency.

Trace the path. The load returns to the mid-point, so on positive half cycles the current comes out of the upper capacitor and on negative half cycles out of the lower one. Each capacitor therefore carries the full load current at 50 Hz, alternately charging and discharging.

What that costs. To hold the mid-point within, say, 2% of \( V_s/2 \) at 50 Hz, the capacitors must be very large — for a 3 kW inverter, thousands of microfarads, dominating the converter's size and cost. This is the half-bridge's real penalty, and it is why the topology is rare above a few hundred watts.

The second problem: mid-point drift. Any asymmetry between the half cycles — unequal device drops, unequal on-times — puts a DC component into the load and slowly charges one capacitor at the other's expense. Balancing resistors are needed, and they dissipate continuously.

Where the half-bridge is genuinely right: as one leg of a larger structure. A three-phase inverter is three half-bridge legs sharing a DC link (Chapter 17), and there the neutral is the motor's star point, not a capacitor mid-point — so the problem disappears entirely.

Section recap. The half-bridge gives \( \pm V_s/2 \) from two switches but forces the load current through the splitter capacitors. The full bridge gives \( \pm V_s \) from four — and, more importantly, a genuine zero level that makes amplitude control, harmonic elimination and freewheeling possible.

Section 16-3

The Harmonics You Cannot Avoid

A square wave is not a sine wave, and Fourier tells us exactly how far short it falls. The result is worth deriving once, because every subsequent improvement in Part 4 is measured against it.

Exploit the symmetry before integrating The square wave is an odd function with half-wave symmetry — the second half cycle is the negative of the first. Odd symmetry kills every cosine term; half-wave symmetry kills every even harmonic. So only odd sine terms survive, and we need one integral.
Integrate over the positive half cycle

Working

\[ b_n = \frac{2}{\pi}\int_0^{\pi} V_s\sin n\theta\,d\theta = \frac{2V_s}{n\pi}\bigl[-\cos n\theta\bigr]_0^{\pi} = \frac{2V_s}{n\pi}(1 - \cos n\pi) \]
Evaluate for odd and even \(n\) For odd \( n \), \( \cos n\pi = -1 \), so \( b_n = 4V_s/(n\pi) \). For even \( n \), \( \cos n\pi = +1 \), so \( b_n = 0 \), confirming the symmetry argument.

Result

\[ v_o(\theta) = \frac{4V_s}{\pi}\left(\sin\theta + \frac{1}{3}\sin3\theta + \frac{1}{5}\sin5\theta + \frac{1}{7}\sin7\theta + \cdots\right) \]
Read off the two facts that matter The fundamental peak is \( 4V_s/\pi = 1.273\,V_s \) — 27% larger than the DC supply, which surprises people. And each harmonic falls only as \( 1/n \), which is a very slow decay.

🔑

Square wave: fundamental and distortion

\[ V_{1(rms)} = \frac{4V_s}{\pi\sqrt2} = 0.900\,V_s, \qquad \text{THD} = \frac{\sqrt{V_{rms}^2 - V_1^2}}{V_1} = \sqrt{\frac{\pi^2}{8} - 1} = 48.3\% \]

That 48.3% is a property of the shape alone. It does not depend on the supply voltage, the frequency, the load or the devices — a square wave is a square wave.

▲Common mistake

"The harmonics fall off as \( 1/n \), so the high ones are negligible — just filter the third and fifth."

Wrong Assuming \( 1/n \) is a fast decay because it eventually reaches zero.

Right \( 1/n \) is a very slow decay. Removing the 3rd and 5th leaves 24% distortion — still five times a typical grid limit.

Do the arithmetic. Relative to the fundamental, the harmonic amplitudes are \( 1/3, 1/5, 1/7, 1/9, \ldots \) — that is 33%, 20%, 14%, 11%, 9%, 8%, 7%, and so on. Even the 21st harmonic is still nearly 5% of the fundamental.

Removing the first two leaves plenty behind:

\[ \text{THD after removing 3rd and 5th} = \sqrt{\tfrac{1}{49} + \tfrac{1}{81} + \tfrac{1}{121} + \cdots} \approx 24\% \]

Compare with what standards demand. IEEE 519 and EN 50160 limit voltage THD at the point of common coupling to about 5% or 8%. A square-wave inverter is six to ten times outside it, and no reasonable amount of harmonic elimination closes the gap.

Why the decay rate is the whole story. Waveforms with sharper transitions have slower-decaying spectra:

A step (discontinuous) gives \( 1/n \).
A triangle (continuous, kinked) gives \( 1/n^2 \).
A sine (smooth to all orders) gives nothing beyond the fundamental.

So the only real fix is to stop making sharp transitions at the fundamental frequency. That is exactly what PWM does — it keeps the sharp edges but moves them to the switching frequency, thousands of times higher, where a small filter can deal with them. Chapter 18.

Section recap. A square wave's spectrum is \( 4V_s/n\pi \) for odd \( n \) only: fundamental 27% above the supply, harmonics decaying as \( 1/n \), and a THD of 48.3% fixed by the shape. Removing the 3rd and 5th still leaves 24%.

Section 16-4

Quasi-Square Wave: One Choice, Two Jobs

The full bridge's zero state now earns its keep. Instead of switching straight from \( +V_s \) to \( -V_s \), hold the output at zero for an interval at each end of the half cycle.

Let the output be \( +V_s \) from \( \alpha \) to \( \pi - \alpha \), zero on either side, and \( -V_s \) from \( \pi + \alpha \) to \( 2\pi - \alpha \). The conduction angle is then \( \delta = \pi - 2\alpha \).

Redo the Fourier integral with the new limits

Working

\[ b_n = \frac{2}{\pi}\int_{\alpha}^{\pi-\alpha} V_s\sin n\theta\,d\theta = \frac{2V_s}{n\pi}\bigl[\cos n\alpha - \cos n(\pi-\alpha)\bigr] \]
Simplify for odd \(n\) For odd \( n \), \( \cos n(\pi - \alpha) = -\cos n\alpha \), so the bracket becomes \( 2\cos n\alpha \):

Result

\[ b_n = \frac{4V_s}{n\pi}\cos n\alpha \]

At \( \alpha = 0 \) this collapses to the square wave, as it must.
Read what \(\alpha\) now controls The fundamental is \( (4V_s/\pi)\cos\alpha \), so raising \( \alpha \) reduces the output — amplitude control without touching the DC link.
Notice the second, free consequence \( b_n = 0 \) whenever \( \cos n\alpha = 0 \), that is when \( n\alpha = 90^\circ \). So choosing \( \alpha = 90^\circ/n \) annihilates the \(n\)th harmonic completely.

The classic case

\[ \alpha = 30^\circ \;\Longrightarrow\; \cos 3\alpha = \cos 90^\circ = 0 \;\Longrightarrow\; \text{no third harmonic} \]

🔑

Quasi-square wave

\[ V_{n(rms)} = \frac{4V_s}{n\pi\sqrt2}\cos n\alpha, \qquad V_{o(rms)} = V_s\sqrt{\frac{\pi - 2\alpha}{\pi}} = V_s\sqrt{\frac{\delta}{\pi}} \]

\( \alpha = 90^\circ/n \) removes the \( n \)th harmonic. \( \alpha = 30^\circ \) removes the third — and, because a 120° conduction angle also improves the shape, it lowers the total distortion from 48.3% to 31.1% at the same time.

Interactive · pulse width, spectrum and distortion

A full-bridge inverter with a zero interval of half-width \( \alpha \) at each end of the half cycle. Watch the waveform and its harmonic spectrum together — and find the angles at which a harmonic disappears entirely.

Zero half-width α 0°

Fundamental V₁0.900 V_s

Total RMS1.000 V_s

THD48.3%

Harmonic nullednone

—

✦Think about it

One angle nulls one harmonic. An inverter feeding a three-phase motor wants the 5th and 7th gone together. Can it be done?

Yes — and the method has a name

Add more switching angles. Instead of one notch per quarter cycle, cut \( k \) notches at angles \( \alpha_1, \alpha_2, \ldots, \alpha_k \). The Fourier coefficient becomes

\[ b_n = \frac{4V_s}{n\pi}\left(1 + 2\sum_{i=1}^{k}(-1)^i\cos n\alpha_i\right) \]

That is \( k \) free variables, so you can impose \( k \) conditions. With three angles you can null two harmonics and set the fundamental to a chosen value — which is exactly what a motor drive needs.

This is selective harmonic elimination (SHE), and it is genuinely used, particularly in high-power drives where the switching frequency must stay low.

Two practical points:

The equations are transcendental. There is no closed-form solution for the angles; they are found numerically offline and stored in a lookup table indexed by modulation depth. That is fine — the controller interpolates at run time.
Why not eliminate the third as well? In a three-phase system with no neutral connection, triplen harmonics cancel by themselves. The 3rd, 9th and 15th are in phase in all three legs, so they appear across each phase but not between lines. Spending an angle on the third would be wasted, which is why SHE schemes target 5, 7, 11, 13.

Where SHE wins over PWM. A 5 MW drive might switch at 500 Hz because switching loss at that power is enormous. Ordinary PWM at 500 Hz produces dreadful harmonics. SHE at 500 Hz places the few available switchings exactly where they do the most good — the optimal use of a very restricted switching budget. Chapter 20 returns to this.

Section recap. Holding the output at zero for \( \alpha \) at each end of the half cycle gives \( b_n = (4V_s/n\pi)\cos n\alpha \). One angle does two jobs: it scales the fundamental by \( \cos\alpha \) and nulls the \( n \)th harmonic when \( \alpha = 90^\circ/n \). More angles null more harmonics — selective harmonic elimination.

Section 16-5

Which Device Is Actually Conducting

Everything above concerned the output voltage, which the switching pattern sets directly. The current is set by the load, and with an inductive load it lags — which means that for part of every half cycle, the voltage and current have opposite signs.

During those intervals the load is returning energy to the DC link, and the transistors cannot carry it. Something else must.

◇Intuition · the swing that will not stop when you do

Push a child on a swing and then stop pushing at the moment they reach the top. They do not stop — they swing back, and if you are still holding on, they push you.

An inductive load does the same. The inverter reverses the voltage at the end of a half cycle, but the load current cannot reverse instantly. For a while the current still flows in the old direction while the voltage has already reversed — so the load is sourcing power back into the inverter.

Trace one full cycle of a lagging load, and four intervals appear:

Voltage +, current still negative. The current flows backwards through the pair of devices that are supposed to be on. Transistors cannot do this — the feedback diodes \( D_1 \) and \( D_4 \) carry it, and the energy goes back into the DC link.
Voltage +, current positive. Normal motoring. Transistors \( T_1 \) and \( T_4 \) conduct; power flows out of the link.
Voltage −, current still positive. The mirror of interval 1. Diodes \( D_2 \) and \( D_3 \) return energy.
Voltage −, current negative. Normal again, with \( T_2 \) and \( T_3 \).

The proportion of the cycle spent in the diode intervals is the load's power factor angle. A purely resistive load never uses the diodes at all. A purely inductive load uses them for exactly half the time — which means half the apparent power is being handed back and forth doing no work at all.

Device conduction over one cycle, lagging load, full bridge
Interval	Output voltage	Load current	Conducting	Power flow
\(0\) to \(\varphi\)	\(+V_s\)	Negative	\(D_1, D_4\)	Load → DC link
\(\varphi\) to \(\pi\)	\(+V_s\)	Positive	\(T_1, T_4\)	DC link → load
\(\pi\) to \(\pi+\varphi\)	\(-V_s\)	Positive	\(D_2, D_3\)	Load → DC link
\(\pi+\varphi\) to \(2\pi\)	\(-V_s\)	Negative	\(T_2, T_3\)	DC link → load

▲Common mistake

"The feedback diodes only handle brief transients, so they can be small."

Wrong Fitting a small signal-grade diode, or relying on a MOSFET's slow intrinsic body diode.

Right They conduct for a fraction \( \varphi/\pi \) of every cycle — at a 0.8 power factor that is 20% of the time, continuously, forever.

What they must be rated for:

The same peak current as the transistors, because they carry the same load current.
The same blocking voltage, since they sit across the devices.
Continuous duty at \( \varphi/\pi \) of the cycle — a genuine thermal design problem, not a transient.
Fast reverse recovery. When the opposite transistor turns on, the conducting diode must stop. Its recovery charge \( Q_{rr} \) flows straight through that transistor as a current spike on top of the load current.

Why reverse recovery is the harder requirement. The spike adds to the turn-on loss of the incoming device and can exceed its safe operating area. In a hard-switched inverter, diode recovery is frequently the dominant switching loss — larger than the transistor's own.

What is used in practice:

IGBT modules ship with matched fast-recovery diodes co-packaged. Never substitute an ordinary rectifier.
Silicon MOSFET body diodes are slow and have large \( Q_{rr} \). Above a few hundred watts, either add a parallel Schottky or choose a device with a fast body diode.
SiC MOSFETs have essentially no reverse recovery, which is a large part of why they permit much higher switching frequencies.

And a name worth knowing: because they carry current in the opposite direction to the transistor beside them, these are called antiparallel, feedback or freewheeling diodes interchangeably. All three terms mean the same component.

▣In practice · what dead time does to the output

Chapter 11 introduced dead time: a gap of a few hundred nanoseconds to a few microseconds in which both devices of a leg are off, so they cannot shoot through. In a chopper it was harmless. In an inverter it distorts the output, and the mechanism is worth understanding because it explains a whole class of drive problems.

During the dead time, the leg's output voltage is not commanded — it is decided by the load current's direction.

If the current is flowing out of the leg, it freewheels through the lower diode, so the output sits at 0 V.
If it is flowing into the leg, it freewheels through the upper diode, so the output sits at \( +V_s \).

So the error is always in the direction that opposes the current — the leg loses volt-seconds when sourcing and gains them when sinking. Averaged over a fundamental cycle this is a voltage error in antiphase with the current, and it behaves like an added series resistance that produces no heat.

What it looks like in a motor drive:

Loss of output voltage, roughly \( V_s \cdot t_{dead}/T_s \) — at 4 μs of dead time and 10 kHz switching, that is a 4% loss.
Low-order harmonics, mainly 5th and 7th, because the error is a square wave in phase with the current sign. These are precisely the harmonics PWM was supposed to eliminate.
Torque ripple and rough running at low speed, where the commanded voltage is small and the fixed error is a large fraction of it. Severe cases produce visible "cogging" near zero speed.
Current clamping near zero crossings, where the current sign is ambiguous and the compensation cannot decide.

The remedies, and all three are used: add a compensating voltage of the opposite sign based on the measured current direction; use the shortest dead time the devices genuinely allow (which is why fast-switching SiC helps twice over); or measure the actual leg output and close a loop on it.

Dead-time compensation is a standard feature of every serious motor-drive controller, and it is one of the few places where a nanosecond-scale hardware detail reaches all the way up into visible machine behaviour.

Section recap. With a lagging load the current and voltage disagree in sign for \( \varphi \) radians of each half cycle, and the feedback diodes carry that current back into the DC link. They need the same ratings as the transistors plus fast recovery. Dead time, harmless in a chopper, produces 5th and 7th harmonics and low-speed torque ripple here.

Section 16-6

Why Square-Wave Inverters Still Exist

Chapter 18's PWM is better on distortion, better on filter size and better on control. It would be reasonable to conclude that square-wave inversion is a historical curiosity. It is not, and the reasons are worth stating because they recur throughout Parts 4 to 7.

Square wave against PWM
Criterion	Square / quasi-square	PWM (Ch. 18)
Switchings per cycle	2	2 × (carrier ratio), often 100–400
Switching loss	Negligible	Often the dominant loss
DC link utilisation	\(4V_s/\pi = 1.27V_s\) peak	\(V_s\) peak (linear region)
THD before filtering	48.3%	Low-order harmonics near zero
Harmonic frequencies	3rd, 5th, 7th — near the fundamental	Near \(f_c\), easy to filter
Output filter size	Large	Small
Amplitude control	Via \(\alpha\), limited range	Continuous and fast
Control complexity	Trivial	Requires a modulator

◈Why the two winning rows decide real designs

Read the table again and notice that square-wave operation wins only two rows — switching loss and DC link utilisation. Both are decisive in the places where it survives.

1. Switching loss, at very high power. Switching energy is roughly \( \tfrac12 VI(t_r + t_f) \) per event. At 3 kV and 2 kA with a 2 μs transition, that is about 6 J per switching. At 50 Hz square wave — 100 switchings per second — the loss is 600 W, which is manageable. At 5 kHz PWM it would be 30 kW per device, which is not a converter but a heater.

This is why HVDC valves and the largest traction converters do not use conventional PWM. They use square wave with many series levels, or SHE with a handful of angles. Chapter 20's multilevel inverters exist precisely to get a good waveform without switching often.

2. DC link utilisation, in battery equipment. A square wave's fundamental peak is \( 4V_s/\pi = 1.27\,V_s \). Sinusoidal PWM in its linear region reaches only \( V_s/2 \) per leg, or \( V_s \) peak line-to-line for a full bridge — 27% less from the same battery.

For a small off-grid inverter powering a fan and some lights, that 27% is the difference between one battery and two. The load does not care much about waveform quality, and the cost saving is real. This is why "modified sine wave" inverters — which are exactly the quasi-square wave of Section 16-4, usually at \( \alpha = 30^\circ \) — are still sold by the million.

And the warning that belongs with it. "Modified sine wave" is marketing for "quasi-square wave", and it is unsuitable for: transformer-input equipment (the harmonics cause extra core loss and audible buzz), motors (the 5th harmonic produces a negative-sequence field and heating), and anything with a capacitor-input rectifier (peak charging behaves quite differently). Laser printers, some medical devices and many power tools are explicitly incompatible.

Section recap. Square-wave operation loses on every quality measure and wins on two — switching loss and DC link utilisation. That keeps it alive at the very top of the power range, where switching cannot be afforded, and at the very bottom, where the 27% extra output is worth more than the waveform.

Section 16-7

Worked Examples

1 Square-wave inverter feeding an RL load

Problem. A single-phase full-bridge inverter with \( V_s = 200 \) V feeds \( R = 10\ \Omega \), \( L = 25 \) mH at 50 Hz. Find the fundamental output voltage, the fundamental current, the third and fifth harmonic currents, and the total RMS current.

Voltage harmonics

\[ V_{n(rms)} = \frac{4V_s}{n\pi\sqrt2} \;\Longrightarrow\; V_1 = 180.0\ \text{V}, \quad V_3 = 60.0\ \text{V}, \quad V_5 = 36.0\ \text{V} \]

Impedance at each harmonic

\[ Z_n = \sqrt{R^2 + (n\omega L)^2}, \qquad \omega L = 2\pi(50)(0.025) = 7.854\ \Omega \]

\[ Z_1 = \sqrt{100 + 61.7} = 12.72\ \Omega, \quad Z_3 = \sqrt{100 + 555} = 25.6\ \Omega, \quad Z_5 = \sqrt{100 + 1542} = 40.5\ \Omega \]

Harmonic currents

\[ I_1 = \frac{180}{12.72} = 14.15\ \text{A}, \quad I_3 = \frac{60}{25.6} = 2.34\ \text{A}, \quad I_5 = \frac{36}{40.5} = 0.89\ \text{A} \]

Total RMS current, including harmonics up to the 13th:

Working

\[ I_{rms} = \sqrt{14.15^2 + 2.34^2 + 0.89^2 + 0.45^2 + 0.27^2 + 0.18^2 + 0.13^2} = 14.37\ \text{A} \]

Read the result carefully. The voltage THD is 48.3%, but the current THD is only \( \sqrt{14.37^2 - 14.15^2}/14.15 = 17.7\% \).

Why the current is so much cleaner. The inductive load's impedance rises with frequency, so it attenuates each harmonic by roughly \( n \) — and the harmonic voltages were already falling as \( 1/n \). The two effects compound, so harmonic currents fall roughly as \( 1/n^2 \). An inductive load is itself a low-pass filter, and in a motor drive it does most of the filtering for free. This is why motors tolerate inverter output that no measuring instrument would.

2 Choosing a pulse width for two purposes at once

Problem. The inverter of Example 1 must deliver a fundamental of 150 V RMS and eliminate the third harmonic. Can both be done? If not, what would you change?

Take each requirement in turn.

Eliminating the third harmonic

\[ \cos3\alpha = 0 \;\Longrightarrow\; \alpha = 30^\circ \]

The fundamental this forces

\[ V_1 = 0.900\,V_s\cos30^\circ = 0.900(200)(0.866) = 155.9\ \text{V} \]

The angle 150 V would require

\[ \cos\alpha = \frac{150}{180} = 0.833 \;\Longrightarrow\; \alpha = 33.6^\circ \]

So no — one angle cannot serve two masters. \( \alpha = 30^\circ \) gives 155.9 V with no third harmonic; \( \alpha = 33.6^\circ \) gives exactly 150 V but leaves \( \cos(3 \times 33.6^\circ) = -0.174 \), so 17% of the third harmonic returns.

Three ways out, in ascending order of cost:

Accept 155.9 V. A 4% overshoot is often within tolerance, and the clean spectrum is worth more.
Lower the DC link to 192.5 V. Then \( \alpha = 30^\circ \) gives exactly 150 V with no third harmonic. Both requirements met — but only if the DC link is adjustable, which means an extra converter stage.
Use three switching angles. Selective harmonic elimination with \( \alpha_1, \alpha_2, \alpha_3 \) can set the fundamental to 150 V and null two harmonics. More switchings, more loss, and a lookup table — but complete control.

The general lesson. With \( k \) switching angles you have \( k \) degrees of freedom and can impose \( k \) conditions. Counting them before you start saves a great deal of algebra.

3 Rating the devices and the diodes

Problem. A 5 kW single-phase inverter runs from a 400 V link into a load at 0.8 power factor lagging. Find the RMS and peak load current, the fraction of each cycle the diodes conduct, and the ratings for the transistors and diodes.

Load current

\[ V_1 = 0.900(400) = 360\ \text{V (rms)}, \qquad S = \frac{P}{\text{pf}} = \frac{5000}{0.8} = 6250\ \text{VA} \]

\[ I_{rms} = \frac{6250}{360} = 17.4\ \text{A}, \qquad I_{pk} = \sqrt2(17.4) = 24.6\ \text{A} \]

Diode conduction fraction

\[ \varphi = \cos^{-1}(0.8) = 36.9^\circ \;\Longrightarrow\; \frac{\varphi}{180^\circ} = 20.5\% \text{ of every cycle} \]

Ratings.

Blocking voltage: the full link, 400 V, plus overshoot from stray inductance at turn-off. Allow 50% and specify 600 V devices.
Transistor current: 24.6 A peak, conducting for 79.5% of the cycle. An RMS rating of about 15.5 A per device; specify 30 A parts for thermal margin.
Diode current: the same 24.6 A peak, conducting 20.5% of the cycle — an RMS of about 7.9 A. Do not under-rate them: they carry a fifth of the total conduction duty continuously.

Now vary the power factor and watch the split move. At unity power factor the diodes never conduct at all. At 0.5 lagging, \( \varphi = 60^\circ \) so they conduct a third of the time. A drive that must run a lightly loaded motor — where the power factor collapses towards zero — puts nearly half the conduction duty on the diodes, and that is precisely the condition many drives spend most of their life in. Rating the diodes from the full-load power factor is a common and expensive error.

4 How big must the output filter be?

Problem. A 50 Hz square-wave inverter must meet 5% voltage THD at its terminals. Design an \( LC \) filter, and comment on the result.

The third harmonic dominates at 33% of the fundamental, so it must be attenuated to about 4% — a factor of roughly 8 at 150 Hz, while 50 Hz passes essentially unchanged.

Second-order filter response

\[ \left|\frac{V_o}{V_i}\right| = \frac{1}{|1 - (f/f_0)^2|} \;\Longrightarrow\; 8 = \frac{1}{(150/f_0)^2 - 1} \;\Longrightarrow\; f_0 = 141\ \text{Hz} \]

Check the fundamental is not amplified

\[ \text{At } 50\ \text{Hz}: \quad \frac{1}{|1 - (50/141)^2|} = 1.14 \quad\text{— a 14\% rise, acceptable but not negligible} \]

Component values for a 10 Ω load

\[ f_0 = \frac{1}{2\pi\sqrt{LC}} = 141\ \text{Hz} \;\text{with}\; L = 20\ \text{mH} \;\Longrightarrow\; C = 64\ \mu\text{F} \]

Now look at what that means physically. A 20 mH inductor carrying 15 A is a substantial iron-cored component — several kilograms, and comparable in size to the rest of the inverter. The 64 μF capacitor must withstand the full AC output voltage continuously.

And two problems the arithmetic hides:

The cutoff is uncomfortably close to the fundamental. At \( f_0/f_1 = 2.8 \) there is very little margin. Component tolerance or a frequency change could push the resonance towards 50 Hz, where the filter would amplify rather than attenuate.
The resonance needs damping. At \( f_0 = 141 \) Hz, an undamped \( LC \) filter has a sharp peak — and a load transient will ring at that frequency for many cycles.

Compare with PWM. At a 10 kHz carrier the lowest significant harmonic is near 10 kHz, so \( f_0 \) can be 1 kHz — a ratio of 20 to the fundamental, with enormous margin. The inductor becomes about 0.2 mH: a hundred times smaller, a small ferrite part instead of an iron lump.

This single comparison is the strongest argument for PWM, and it is worth carrying into Chapter 18: the filter shrinks roughly as the square of the frequency ratio you push the harmonics to.

Section 16-8

Summary & Formula Sheet

Chapter 16 in five sentences:

An inverter's output averages zero, so the design target is a shape — measured by harmonic distortion rather than ripple.
The full bridge gives twice the half-bridge's output and, more importantly, a third level at zero.
A square wave has a fundamental of \( 4V_s/\pi \) peak, harmonics falling only as \( 1/n \), and a THD of 48.3% fixed by its shape.
A quasi-square wave's angle \( \alpha \) both scales the fundamental by \( \cos\alpha \) and nulls the \( n \)th harmonic at \( \alpha = 90^\circ/n \).
With a lagging load the feedback diodes conduct for \( \varphi/\pi \) of every cycle and need full ratings plus fast recovery.

Formula sheet · Chapter 16

Square wave, harmonic \(n\)odd \(n\) only; peak value

\( V_{n(pk)} = \dfrac{4V_s}{n\pi} \)

Fundamental, full bridgeRMS; note it exceeds \(V_s\)

\( V_1 = \dfrac{4V_s}{\pi\sqrt2} = 0.900\,V_s \)

Fundamental, half bridgeexactly half the full bridge

\( V_1 = \dfrac{2V_s}{\pi\sqrt2} = 0.450\,V_s \)

Square-wave THDa property of the shape alone

\( \text{THD} = \sqrt{\dfrac{\pi^2}{8} - 1} = 48.3\% \)

Quasi-square, harmonic \(n\)\(\alpha\) = zero half-width

\( V_{n(pk)} = \dfrac{4V_s}{n\pi}\cos n\alpha \)

Quasi-square RMS\(\delta = \pi - 2\alpha\) is the conduction angle

\( V_{o(rms)} = V_s\sqrt{\dfrac{\delta}{\pi}} \)

Harmonic elimination angle\(\alpha = 30^\circ\) removes the 3rd

\( \alpha = \dfrac{90^\circ}{n} \)

Harmonic current, RL loadfalls roughly as \(1/n^2\)

\( I_n = \dfrac{V_n}{\sqrt{R^2 + (n\omega L)^2}} \)

Total harmonic distortionvoltage or current

\( \text{THD} = \dfrac{\sqrt{X_{rms}^2 - X_1^2}}{X_1} \)

Diode conduction fraction\(\varphi\) = load phase angle

\( \dfrac{t_{diode}}{T/2} = \dfrac{\varphi}{\pi} \)

Dead-time voltage errorproduces 5th and 7th harmonics

\( \Delta V \approx V_s\dfrac{t_{dead}}{T_s} \)

SHE Fourier coefficient\(k\) angles null \(k-1\) harmonics

\( b_n = \dfrac{4V_s}{n\pi}\Bigl(1 + 2\sum_{i=1}^{k}(-1)^i\cos n\alpha_i\Bigr) \)

Key terms

Inverter: A converter producing AC of controllable amplitude and frequency from a DC source.
Voltage source inverter (VSI): An inverter fed from a stiff DC voltage — a capacitor-supported link. The output voltage is imposed; the current follows the load.
Half-bridge / full-bridge: Two switches producing \(\pm V_s/2\), or four producing \(\pm V_s\) and zero.
Quasi-square wave: A three-level output with a zero interval of half-width \(\alpha\) at each end of the half cycle. Also sold as "modified sine wave".
Total harmonic distortion (THD): The RMS of everything that is not the fundamental, divided by the fundamental.
Triplen harmonics: The 3rd, 9th, 15th and so on. In phase in all three legs of a three-phase system, so they cancel between lines.
Selective harmonic elimination (SHE): Choosing several switching angles to null several chosen harmonics while setting the fundamental. Solved offline and tabulated.
Feedback (antiparallel) diode: The diode across each switch that returns reactive load current to the DC link. Needs full ratings and fast recovery.
Dead time: The interval when both devices of a leg are off. Prevents shoot-through; distorts the inverter output.
DC link utilisation: How much fundamental output a modulation scheme extracts from a given DC voltage. Square wave is the best at \(1.27V_s\) peak.

Check yourself

Test Yourself

Chapter 16 · six questions answers hidden until you ask

A square-wave inverter's fundamental is 1.27 times the DC supply. Where does the extra voltage come from — is this not free energy?

No. The fundamental component exceeds the supply, but the waveform never does. There is no violation because the two are different quantities.

What Fourier is actually saying. The square wave equals a sum of sinusoids:

\[ v_o = \frac{4V_s}{\pi}\left(\sin\theta + \frac{1}{3}\sin3\theta + \frac{1}{5}\sin5\theta + \cdots\right) \]

The first term has a peak of \( 1.273V_s \) — but the higher terms, at \( \theta = 90^\circ \), are negative and subtract from it. The sum is exactly \( V_s \), as it must be. Evaluate: \( 1.273(1 - 1/3 + 1/5 - 1/7 + \cdots) = 1.273 \times \pi/4 = 1.000 \). ✓

Check the energy too. The total RMS is \( V_s \), so the total power into a resistor is \( V_s^2/R \). The fundamental alone would give \( (0.9V_s)^2/R = 0.81V_s^2/R \), so the harmonics carry the remaining 19%. Nothing has been created.

Why the 27% is nevertheless a genuine engineering advantage. If the load responds only to the fundamental — a motor, a transformer, a filtered supply — then that is the component that does the work. From a fixed battery, square-wave operation delivers 27% more useful fundamental than sinusoidal PWM can in its linear region.

And this is why over-modulation exists. A PWM drive that needs more output than the linear region allows is deliberately pushed towards square wave, gaining amplitude at the cost of low-order harmonics. Every field-weakening motor drive does this at high speed. Chapter 18 treats it properly.

Why can a half-bridge inverter not produce zero volts across its load, when a full bridge can?

Because one leg has only two states, and the load is referenced to a fixed point.

The half-bridge. The load sits between the leg's mid-point and the capacitor mid-point. The capacitor mid-point is fixed at \( V_s/2 \). The leg's output is either \( V_s \) or 0. So the load sees either \( +V_s/2 \) or \( -V_s/2 \) — two values, and neither is zero. Turning both switches off does not help: the load current then flows through a diode, which still clamps the output to one rail or the other.

The full bridge. The load sits between two leg mid-points, each of which can be \( V_s \) or 0. Four combinations, three distinct differences: \( +V_s \), \( 0 \) (twice), \( -V_s \).

The general rule this illustrates: a converter's output levels come from the number of distinct differences its switching states can produce, not from the number of states. Two legs of two states give three levels, not four, because two of the states are degenerate.

Why the degeneracy is useful rather than wasteful. The two zero states — both legs high, or both legs low — are electrically identical at the load but use different devices. A modulator can alternate between them to share the conduction duty and equalise device temperatures. Space vector modulation (Chapter 19) makes this choice explicitly, and it is one of the things that makes SVM better than naive carrier PWM.

And the extension. Three legs of two states give \( 2^3 = 8 \) states but only 7 distinct vectors, because two are zero. That is the basis of the entire three-phase inverter of Chapter 17.

Why does eliminating the third harmonic also reduce total distortion, when the theory only promised to remove one component?

Because the third harmonic was by far the largest, and because a 120° conduction angle happens to be a better shape overall.

The dominant term is removed. In a square wave the third carries 33% of the fundamental — more than every harmonic above the ninth combined. Removing it takes the THD from 48.3% down to about 35% on that account alone.

But the measured figure is 31.1%, which is better still. The extra improvement comes from the shape change. At \( \alpha = 30^\circ \), every harmonic is scaled by \( \cos n\alpha \), and several of those factors are small:

3rd: \( \cos 90^\circ = 0 \) — eliminated.
5th: \( \cos 150^\circ = -0.866 \) — barely reduced.
7th: \( \cos 210^\circ = -0.866 \) — barely reduced.
9th: \( \cos 270^\circ = 0 \) — also eliminated.
15th, 21st: also nulled, since \( \cos n\alpha = 0 \) whenever \( n \) is an odd multiple of 3.

So \( \alpha = 30^\circ \) removes the entire triplen family, not just the third. That is why it does so much better than one elimination would suggest.

The catch, stated fairly. The fundamental also fell, from \( 0.900V_s \) to \( 0.779V_s \) — 13.4% less output. THD is a ratio, so part of the improvement is the denominator shrinking rather than the numerator. Judged on absolute harmonic content the gain is real but smaller than the headline suggests.

Which is the honest way to state the trade: \( \alpha = 30^\circ \) buys a much cleaner spectrum at the cost of 13% of the output. Whether that is a good bargain depends on whether you have DC link voltage to spare.

An inverter drives a motor whose voltage THD measures 48% but whose current THD is under 10%. Is the instrument faulty?

No — both readings are correct, and the difference is one of the most useful facts in drive engineering.

The load filters the harmonics. A motor is essentially \( R + j\omega L \), so its impedance rises with frequency:

\[ I_n = \frac{V_n}{\sqrt{R^2 + (n\omega L)^2}} \]

At high \( n \) this is approximately \( V_n/(n\omega L) \). The harmonic voltages already fall as \( 1/n \), so the currents fall as \( 1/n^2 \).

Put numbers on it. With \( R = 2\ \Omega \) and \( \omega L = 10\ \Omega \):

Fundamental: \( V_1 = 100\% \), \( Z_1 = 10.2\ \Omega \), \( I_1 = 9.8 \) units.
5th: \( V_5 = 20\% \), \( Z_5 = 50\ \Omega \), \( I_5 = 0.40 \) units — 4% of the fundamental current, not 20%.
7th: \( V_7 = 14\% \), \( Z_7 = 70\ \Omega \), \( I_7 = 0.20 \) units — 2%.

Summing gives a current THD around 5%, against a voltage THD of 48%.

Why this matters practically. Torque is produced by current, not voltage, so a motor fed a square wave produces torque that is much smoother than the voltage waveform implies. It is the main reason square-wave and six-step drives were viable for decades.

And the three caveats that stop this being a free pass:

Harmonic currents still cause \( I^2R \) heating without producing useful torque. A 5% current THD is about 0.25% extra loss — small, but it accumulates.
The 5th harmonic produces a negative-sequence field, so it makes a braking torque that pulsates at six times the fundamental. Audible, and hard on gearboxes.
The voltage harmonics still stress the insulation, regardless of how little current flows. Fast switching edges on long motor cables cause reflections that can double the terminal voltage — a well-known cause of premature winding failure.

A designer sets the dead time to 5 μs "for safety" in a 20 kHz inverter. What have they done?

Given away 10% of the output voltage and introduced serious low-order distortion, in exchange for margin they almost certainly did not need.

The arithmetic. At 20 kHz the switching period is 50 μs. Dead time occurs at every transition, twice per period, so 10 μs of every 50 is lost — 20% of the switching period, and a voltage error of up to 10% of the DC link.

What that does to the output:

Lost amplitude. The maximum achievable fundamental falls by about 10%, so the DC link must be raised or the drive derated.
5th and 7th harmonics. The error's sign follows the current's sign, so it is a square wave at the fundamental frequency — whose spectrum is exactly the low-order harmonics that PWM existed to avoid. Typical figures are 3–5% each.
Low-speed torque ripple. At 10% of rated speed the commanded voltage is about 10% of the link, so a 10% error is a 100% error. Motors run visibly roughly, and some will not start at all.
Zero-crossing clamping. Near a current zero the sign is ambiguous, so the compensation cannot decide and the current flattens — a distinctive distortion that shows up clearly on a current probe.

What the dead time should actually have been. Set it from the devices: turn-off delay plus fall time plus the gate-driver's propagation mismatch, with perhaps 50% margin. A modern 600 V IGBT needs 1–2 μs; a SiC MOSFET needs 100–200 ns. 5 μs is appropriate for a large, slow, high-voltage IGBT and nothing else.

Why the mistake is so common. Excess dead time never causes a visible failure — it causes a slightly weak, slightly rough drive that passes every functional test. Shoot-through, by contrast, destroys the module instantly. The asymmetry of consequences pushes designers towards excess, and only measurement corrects it.

The right approach: measure the actual device turn-off at the worst-case temperature and current, set the dead time from that, and add dead-time compensation in the modulator to cancel the residue.

Given that PWM is better in almost every way, why are millions of square-wave inverters still sold each year?

Because "better" is measured against requirements, and two of the square wave's properties are exactly what some applications need.

1. DC link utilisation — the argument at the bottom of the market. A square wave produces \( 4V_s/\pi = 1.27V_s \) peak. Sinusoidal PWM in its linear region produces \( V_s \). For a 12 V battery inverter that is the difference between 15.3 V and 12 V of fundamental peak — 27% more output from the same battery. For a camping inverter running a fan and some lights, that is worth more than waveform purity, and the bill of materials is a fraction of a PWM design's.

2. Switching loss — the argument at the top. Switching energy scales with \( VI \). At 3 kV and 2 kA, one switching event costs several joules. Square wave at 50 Hz costs 100 events per second; PWM at 5 kHz costs 10,000. At those ratings the second is thermally impossible.

This is why HVDC valves, large traction converters and grid-scale equipment do not use conventional PWM. They use square wave with many series levels, or selective harmonic elimination with a handful of angles — getting a good waveform from a very small switching budget. That is precisely what Chapter 20's multilevel inverters are for.

The shape of the market that results:

Below ~1 kW: quasi-square, because cost and battery utilisation dominate.
1 kW to ~1 MW: PWM, because switching is cheap and waveform quality matters.
Above ~1 MW: multilevel with low switching frequency, because switching is expensive again.

The engineering lesson generalises well beyond inverters. A technique that is superior across most of a specification can still lose at the extremes, where a single constraint dominates everything else. Recognising which constraint binds — before choosing the technique — is most of what topology selection is.

Practice

Problems

Three habits for Part 4:

Work in harmonics, not instantaneous values. Find \( V_n \), divide by \( Z_n \), then recombine. It is faster and it shows you where the problem is.
Count your degrees of freedom. \( k \) switching angles impose \( k \) conditions — no more.
Check the current's sign against the voltage's before deciding which device conducts.

Problems 1–5 are direct application; 6–9 need judgement; 10–12 are design questions worth discussing in a tutorial.

A single-phase full-bridge inverter with \( V_s = 300 \) V feeds \( R = 15\ \Omega \), \( L = 40 \) mH at 50 Hz. Find \( V_1 \), \( V_3 \), \( V_5 \), the corresponding currents, and the total RMS current including harmonics to the 11th.
For the inverter of Problem 1, compute the voltage THD and the current THD, and explain the difference in one sentence.
A quasi-square-wave inverter runs at \( \alpha = 20^\circ \) from a 240 V link. Find the RMS output voltage, the fundamental, and the amplitude of the 3rd, 5th and 7th harmonics relative to the fundamental.
Find the value of \( \alpha \) that eliminates the fifth harmonic, and state the fundamental output it gives from a 400 V link. Which other harmonics are nulled at the same angle?
A half-bridge inverter delivers 2 kW at 230 V from a split 650 V link. Find the fundamental, the load current, and the RMS current in each splitter capacitor.
An inverter feeds a load at 0.6 power factor lagging. Sketch the output voltage and current over one cycle and identify which of \( T_1 \)–\( T_4 \), \( D_1 \)–\( D_4 \) conducts in each interval. Hence find the RMS current in one transistor and one diode if the load current is 20 A RMS.
Show that a quasi-square wave with \( \alpha = 30^\circ \) eliminates all triplen harmonics, and explain why this matters less in a three-phase system than in a single-phase one.
A 20 kHz inverter has 3 μs of dead time. Estimate the fractional voltage loss, and the amplitude of the resulting 5th harmonic as a fraction of the fundamental at 10% of rated speed.
Design an \( LC \) output filter for a 400 Hz, 115 V aircraft inverter running quasi-square at \( \alpha = 30^\circ \), to achieve 5% THD. Compare the inductor size with that required for a 50 Hz inverter of the same rating and comment.
A "modified sine wave" inverter is sold as suitable for all appliances. Analyse its suitability for (a) an incandescent lamp, (b) an induction motor, (c) a laptop charger with a capacitor-input rectifier, and (d) a mains transformer. Justify each answer from the harmonic content.
Selective harmonic elimination with three angles is to null the 5th and 7th harmonics while setting the fundamental to 0.8 of its maximum. Write the three equations that must be solved, explain why they have no closed-form solution, and describe how a controller uses the result at run time.
A 5 MW inverter must choose between square-wave operation at 50 Hz and PWM at 2 kHz. Estimate the switching loss for each given 3.3 kV devices carrying 1.5 kA with 3 μs transitions, and comment on what this implies for the choice of topology at this power level.