Current Source, Multilevel, and Resonant Inverters

They are exact opposites, and for exactly mirrored reasons.

The VSI's danger is a short. Its DC link is a capacitor, so the voltage is stiff and the current is whatever the circuit allows. Close both devices of a leg and you connect \( +V_s \) to 0 through two devices, with only stray inductance limiting the current. Dead time — a gap with both devices off — prevents it. During that gap the load current freewheels through a diode, so nothing is interrupted.

The CSI's danger is an open. Its link is an inductor, so the current is stiff and the voltage is whatever the circuit allows. Open every path and the inductor's current has nowhere to go; \( v = L\,di/dt \) with \( di/dt \to -\infty \) produces an unbounded voltage that destroys the devices. Overlap time — an interval with both devices on — prevents it. During that overlap the link current is briefly shared between two phases, which is harmless.

The duality is complete, and worth tabulating:

• VSI: capacitor link ↔ CSI: inductor link
• VSI: must never short ↔ CSI: must never open
• VSI: dead time ↔ CSI: overlap time
• VSI: antiparallel diode (carries reverse current) ↔ CSI: series diode (blocks reverse voltage)
• VSI: stepped voltage, smooth current ↔ CSI: stepped current, smooth voltage

This is circuit duality in its purest form — swap voltage for current, capacitor for inductor, series for parallel, and every statement about one becomes a true statement about the other. Recognising it means you get the CSI's behaviour for free once you know the VSI's, which is worth more than memorising a second set of rules.

Because the load turns them off. In a load-commutated inverter, an over-excited synchronous machine provides the commutation the device cannot provide for itself.

How it works. A synchronous machine's excitation is controlled independently of its armature. Over-excite it and it operates at a leading power factor, meaning its terminal voltage leads its current. That leading voltage appears across the outgoing thyristor at the moment of commutation, reverse-biasing it for long enough to regain blocking capability.

This is exactly the natural commutation of Part 2, with the machine's back-EMF playing the role the grid played there. No commutation capacitor, no auxiliary thyristor, no forced-commutation circuit at all.

Why thyristors are worth this effort at 30 MW:

• Ratings nothing else matches. One device handles 8 kV and 5 kA. Building the same converter from IGBTs would need many devices in series and parallel, with all the voltage-sharing and timing difficulty that implies.
• Negligible switching loss. Two commutations per cycle at 50 Hz. A PWM inverter at these currents would dissipate hundreds of kilowatts in switching alone.
• Free regeneration. Reverse the link voltage and power flows back to the grid, with no additional hardware. A pumped-storage machine changes from pumping to generating by control action alone.
• Failure mode. Thyristors fail short-circuit, so a series string can carry redundant devices — one failure does not stop the machine.

The two real limitations:

1. It cannot start from rest. No rotation means no back-EMF and nothing to commutate with. Starting uses pulse commutation, in which the source-side converter briefly forces the link current to zero, up to about 10% speed.
2. Only synchronous machines. An induction motor cannot supply leading reactive power, so it cannot commutate the bridge. This is why very large drives are almost always synchronous.

The lesson worth carrying: a device limitation can sometimes be answered by the system rather than by the circuit. The thyristor did not become turn-off capable — the machine was asked to do the job instead.

It is the most quoted reason and the least important one. Three others matter more.

1. Device voltage rating — usually decisive. A 6.6 kV motor needs a link near 10 kV. No IGBT blocks that; the highest rating is 6.5 kV, usable to about 3.6 kV. A two-level inverter is therefore simply not buildable without series-connecting devices, which requires gate timing matched within tens of nanoseconds. A five-level converter imposes 2.5 kV per device, with the sharing enforced by the topology instead.

2. \( dv/dt \) at the motor. A two-level inverter switching 10 kV in 200 ns gives 50 kV/μs. Through a cable, that edge reflects at the motor terminals and can nearly double, concentrating the stress on the first turn of each winding — a well-documented cause of premature failure. Five levels quarter the step and largely remove the problem. For a retrofit onto an existing motor this is often the whole argument.

3. Effective switching frequency. An \( N \)-level converter's output steps \( N-1 \) times more often than any device switches. Submodules switching at 100 Hz can produce ripple at several kilohertz — low switching loss and a clean waveform simultaneously, which a two-level converter cannot offer at any frequency.

4. And then, yes, the harmonics. THD falls roughly as \( 1/(N-1) \). Genuinely useful, and often it removes the output filter entirely — but it arrives as a by-product of the other three.

The evidence for this ordering is in what gets built. Three-level NPC dominates medium-voltage drives — the smallest level count that solves the device-rating problem, and no more. If harmonics were the driver, seven and nine levels would be common at those powers, and they are not.

Because in battery storage the isolated sources already exist. The topology's chief weakness disappears, and several advantages appear in its place.

A battery system is naturally modular. A megawatt-scale installation is thousands of cells assembled into modules, each of a few hundred volts and each already electrically separate. Making each module one H-bridge cell requires no transformer at all — which is precisely what makes the topology expensive in a motor drive.

What that arrangement then makes possible:

1. Per-module state-of-charge balancing. A cell whose module is more charged can be inserted for longer, discharging it faster. Conventional systems need separate balancing hardware; here it is a modulation decision.
2. Fault tolerance. A failed module is bypassed and the system continues at slightly reduced voltage. In a series-string architecture, one failed module can take the whole system offline.
3. Modules need not match. Different capacities, chemistries or ages can be mixed, because each is controlled independently. This makes second-life EV batteries usable in grid storage — a substantial commercial advantage.
4. No separate DC–DC stage. The cells connect directly to the AC output, removing a whole conversion stage and its losses.

The same argument applies to photovoltaics, where each cell can be one string with its own maximum-power-point tracker — so partial shading on one string does not drag down the others, which it does in a conventional series-string inverter.

The general lesson. A topology's "drawback" is only a drawback relative to an application. The cascaded H-bridge's requirement for isolated sources is fatal in a motor drive and free in battery storage — so the same circuit is a poor choice in one place and the obvious one in another. Reading the requirement before judging the topology is the whole skill.

Both are charged by the arm current — the difference is that an MMC has enough redundancy to control the process, and a controller that uses it every cycle.

The mechanism. When a submodule is inserted, the arm current flows through its capacitor: positive current charges it, negative current discharges it. When bypassed, its charge is untouched.

The control that makes it self-balancing. At each switching decision the controller knows how many submodules must be inserted (set by the wanted arm voltage) but is free to choose which. So:

• When the arm current is charging, insert the least-charged submodules.
• When it is discharging, insert the most-charged ones.

Sort the submodules by voltage each cycle and pick from the appropriate end. The capacitors converge on a common voltage and stay there, with no external supply and no balancing resistors.

Why a flying capacitor converter cannot do quite the same. It has redundant states too, and it does self-balance in normal operation — but only a few, so the balancing authority is limited and slow. More importantly, at start-up all its capacitors are at zero and there is no valid switching state that charges them in a controlled way. It needs a pre-charge circuit — typically resistors and contactors — to bring them up before switching begins.

An MMC needs a start-up procedure too, but a simpler one: bypass every submodule, connect to the AC grid through a charging resistor, and let the arm current charge the capacitors through the submodule diodes. Then insert them progressively. No separate charging supply, and the same hardware does the job.

The underlying principle. The number of redundant states is what determines how much control authority you have over internal energy. An MMC with 200 submodules has an enormous number of ways to produce any given arm voltage, and that redundancy is spent on balancing. It is the same principle as Chapter 19's zero-state choice, scaled up by two orders of magnitude.

"What is switching loss doing at my operating point?" Every topology in Part 4 is a different answer.

Below about 1 kW: switching loss is negligible. A few watts either way does not matter, so the decision is made on component count and DC link utilisation. Quasi-square operation wins — four devices, no modulator, no filter, and 27% more fundamental from the same battery than PWM could produce.

From 1 kW to about 1 MW: switching loss is manageable. A few kilohertz costs a small percentage of the output, which buys an excellent waveform. Two-level SVM dominates: best DC link utilisation of any linear scheme, fast control, and the smallest possible device count for the performance.

Above about 1 MW: switching loss becomes decisive. At 690 V and 1 kA a switching event costs about 0.5 J, so 5 kHz means kilowatts per device. Two responses, both used:

• Multilevel, so each device switches a fraction of the voltage and switches less often, while the output still steps rapidly.
• Current source with thyristors, switching twice per cycle at ratings no other device reaches.

Above about 100 MW: neither is enough alone. The MMC combines both ideas — hundreds of levels, each submodule switching a few times per cycle — and reaches 99% efficiency with no filters.

And at high frequency the same question reappears. Soft switching becomes worthwhile exactly when switching loss dominates conduction loss, which for silicon is above a few hundred kilohertz.

Why this is worth remembering rather than the topologies themselves. Device technology moves the boundaries — SiC and GaN have pushed two-level converters to higher powers and frequencies than silicon allowed — but it does not change the ordering. Estimate the switching loss first, and the topology follows.