FET Small-Signal Amplifiers — Solved Problems

About this problem set

Small-signal analysis of FET stages: common source with and without a bypassed source resistor, the source follower and the common-gate stage, the correction that finite drain resistance makes to the gain, and a design that picks the drain resistor for a specified gain and then checks the DC headroom it leaves.

Each problem below is solved in full — the given data is listed first, the governing relation is stated, and the arithmetic is carried through to a boxed answer. Work through the statement yourself before opening the solution. The underlying theory is covered in the Electronic Devices lecture series.

PROBLEM 01

Common-Source Amplifier with Bypassed Source Resistor

Problem Statement

A common-source JFET amplifier is self-biased: \(V_{DD} = 20~\text{V}\), \(R_D = 2.2~\text{k}\Omega\), \(R_S = 1~\text{k}\Omega\) fully bypassed by a large capacitor, and \(R_G = 1~\text{M}\Omega\) from gate to ground. The JFET has \(I_{DSS} = 10~\text{mA}\), \(V_P = -4~\text{V}\), and \(r_d\) is large enough to ignore.

Find the Q-point and \(g_m\).
Find \(Z_i\), \(Z_o\) and the no-load voltage gain \(A_v = v_o/v_i\).
A 4.7 k\(\Omega\) load is capacitively coupled to the drain and the source has an internal resistance of 600 \(\Omega\). Find the loaded gain \(A_v\) and the overall gain \(A_{vs} = v_o/v_s\).

Solution

\(I_{DSS} = 10~\text{mA}\), \(V_P = -4~\text{V}\), \(r_d \to \infty\)
\(V_{DD} = 20~\text{V}\), \(R_D = 2.2~\text{k}\Omega\), \(R_S = 1~\text{k}\Omega\) (bypassed), \(R_G = 1~\text{M}\Omega\)
Small-signal model: a current source \(g_m v_{gs}\) from drain to source, open-circuit gate.

Part (a) — DC bias and transconductance

\[\begin{aligned} V_{GS} &= -I_D R_S \;\Rightarrow\; I_D = 10\left(1 - \frac{I_D(1)}{4}\right)^2 \\ 0.6250I_D^2 - 6.0000I_D + 10.0000 &= 0\;\Rightarrow\; I_{DQ} = 2.1467~\text{mA} \\ V_{GSQ} &= -2.1467~\text{V},\qquad V_{DSQ} = 20 - I_D(3.2) = 13.131~\text{V} \\ g_m &= \frac{2(10)}{4}\left(1 - \frac{-2.147}{-4}\right) = 5\,(0.4633) = 2.3166~\text{mS} \end{aligned}\]

\(I_{DQ} = 2.15~\text{mA}\), \(V_{GSQ} = -2.15~\text{V}\), \(V_{DSQ} = 13.1~\text{V}\), \(g_m = 2.32~\text{mS}\)

Part (b) — small-signal quantities

The bypass capacitor puts the source at AC ground, so \(v_{gs} = v_i\) and the whole drain current flows in \(R_D\):

\[\begin{aligned} Z_i &= R_G = 1~\text{M}\Omega\quad(\text{the gate itself is an open circuit}) \\ Z_o &= R_D \parallel r_d \approx R_D = 2.2~\text{k}\Omega \\ v_o &= -g_m v_{gs} R_D \;\Rightarrow\; A_v = -g_m R_D = -(2.3166~\text{mS})(2.2~\text{k}\Omega) = -5.097 \end{aligned}\]

\(Z_i = 1~\text{M}\Omega\), \(Z_o = 2.2~\text{k}\Omega\), \(A_v = -5.10\)

Part (c) — with load and source resistance

\[\begin{aligned} R_D \parallel R_L &= \frac{(2.2)(4.7)}{2.2 + 4.7} = 1.4986~\text{k}\Omega \\ A_v &= -g_m(R_D \parallel R_L) = -(2.3166)(1.4986) = -3.472 \\ A_{vs} &= A_v\,\frac{Z_i}{Z_i + R_{\text{sig}}} = -3.472\times\frac{1000}{1000.6} = -3.469 \end{aligned}\]

\(A_v = -3.47\), \(A_{vs} = -3.47\)

The 600 \(\Omega\) source loses essentially nothing against a 1 M\(\Omega\) input — the whole point of a FET front end. The gain is modest because \(g_m\) of a few mS is an order of magnitude below the \(g_m = I_C/V_T\) of a BJT at the same current.

PROBLEM 02

Gain Loss from an Unbypassed Source Resistor

Problem Statement

The bypass capacitor is removed from the amplifier of the previous problem, so the 1 k\(\Omega\) source resistor now carries signal current. The DC conditions are unchanged: \(g_m = 2.32~\text{mS}\), \(R_D = 2.2~\text{k}\Omega\), \(R_S = 1~\text{k}\Omega\), \(R_G = 1~\text{M}\Omega\), \(r_d \to \infty\).

Derive \(A_v = -g_m R_D/(1 + g_m R_S)\) from the small-signal model.
Evaluate \(A_v\), \(Z_i\) and \(Z_o\), and compare with the bypassed gain of -5.10.
Device spread makes \(g_m\) vary by \(\pm 30\)%. Find the resulting gain spread with and without the bypass capacitor.

Solution

\(g_m = 2.317~\text{mS}\), \(R_D = 2.2~\text{k}\Omega\), \(R_S = 1~\text{k}\Omega\) unbypassed
\(r_d\) neglected; \(R_G = 1~\text{M}\Omega\).

Part (a) — the derivation

With \(R_S\) in the source lead the controlling voltage is no longer the input voltage. The drain current \(i_d = g_m v_{gs}\) also flows through \(R_S\), so

\[\begin{aligned} v_i &= v_{gs} + i_d R_S = v_{gs} + g_m v_{gs} R_S = v_{gs}(1 + g_m R_S) \\ v_o &= -i_d R_D = -g_m v_{gs} R_D \\ A_v &= \frac{v_o}{v_i} = \frac{-g_m R_D}{1 + g_m R_S} \end{aligned}\]

The unbypassed \(R_S\) is series-current (degenerative) feedback: it subtracts \(i_d R_S\) from the drive that reaches the gate-source terminals.

Part (b) — numbers

\[\begin{aligned} g_m R_S &= (2.3166~\text{mS})(1~\text{k}\Omega) = 2.3166 \\ A_v &= \frac{-(2.3166)(2.2)}{1 + 2.3166} = \frac{-5.0966}{3.3166} = -1.537 \\ Z_i &= R_G = 1~\text{M}\Omega,\qquad Z_o = R_D = 2.2~\text{k}\Omega \end{aligned}\]

\(A_v = -1.54\) against \(-5.10\) when bypassed — a factor of 3.32 lost.

\(Z_o\) is unchanged: looking back into the drain with \(v_i = 0\), the controlled source is inactive and only \(R_D\) remains (with \(r_d\) infinite).

Part (c) — gain stability against \(g_m\) spread

\(g_m\) (mS)	Bypassed \(A_v = -g_mR_D\)	Unbypassed \(A_v\)
1.622	-3.568	-1.361
2.317	-5.097	-1.537
3.012	-6.626	-1.652

\[\text{spread: } \pm30\% \text{ bypassed} \;\longrightarrow\; -11.4\%\ \text{to}\ +7.5\%\ \text{unbypassed}\]

The bypassed gain tracks \(g_m\) one-for-one (\(\pm 30\)%); the degenerated gain moves only -11% to +7.5%.

In the limit \(g_m R_S \gg 1\) the gain collapses to \(-R_D/R_S = -2.20\), set purely by resistors. Here \(g_mR_S = 2.32\) is only moderately large, so the gain sits between the two extremes — the usual way to trade gain for predictability.

PROBLEM 03

Source Follower Gain and Output Impedance

Problem Statement

A source follower (common-drain stage) uses \(V_{DD} = 12~\text{V}\), a 2.2 k\(\Omega\) source resistor to ground, \(R_G = 1~\text{M}\Omega\), and the drain tied directly to the rail. The output is taken from the source. \(I_{DSS} = 16~\text{mA}\), \(V_P = -4~\text{V}\), \(r_d\) neglected.

Find the Q-point and \(g_m\).
Derive and evaluate \(A_v = g_mR_S/(1+g_mR_S)\).
Find \(Z_i\) and \(Z_o = R_S \parallel (1/g_m)\).
Find the gain when a 1 k\(\Omega\) load is coupled to the source.

Solution

\(I_{DSS} = 16~\text{mA}\), \(V_P = -4~\text{V}\), \(R_S = 2.2~\text{k}\Omega\), \(R_G = 1~\text{M}\Omega\)
\(r_d \to \infty\); the drain is at AC ground, so the controlled source \(g_mv_{gs}\) drives \(R_S\) directly.

Part (a) — bias point

\[\begin{aligned} I_D &= 16\left(1 - \frac{2.2 I_D}{4}\right)^2 \;\Rightarrow\; 4.8400I_D^2 - 18.6000I_D + 16.0000 = 0 \\ I_{DQ} &= 1.2999~\text{mA},\qquad V_{GSQ} = -I_DR_S = -2.8599~\text{V} \\ V_S &= 2.860~\text{V},\qquad V_{DS} = 12 - 2.860 = 9.140~\text{V} \\ g_m &= \frac{2(16)}{4}\left(1 - \frac{-2.860}{-4}\right) = 8(0.2850) = 2.2803~\text{mS} \end{aligned}\]

\(I_{DQ} = 1.30~\text{mA}\), \(V_{GSQ} = -2.86~\text{V}\), \(g_m = 2.28~\text{mS}\)

Part (b) — voltage gain

\[\begin{aligned} v_o &= g_m v_{gs} R_S,\qquad v_{gs} = v_i - v_o \\ v_o &= g_m(v_i - v_o)R_S \;\Rightarrow\; v_o(1 + g_mR_S) = g_mR_S v_i \\ A_v &= \frac{g_mR_S}{1 + g_mR_S} = \frac{(2.2803)(2.2)}{1 + (2.2803)(2.2)} = \frac{5.0166}{6.0166} = 0.8338 \end{aligned}\]

\(A_v = 0.834\) — non-inverting and slightly less than unity.

Part (c) — impedances

Looking back into the source terminal, the controlled source presents \(1/g_m\) in parallel with \(R_S\):

\[\begin{aligned} Z_i &= R_G = 1~\text{M}\Omega \\ \frac{1}{g_m} &= \frac{1}{2.2803~\text{mS}} = 438.5~\Omega \\ Z_o &= R_S \parallel \frac{1}{g_m} = 2200 \parallel 438.5 = 365.7~\Omega \end{aligned}\]

\(Z_i = 1~\text{M}\Omega\), \(Z_o = 366~\Omega\)

Part (d) — with a 1 k\(\Omega\) load

\[\begin{aligned} R_S \parallel R_L &= \frac{(2.2)(1)}{3.2} = 0.6875~\text{k}\Omega \\ A_v &= \frac{g_m(R_S\parallel R_L)}{1 + g_m(R_S\parallel R_L)} = 0.6105 \end{aligned}\]

\(A_v = 0.611\) — the gain drops only 27% for a load that is less than half \(R_S\).

That insensitivity is the point of a follower: a 366 \(\Omega\) output driving a 1 M\(\Omega\) input. Note \(Z_o\) is dominated by \(1/g_m\), so it improves only as fast as \(g_m\) — a FET follower cannot match the milliohm-class output of an emitter follower at the same current.

PROBLEM 04

Common-Gate Stage Input Impedance and Gain

Problem Statement

A common-gate JFET stage has the gate grounded, the signal applied to the source through a coupling capacitor, and the output taken at the drain. \(V_{DD} = 18~\text{V}\), \(R_D = 4.7~\text{k}\Omega\), \(R_S = 1.5~\text{k}\Omega\); the JFET has \(I_{DSS} = 12~\text{mA}\), \(V_P = -6~\text{V}\), \(r_d\) neglected.

Find the Q-point and \(g_m\).
Show that \(Z_i \approx R_S \parallel (1/g_m)\) and evaluate it, with \(Z_o\).
Find \(A_v\), and then the overall gain from a source of internal resistance 1 k\(\Omega\).

Solution

\(I_{DSS} = 12~\text{mA}\), \(V_P = -6~\text{V}\)
\(R_D = 4.7~\text{k}\Omega\), \(R_S = 1.5~\text{k}\Omega\), \(V_{DD} = 18~\text{V}\), \(r_d \to \infty\)
Gate at AC ground, so \(v_{gs} = -v_i\) where \(v_i\) is the source voltage.

Part (a) — bias

\[\begin{aligned} 0.7500I_D^2 - 7.0000I_D + 12.0000 &= 0 \;\Rightarrow\; I_{DQ} = 2.2630~\text{mA} \\ V_{GSQ} &= -I_DR_S = -3.3944~\text{V},\qquad V_{DSQ} = 18 - I_D(6.2) = 3.970~\text{V} \\ g_m &= \frac{2(12)}{6}\left(1 - \frac{-3.394}{-6}\right) = 4(0.4343) = 1.7370~\text{mS} \end{aligned}\]

\(I_{DQ} = 2.26~\text{mA}\), \(V_{DSQ} = 3.97~\text{V}\), \(g_m = 1.74~\text{mS}\)

Part (b) — impedances

Drive the source terminal with \(v_i\). Then \(v_{gs} = -v_i\) and the current delivered into the device is \(-g_mv_{gs} = g_mv_i\), so the device alone looks like \(1/g_m\):

\[\begin{aligned} Z_i &= R_S \parallel \frac{1}{g_m} = 1500 \parallel 575.7~\Omega = 416.0~\Omega \\ Z_o &= R_D = 4.7~\text{k}\Omega \end{aligned}\]

\(Z_i = 416~\Omega\), \(Z_o = 4.7~\text{k}\Omega\)

Part (c) — gain, loaded by the source resistance

\[\begin{aligned} v_o &= -g_mv_{gs}R_D = +g_mv_iR_D \;\Rightarrow\; A_v = g_mR_D \\ A_v &= (1.7370~\text{mS})(4.7~\text{k}\Omega) = 8.1641\quad(\text{non-inverting}) \\ A_{vs} &= A_v\frac{Z_i}{Z_i + R_{\text{sig}}} = 8.164\times\frac{416.0}{1416.0} = 2.399 \end{aligned}\]

\(A_v = 8.16\) but \(A_{vs} = 2.40\) once the 1 k\(\Omega\) source is attached.

Common gate has the same \(|A_v| = g_mR_D\) as common source, without the phase inversion, but its input impedance is only 416 \(\Omega\). It is worth using when the source is already low-impedance — a coaxial feed, or the emitter/source of a preceding stage in a cascode — because there is no Miller capacitance to limit bandwidth.

PROBLEM 05

Effect of Finite Drain Resistance on Gain

Problem Statement

A common-source amplifier with a bypassed source resistor has \(g_m = y_{fs} = 2.6~\text{mS}\) and \(R_D = 4.7~\text{k}\Omega\). The data sheet also lists an output admittance \(y_{os} = 40~\mu\text{S}\).

Find \(r_d\), and the gain that would be predicted if \(r_d\) were ignored.
Find the actual no-load gain and \(Z_o\), and quote the error made by ignoring \(r_d\).
State the rule of thumb for when \(r_d\) may be dropped, and test it here.
Find the gain with a 10 k\(\Omega\) load coupled to the drain.

Solution

\(g_m = 2.6~\text{mS}\), \(R_D = 4.7~\text{k}\Omega\), \(y_{os} = 40~\mu\text{S}\)
\(r_d = 1/y_{os}\) appears from drain to source, in parallel with the controlled source.

Part (a) — drain resistance and the idealised gain

\[\begin{aligned} r_d &= \frac{1}{y_{os}} = \frac{1}{40~\mu\text{S}} = 25.0~\text{k}\Omega \\ A_v\big|_{r_d\to\infty} &= -g_mR_D = -(2.6)(4.7) = -12.220 \end{aligned}\]

\(r_d = 25.0~\text{k}\Omega\); ignoring it predicts \(A_v = -12.22\).

Part (b) — the actual gain

\(r_d\) sits directly across \(R_D\) in the small-signal model, so the drain current divides between them:

\[\begin{aligned} r_d \parallel R_D &= \frac{(25)(4.7)}{25 + 4.7} = 3.9562~\text{k}\Omega \\ A_v &= -g_m(r_d \parallel R_D) = -(2.6)(3.9562) = -10.286 \\ Z_o &= r_d \parallel R_D = 3.956~\text{k}\Omega \end{aligned}\]

\(A_v = -10.29\), \(Z_o = 3.96~\text{k}\Omega\); ignoring \(r_d\) overestimates the gain by 15.8%.

Part (c) — the 10:1 rule

Dropping \(r_d\) costs less than about 10% error when

\[r_d \ge 10 R_D \;\Rightarrow\; 10R_D = 47.0~\text{k}\Omega > r_d = 25.0~\text{k}\Omega\quad\times\]

The rule fails here (\(r_d/R_D = 5.32\)), so \(r_d\) must be kept.

Part (d) — with a 10 k\(\Omega\) load

\[\begin{aligned} r_d \parallel R_D \parallel R_L &= \left(\frac{1}{25} + \frac{1}{4.7} + \frac{1}{10}\right)^{-1} = 2.8347~\text{k}\Omega \\ A_v &= -(2.6)(2.8347) = -7.370 \end{aligned}\]

\(A_v = -7.37\)

\(r_d\) is just another resistor from drain to source, so it always reduces the gain and the output impedance. It matters most in high-\(R_D\) designs and in current-source loads, where \(g_mr_d\) sets the maximum achievable gain of the device.

PROBLEM 06

Design of a Common-Source Voltage Amplifier

Problem Statement

Design. Using a JFET with \(I_{DSS} = 8~\text{mA}\) and \(V_P = -3.5~\text{V}\) on an 18 V rail, design a self-biased common-source amplifier with a bypassed source resistor for \(I_D \approx 2~\text{mA}\) and a no-load voltage gain of magnitude 10. Use E24 resistors and \(r_d \to \infty\).

Choose \(R_S\) for the target drain current, then recompute the achieved \(I_D\) and \(g_m\).
Choose \(R_D\) for the specified gain and quote the achieved gain.
Check the DC headroom: confirm pinch-off operation and find the largest undistorted output swing and the input signal that produces it.
State the gain once a 22 k\(\Omega\) load is coupled to the drain.

Solution

\(I_{DSS} = 8~\text{mA}\), \(V_P = -3.5~\text{V}\), \(V_{DD} = 18~\text{V}\)
Targets: \(I_D = 2~\text{mA}\), \(|A_v| = 10\) unloaded
\(R_S\) fully bypassed, so \(A_v = -g_mR_D\); \(r_d\) neglected; E24 values.

Step 1 — the source resistor

\[\begin{aligned} V_{GS} &= V_P\left(1 - \sqrt{I_D/I_{DSS}}\right) = -3.5\left(1 - \sqrt{0.25}\right) = -1.7500~\text{V} \\ R_S &= \frac{-V_{GS}}{I_D} = \frac{1.750}{2~\text{mA}} = 875.0~\Omega \;\Rightarrow\; R_S = 910~\Omega \end{aligned}\]

\[\begin{aligned} 0.5408I_D^2 - 5.1600I_D + 8.0000 &= 0 \;\Rightarrow\; I_D = 1.9482~\text{mA} \\ V_{GS} &= -1.7728~\text{V},\qquad g_m = \frac{2(8)}{3.5}\left(1 - \frac{-1.773}{-3.5}\right) = 2.2559~\text{mS} \end{aligned}\]

\(R_S = 910~\Omega\) gives \(I_D = 1.95~\text{mA}\) and \(g_m = 2.26~\text{mS}\).

Step 2 — the drain resistor from the gain specification

\[\begin{aligned} |A_v| &= g_mR_D \;\Rightarrow\; R_D = \frac{|A_v|}{g_m} = \frac{10}{2.2559~\text{mS}} = 4.4328~\text{k}\Omega \\ &\Rightarrow\; R_D = 4.3~\text{k}\Omega\ \text{(E24)} \\ A_v &= -(2.2559)(4.3) = -9.700 \end{aligned}\]

\(R_D = 4.3~\text{k}\Omega\), giving \(A_v = -9.70\) (-3.0% from target).

Step 3 — DC headroom and maximum swing

\[\begin{aligned} V_{DS} &= V_{DD} - I_D(R_D + R_S) = 18 - (1.9482)(5.21) = 7.850~\text{V} \\ V_{GS} - V_P &= 1.727~\text{V} < V_{DS}\quad\checkmark\ \text{pinch-off} \end{aligned}\]

With \(R_S\) bypassed the AC load is \(R_D\) alone. The drain may swing down until the device leaves pinch-off, and up until \(I_D\) reaches zero:

\[\begin{aligned} \text{downward} &= V_{DS} - (V_{GS} - V_P) = 7.850 - 1.727 = 6.123~\text{V} \\ \text{upward} &= I_D R_D = (1.9482)(4.3) = 8.377~\text{V} \\ v_{o(\text{pk})} &= \min = 6.123~\text{V}\;\Rightarrow\; v_{i(\text{pk})} = \frac{6.123}{9.700} = 631.2~\text{mV} \end{aligned}\]

Pinch-off confirmed; peak output swing 6.12 V, which the DC bias would allow at an input of 631 mV peak.

That input is a large fraction of \(|V_P|\), so square-law distortion, not the bias point, sets the practical limit: keep \(v_{i(\text{pk})}\) below roughly \(0.1|V_{GS} - V_P| = 173~\text{mV}\) for the linear model to hold.

Step 4 — loaded gain

\[A_v = -g_m(R_D \parallel R_L) = -(2.2559)\left(3.5970\right) = -8.114\]

\(A_v = -8.11\) with the 22 k\(\Omega\) load.

Quantity	Specified	Achieved
\(I_D\) (mA)	2.00	1.948
\(\|A_v\|\) unloaded	10.00	9.700
\(V_{DS}\) (V)	-	7.850
\(v_{o}\) peak (V)	-	6.123

The gain specification and the swing specification pull in opposite directions: a bigger \(R_D\) raises \(g_mR_D\) but lowers \(V_{DS}\), and at \(R_D \approx 7.44~\text{k}\Omega\) the stage would sit right at the edge of the ohmic region with no swing at all.