Small-signal analysis of BJT stages using the re model and the hybrid h-parameter model: common emitter with and without emitter bypass, emitter follower, common base, and a two-stage RC-coupled cascade whose overall gain is expressed in decibels.
Each problem below is solved in full — the given data is listed first, the governing relation is stated, and the arithmetic is carried through to a boxed answer. Work through the statement yourself before opening the solution. The underlying theory is covered in the Electronic Devices lecture series.
Common-Emitter Stage with Bypassed Emitter
A voltage-divider biased CE amplifier has \(V_{CC} = 20~\text{V}\), \(R_1 = 56~\text{k}\Omega\), \(R_2 = 8.2~\text{k}\Omega\), \(R_C = 6.8~\text{k}\Omega\) and \(R_E = 1.5~\text{k}\Omega\). The emitter resistor is fully bypassed by a large capacitor; input and output are capacitively coupled and the output is unloaded. \(\beta = 90\), \(r_o = \infty\).
Find the DC emitter current and hence \(r_e\).
Draw on the \(r_e\) model to find \(Z_i\), \(Z_o\) and the no-load voltage gain \(A_v = v_o/v_i\).
Find the current gain \(A_i = i_o/i_i\).
\(V_{CC} = 20~\text{V}\), \(R_1 = 56~\text{k}\Omega\), \(R_2 = 8.2~\text{k}\Omega\), \(R_C = 6.8~\text{k}\Omega\), \(R_E = 1.5~\text{k}\Omega\) (bypassed), \(\beta = 90\)
Simplified \(r_e\) model, \(r_o = \infty\), all capacitors are short circuits at signal frequencies, \(V_T = 26~\text{mV}\).
Step 1 — DC analysis for \(r_e\)
\(I_E = 1.17~\text{mA}\), \(r_e = 22.1~\Omega\)
Step 2 — impedances and gain
With \(R_E\) bypassed the emitter is at signal ground, so the base sees \(\beta r_e\) in parallel with the divider:
\(Z_i = 1558~\Omega\), \(Z_o = 6.8~\text{k}\Omega\), \(A_v = -307\) (180\(^\circ\) phase inversion).
Step 3 — current gain
\(A_i = 70.4\)
Note that \(A_i\) came out close to, but below, \(\beta = 90\): the divider steals part of the input current before it reaches the base. The gain \(-R_C/r_e\) depends on \(I_E\) only through \(r_e\), so it is really set by \(A_v = -I_C R_C / V_T\) — the DC drop across \(R_C\) divided by 26 mV.
Gain Collapse with an Unbypassed Emitter, and Swamping Design
The bypass capacitor is now removed from the amplifier of the previous problem (\(R_C = 6.8~\text{k}\Omega\), \(R_E = 1.5~\text{k}\Omega\), \(R_1 = 56~\text{k}\Omega\), \(R_2 = 8.2~\text{k}\Omega\), \(\beta = 90\), \(r_e = 22.1~\Omega\)), so the whole of \(R_E\) is in the signal path.
Find the new \(A_v\), \(Z_i\) and \(Z_o\), and state the factor by which the gain has collapsed.
Design: split \(R_E\) into an unbypassed part \(R_{E1}\) in series with a bypassed part \(R_{E2}\) (with \(R_{E1} + R_{E2} = 1.5~\text{k}\Omega\), so the DC bias is untouched) to obtain \(A_v = -40\). Use the nearest E24 value for \(R_{E1}\) and quote the gain and \(Z_i\) actually achieved.
Why is the swamped design preferred even though it throws gain away?
\(r_e = 22.13~\Omega\) (unchanged — removing the bypass capacitor does not alter the DC Q-point)
\(R_C = 6800~\Omega\), \(R_E = 1500~\Omega\), \(R_1 \parallel R_2 = 7.153~\text{k}\Omega\), \(\beta = 90\), \(r_o = \infty\)
Part (a) — fully unbypassed emitter
The emitter is no longer at signal ground, so the emitter current develops \(i_e R_E\) which subtracts from the input:
\(A_v = -4.47\), \(Z_i = 6.80~\text{k}\Omega\), \(Z_o = 6.8~\text{k}\Omega\); the gain has fallen by a factor of 68.8.
\(Z_i\) has risen from 1558 \(\Omega\) to 6.80 k\(\Omega\) and is now pinned by the bias divider, because \(Z_b = 137~\text{k}\Omega\) swamps it.
Part (b) — design for \(A_v = -40\)
Only \(R_{E1}\) appears in the signal path, so set \(-R_C/(r_e + R_{E1}) = -40\):
\(R_{E1} = 150~\Omega\) unbypassed, \(R_{E2} = 1350~\Omega\) bypassed; achieved \(A_v = -39.5\) and \(Z_i = 4.89~\text{k}\Omega\).
Part (c) — why swamp
With \(R_{E1} \gg r_e\) the gain tends to \(-R_C/R_{E1} = -45.3\), a ratio of two resistors. \(r_e\) is set by \(I_E\) and therefore drifts with temperature and varies from device to device; a gain that depends only weakly on it is repeatable. The price is the 68.8-fold gain loss seen in part (a) if you swamp completely, which is why only part of \(R_E\) is left unbypassed.
Emitter Follower: Impedance Buffering
An emitter follower (common collector) is fixed-biased: \(V_{CC} = 12~\text{V}\), a 220 k\(\Omega\) resistor from the rail to the base, \(R_E = 3.3~\text{k}\Omega\) from emitter to ground, output taken from the emitter through a coupling capacitor. \(\beta = 100\), \(V_{BE} = 0.7~\text{V}\), \(r_o = \infty\).
Find \(r_e\).
Find \(Z_i\), \(Z_o\) and \(A_v\) with no load.
Repeat \(Z_i\) and \(A_v\) with a \(1~\text{k}\Omega\) load capacitively coupled to the emitter.
\(V_{CC} = 12~\text{V}\), \(R_B = 220~\text{k}\Omega\), \(R_E = 3.3~\text{k}\Omega\), \(\beta = 100\)
Simplified \(r_e\) model, \(r_o = \infty\), \(V_T = 26~\text{mV}\).
Part (a) — \(r_e\)
\(r_e = 12.6~\Omega\)
Part (b) — unloaded small-signal parameters
Looking into the base, the emitter resistor is multiplied by \(\beta\); looking back into the emitter, \(r_e\) appears divided by \(\beta\) (i.e. in parallel with \(R_E\)):
\(Z_i = 132~\text{k}\Omega\), \(Z_o = 12.6~\Omega\), \(A_v = 0.9962 \approx 1\), in phase.
Part (c) — with a 1 k\(\Omega\) load
Loaded: \(A_v = 0.9838\), \(Z_i = 57.6~\text{k}\Omega\).
The stage has voltage gain of essentially unity but transforms a 132 k\(\Omega\) source-facing impedance into a 12.6 \(\Omega\) source impedance — a power gain of the order of \(\beta\). That is the whole point of a follower: it buys current drive, not voltage.
Common-Base Amplifier: Low Input Impedance
A common-base stage uses split supplies. The emitter is returned to \(-V_{EE} = -4~\text{V}\) through \(R_E = 1~\text{k}\Omega\), the base is grounded, and the collector goes to \(+V_{CC} = 12~\text{V}\) through \(R_C = 2.2~\text{k}\Omega\). Signal is injected at the emitter and taken from the collector. \(\alpha = 0.98\), \(V_{BE} = 0.7~\text{V}\).
Find \(I_E\), \(r_e\) and the DC collector-to-base voltage.
Find \(Z_i\), \(Z_o\), \(A_v\) and \(A_i\).
Contrast the result with the CE stage of Problem 1.
\(V_{EE} = 4~\text{V}\), \(R_E = 1~\text{k}\Omega\), \(V_{CC} = 12~\text{V}\), \(R_C = 2.2~\text{k}\Omega\), \(\alpha = 0.98\)
Base grounded, so the whole of \(V_{EE} - V_{BE}\) appears across \(R_E\); \(V_T = 26~\text{mV}\).
Part (a) — DC operating point
\(I_E = 3.30~\text{mA}\), \(r_e = 7.88~\Omega\), \(V_{CB} = 4.89~\text{V}\)
Part (b) — small-signal parameters
The source drives the emitter directly, so it sees \(r_e\) in parallel with \(R_E\):
\(Z_i = 7.82~\Omega\), \(Z_o = 2.2~\text{k}\Omega\), \(A_v = +274\) (no phase inversion), \(A_i \approx -1\).
Part (c) — comparison
| Parameter | CE (bypassed) | CB |
|---|---|---|
| \(Z_i\) | \(1558~\Omega\) | \(7.82~\Omega\) |
| \(A_v\) | -307 | +274 |
| \(A_i\) | 70.4 | \(\approx -1\) |
| Phase | 180\(^\circ\) | 0\(^\circ\) |
The CB stage gives comparable voltage gain with no current gain at all, and an input impedance of a few ohms. That is useless for a voltage source but ideal for accepting current from a low-impedance source such as a coaxial line, and it has no Miller capacitance, which is why CB is the high-frequency configuration.
Hybrid-Parameter Analysis of a CE Stage
A CE amplifier has an AC base-bias resistance \(R_B = R_1 \parallel R_2 = 4.7~\text{k}\Omega\), a collector resistor \(R_C = 3.3~\text{k}\Omega\), a capacitively coupled load \(R_L = 4.7~\text{k}\Omega\), and a fully bypassed emitter. The transistor data sheet quotes \(h_{ie} = 1.1~\text{k}\Omega\), \(h_{fe} = 120\), \(h_{oe} = 20~\mu\text{S}\); \(h_{re}\) is negligible.
Find \(Z_i\), \(Z_o\), \(A_v\) and \(A_i\) from the approximate hybrid model.
Extract \(r_e\) and \(I_E\) from the \(h\)-parameters.
Recompute \(A_v\) from the \(r_e\) model with \(r_o = \infty\) and explain the discrepancy.
\(h_{ie} = 1100~\Omega\), \(h_{fe} = 120\), \(h_{oe} = 20~\mu\text{S}\), \(h_{re} \approx 0\)
\(R_B = 4.7~\text{k}\Omega\), \(R_C = 3.3~\text{k}\Omega\), \(R_L = 4.7~\text{k}\Omega\)
Approximate hybrid model: the \(h_{re}v_{ce}\) generator in the input loop is dropped.
Part (a) — hybrid model
\(h_{oe}\) is a conductance across the output, so it contributes \(1/h_{oe} = 50.0~\text{k}\Omega\) in parallel with the collector load:
\(Z_i = 891~\Omega\), \(Z_o = 3.10~\text{k}\Omega\), \(A_v = -203.6\), \(A_i = 115.5\)
Part (b) — extracting \(r_e\)
The two models describe the same device, so \(h_{ie} = \beta r_e\) and \(h_{fe} = \beta\):
\(r_e = 9.17~\Omega\), corresponding to \(I_E = 2.84~\text{mA}\)
Part (c) — \(r_e\) model with \(r_o = \infty\)
\(r_e\) model gives \(A_v = -211.5\) against \(-203.6\) from the hybrid model — the magnitude is 3.88\% higher.
The two models are the same model. The only difference is that the \(h\)-parameter version keeps the output conductance \(h_{oe}\); dropping it (\(r_o = \infty\)) over-estimates the load and hence the gain. The rule of thumb \(r_o \ge 10 R_C\) makes the error negligible — here \(1/h_{oe} = 50.0~\text{k}\Omega\) is 15.2 times \(R_C\), so a 3.88\% error is expected.
Two-Stage Cascaded Amplifier and Overall Gain in dB
Two identical RC-coupled CE stages are cascaded. Each stage has \(\beta = 100\), a quiescent \(I_E = 2~\text{mA}\), \(R_C = 4.7~\text{k}\Omega\), a bias network presenting \(R_1 \parallel R_2 = 6.8~\text{k}\Omega\), and a fully bypassed emitter. A \(10~\text{k}\Omega\) load is coupled to the second collector and the source has an internal resistance \(R_s = 600~\Omega\).
Find \(r_e\) and the input impedance of one stage.
Find the loaded gain of each stage, remembering that stage 1 is loaded by \(Z_{i2}\).
Find the overall gain \(A_v = v_o/v_i\) and express it in dB.
Find \(A_{vs} = v_o/v_s\) in dB and state the loss caused by the source resistance.
Per stage: \(\beta = 100\), \(I_E = 2~\text{mA}\), \(R_C = 4.7~\text{k}\Omega\), \(R_1 \parallel R_2 = 6.8~\text{k}\Omega\), \(R_E\) bypassed
\(R_L = 10~\text{k}\Omega\), \(R_s = 600~\Omega\), \(r_o = \infty\), \(V_T = 26~\text{mV}\)
Step 1 — \(r_e\) and stage input impedance
\(r_e = 13.0~\Omega\), \(Z_{i} = 1091~\Omega\) for each stage.
Step 2 — per-stage loaded gains
Stage 1 does not see \(R_C\) alone: the input impedance of stage 2 hangs on its collector through the coupling capacitor.
\(A_{v1} = -68.1\), \(A_{v2} = -245.9\). The first stage is heavily loaded by the second.
Step 3 — overall gain
| Stage | \(|A_v|\) | Gain (dB) |
|---|---|---|
| 1 | 68.13 | 36.67 |
| 2 | 245.9 | 47.82 |
| Overall | 16756 | 84.48 |
\(A_v = +16756\), i.e. 84.48 dB. The output is in phase with the input: two inversions cancel.
Check: 36.67 + 47.82 = 84.48 dB. Cascading multiplies gains, so in dB they simply add.
Step 4 — source loading
\(A_{vs} = 80.68~\text{dB}\); the source resistance costs 3.81 dB.
The 3.81 dB is lost purely in the divider formed by \(R_s\) and the 1091 \(\Omega\) input impedance. An emitter follower placed in front would raise \(Z_i\) into the tens of k\(\Omega\) and recover almost all of it — which is exactly why real cascades start with a buffer.