Inverting, Summing and Integrator Circuits

About this problem set

The workhorse op-amp configurations worked end to end: inverting and non-inverting gain from the virtual-ground argument, buffering, weighted summing, the difference amplifier and what resistor mismatch does to its CMRR, the three-op-amp instrumentation amplifier, integrator and differentiator waveforms with their practical stabilising resistors, and a full sensor signal-chain design.

Each problem below is solved in full — the given data is listed first, the governing relation is stated, and the arithmetic is carried through to a boxed answer. Work through the statement yourself before opening the solution. The underlying theory is covered in the Electronic Devices lecture series.

PROBLEM 01

Inverting Amplifier and the Virtual-Ground Argument

Problem Statement

An inverting amplifier has \(R_1 = 10~\text{k}\Omega\) from the source to the inverting input and \(R_f = 220~\text{k}\Omega\) from the output back to that input. The non-inverting input is grounded and the supplies clip the output at \(\pm 13~\text{V}\). The op-amp has \(A_{OL} = 2\times10^{5}\).

State the virtual-ground argument and use it to derive the closed-loop gain, the input resistance and the output resistance.
Find \(v_o\) for \(v_{in} = 120~\text{mV}\) peak at \(1~\text{kHz}\), and the current in \(R_1\) and \(R_f\).
How far from ground does the inverting node actually sit? Is \"virtual ground\" justified?
With \(v_{in}\) unchanged, what is the largest \(R_f\) that keeps the output out of clipping?

Solution

\(R_1 = 10~\text{k}\Omega\), \(R_f = 220~\text{k}\Omega\), \(A_{OL} = 2\times10^{5}\)
\(v_{in} = 120~\text{mV}\) peak; output clips at \(\pm 13~\text{V}\)
Ideal op-amp for parts (a), (b) and (d): infinite input resistance, zero output resistance, no input current.

Part (a) — virtual ground, gain and impedances

Negative feedback drives the differential input voltage to \(v_o/A_{OL}\), which is microvolts. The \(+\) input is tied to ground, so the \(-\) input is held at essentially \(0~\text{V}\) — a virtual ground: it is at ground potential but no current flows to ground from it. The whole of the source current must therefore continue into \(R_f\):

\[\begin{aligned} i_1 &= \frac{v_{in} - 0}{R_1} = \frac{v_{in}}{R_1}, \qquad i_f = i_1 \\ v_o &= 0 - i_f R_f = -\frac{R_f}{R_1}v_{in} \\ A_v &= -\frac{R_f}{R_1} = -\frac{220}{10} = -22 \end{aligned}\]

Because the inverting node never moves, the source always sees \(R_1\) to a fixed potential, and the shunt feedback drives the output resistance to nearly zero:

\[Z_{in} = R_1 = 10~\text{k}\Omega, \qquad Z_{out} \approx 0\]

\(A_v = -22\), \(Z_{in} = 10~\text{k}\Omega\), \(Z_{out} \approx 0\)

Part (b) — output and branch current

\[\begin{aligned} v_o &= (-22)(120~\text{mV}) = -2.64~\text{V peak} \\ i_1 = i_f &= \frac{120~\text{mV}}{10~\text{k}\Omega} = 12~\mu\text{A peak} \end{aligned}\]

\(v_o = 2.64~\text{V}\) peak, inverted (\(180^\circ\) out of phase with \(v_{in}\)); \(i_1 = i_f = 12~\mu\text{A}\) peak.

Part (c) — how virtual is the virtual ground

\[\begin{aligned} |v_-| &= \frac{|v_o|}{A_{OL}} = \frac{2.64~\text{V}}{2\times10^{5}} = 13.2~\mu\text{V} \\ A_v &= -\frac{R_f/R_1}{1 + (1 + R_f/R_1)/A_{OL}} = -21.9975 \end{aligned}\]

The node sits \(13.2~\mu\text{V}\) from ground — \(0.0110\%\) of the input — and the gain is low by only \(0.0115\%\). The approximation is excellent.

Part (d) — largest feedback resistor before clipping

The current is fixed by \(v_{in}\) and \(R_1\) alone, so \(R_f\) sets the swing:

\[\begin{aligned} R_{f(\max)} &= \frac{V_{sat}}{i_1} = \frac{13~\text{V}}{12~\mu\text{A}} = 1.0833~\text{M}\Omega \\ |A_v|_{\max} &= \frac{R_{f(\max)}}{R_1} = 108.3 \end{aligned}\]

\(R_f \le 1.08~\text{M}\Omega\), i.e. \(|A_v| \le 108\).

Everything follows from one idea: the inverting node is a summing junction held at \(0~\text{V}\). Gain, input resistance and clipping limit all drop straight out of it, and the price is that \(Z_{in}\) equals \(R_1\) — this configuration loads the source.

PROBLEM 02

Non-Inverting Amplifier and Voltage Follower

Problem Statement

The same op-amp (\(A_{OL} = 2\times10^{5}\), \(Z_i = 2~\text{M}\Omega\), \(Z_o = 75~\Omega\)) is now connected as a non-inverting amplifier: \(R_f = 47~\text{k}\Omega\) from output to inverting input, \(R_1 = 2.2~\text{k}\Omega\) from that input to ground, signal applied to the non-inverting input.

Find the ideal closed-loop gain and \(v_o\) for \(v_{in} = 300~\text{mV}\) peak.
Find the closed-loop input and output resistances, and the exact gain.
Repeat (b) for the same op-amp wired as a voltage follower.
A \(100~\Omega\) load is driven from a source of internal resistance \(50~\text{k}\Omega\). Compare the signal delivered directly with the signal delivered through the follower.

Solution

\(R_f = 47~\text{k}\Omega\), \(R_1 = 2.2~\text{k}\Omega\), non-inverting input driven
\(A_{OL} = 2\times10^{5}\), \(Z_i = 2~\text{M}\Omega\), \(Z_o = 75~\Omega\)
Series-shunt (voltage-series) feedback, so the input resistance is raised and the output resistance lowered by \(1 + A\beta\).

Part (a) — gain and output

The inverting node is forced to follow \(v_{in}\), and \(R_1\), \(R_f\) form a divider from \(v_o\) back to it:

\[\begin{aligned} v_{in} &= \frac{R_1}{R_1 + R_f}v_o \quad\Rightarrow\quad A_v = 1 + \frac{R_f}{R_1} = 1 + \frac{47}{2.2} = 22.3636 \\ v_o &= 22.3636 \times 300~\text{mV} = 6.709~\text{V peak} \end{aligned}\]

\(A_v = 22.36\), \(v_o = 6.71~\text{V}\) peak and in phase with the input.

Part (b) — impedances and exact gain

\[\begin{aligned} \beta &= \frac{R_1}{R_1 + R_f} = \frac{2.2}{49.2} = 0.04472 \\ 1 + A\beta &= 1 + (2\times10^{5})(0.04472) = 8944.1 \\ Z_{in(f)} &= Z_i(1 + A\beta) = (2~\text{M}\Omega)(8944.1) = 17.89~\text{G}\Omega \\ Z_{out(f)} &= \frac{Z_o}{1 + A\beta} = \frac{75~\Omega}{8944.1} = 8.39~\text{m}\Omega \\ A_{v(\text{exact})} &= \frac{A}{1 + A\beta} = 22.3611 \end{aligned}\]

\(Z_{in} = 17.9~\text{G}\Omega\), \(Z_{out} = 8.4~\text{m}\Omega\), \(A_v = 22.361\) — low by \(0.0112\%\).

Part (c) — voltage follower

Tie the output straight back to the inverting input: \(\beta = 1\), \(A_v = 1\).

\[\begin{aligned} 1 + A\beta &= 1 + 2\times10^{5} = 200001 \\ Z_{in(f)} &= (2~\text{M}\Omega)(200001) = 400.0~\text{G}\Omega \\ Z_{out(f)} &= \frac{75~\Omega}{200001} = 375~\mu\Omega \end{aligned}\]

Follower: \(A_v = 1\), \(Z_{in} = 400~\text{G}\Omega\), \(Z_{out} = 375~\mu\Omega\).

Part (d) — what the buffer is worth

\[\begin{aligned} \text{direct:}\quad \frac{v_L}{v_s} &= \frac{R_L}{R_s + R_L} = \frac{100}{50100} = 0.001996 = -54.0~\text{dB} \\ \text{buffered:}\quad \frac{v_L}{v_s} &= \frac{100}{100 + 375~\mu\Omega} \approx 1 \end{aligned}\]

Direct connection delivers 0.200% of the source voltage (\(-54.0~\text{dB}\)); the follower delivers essentially all of it.

The follower has no voltage gain and is worth fitting anyway: its job is to convert a high source impedance into a low one so that the next stage does not load the signal away.

PROBLEM 03

Summing Amplifier and Design of a Weighted Adder

Problem Statement

An inverting summing amplifier has all its input resistors returned to the same virtual-ground node.

Three sources \(+0.2~\text{V}\), \(-0.5~\text{V}\) and \(+0.8~\text{V}\) each feed the node through \(10~\text{k}\Omega\), with \(R_f = 10~\text{k}\Omega\). Find \(v_o\).
Now \(R_f = 100~\text{k}\Omega\) and the input resistors are \(10~\text{k}\Omega\), \(20~\text{k}\Omega\) and \(50~\text{k}\Omega\), driven by \(0.1~\text{V}\), \(0.2~\text{V}\) and \(0.5~\text{V}\). Find the weights and \(v_o\).
Design. Realise \(v_o = -(2v_1 + 5v_2 + 0.5v_3)\) using \(R_f = 100~\text{k}\Omega\), with resistors from the E96 1% series. Give \(R_{comp}\) as well.
Verify the design for \(v_1 = 0.5~\text{V}\), \(v_2 = -0.2~\text{V}\), \(v_3 = 2.0~\text{V}\) and quote the error.

Solution

Ideal op-amp; the inverting node is a virtual ground, so the branches do not interact.
Superposition at the summing node: \(v_o = -R_f\sum v_k/R_k\).

Part (a) — unity-weight adder

Each source drives its own current into the node; the node cannot absorb any, so they all flow on through \(R_f\):

\[\begin{aligned} v_o &= -R_f\left(\frac{v_1}{R_1} + \frac{v_2}{R_2} + \frac{v_3}{R_3}\right) \\ &= -\frac{10~\text{k}\Omega}{10~\text{k}\Omega}(0.2 - 0.5 + 0.8)~\text{V} = -0.500~\text{V} \end{aligned}\]

\(v_o = -0.50~\text{V}\) — the inverted algebraic sum.

Part (b) — scaled adder

\[\begin{aligned} w_1 = \frac{100}{10} &= 10, \quad w_2 = \frac{100}{20} = 5, \quad w_3 = \frac{100}{50} = 2 \\ v_o &= -\left[10(0.1) + 5(0.2) + 2(0.5)\right]~\text{V} \\ &= -(1.0 + 1.0 + 1.0)~\text{V} = -3.000~\text{V} \end{aligned}\]

Weights \(10, 5, 2\); \(v_o = -3.00~\text{V}\).

Part (c) — design of the weighted adder

Each weight is \(R_f/R_k\), so invert it:

\[\begin{aligned} R_1 &= \frac{R_f}{2} = 50.0~\text{k}\Omega \;\Rightarrow\; 49.9~\text{k}\Omega \\ R_2 &= \frac{R_f}{5} = 20.0~\text{k}\Omega \;\Rightarrow\; 20.0~\text{k}\Omega \\ R_3 &= \frac{R_f}{0.5} = 200~\text{k}\Omega \;\Rightarrow\; 200~\text{k}\Omega \\ R_{comp} &= R_f \parallel R_1 \parallel R_2 \parallel R_3 = 11.759~\text{k}\Omega \;\Rightarrow\; 11.8~\text{k}\Omega \end{aligned}\]

Weight	Wanted	E96 resistor	Realised	Error
\(w_1\)	2.000	49.9 k\(\Omega\)	2.0040	0.20%
\(w_2\)	5.000	20.0 k\(\Omega\)	5.0000	0.00%
\(w_3\)	0.500	200 k\(\Omega\)	0.5000	0.00%

\(R_1 = 49.9~\text{k}\Omega\), \(R_2 = 20.0~\text{k}\Omega\), \(R_3 = 200~\text{k}\Omega\), \(R_f = 100~\text{k}\Omega\), \(R_{comp} = 11.8~\text{k}\Omega\).

Part (d) — verification

\[\begin{aligned} v_{o(\text{ideal})} &= -\left[2(0.5) + 5(-0.2) + 0.5(2.0)\right] = -1.000~\text{V} \\ v_{o(\text{actual})} &= -\left[2.0040(0.5) + 5.0000(-0.2) + 0.5000(2.0)\right] = -1.0020~\text{V} \end{aligned}\]

\(v_o = -1.002~\text{V}\) against \(-1.000~\text{V}\) ideal — an error of \(0.20\%\).

Each source sees only its own \(R_k\) as input resistance, and because the summing node never moves the channels are completely independent — that is what makes the adder useful as a mixer or a DAC ladder. The penalty is that a heavy weight demands a small input resistor and so loads its source hard.

PROBLEM 04

Difference Amplifier and CMRR Lost to Resistor Mismatch

Problem Statement

A difference amplifier is built with \(R_1 = R_3 = 10~\text{k}\Omega\) and \(R_2 = R_4 = 100~\text{k}\Omega\): \(v_1\) drives the inverting input through \(R_1\), \(R_2\) is the feedback resistor, \(v_2\) drives the non-inverting input through \(R_3\), and \(R_4\) runs from the non-inverting input to ground.

Find the differential gain and \(v_o\) for \(v_1 = 2.40~\text{V}\), \(v_2 = 2.50~\text{V}\).
Find the two single-ended input resistances and comment.
The four resistors are 1% parts. Find the worst-case CMRR of the network, in dB.
Find the common-mode error at the output and express it as a percentage of the wanted output.
What resistor tolerance would hold that error below 0.1%?

Solution

\(R_1 = R_3 = 10~\text{k}\Omega\), \(R_2 = R_4 = 100~\text{k}\Omega\), so the bridge is nominally balanced (\(R_2/R_1 = R_4/R_3\))
\(v_1 = 2.40~\text{V}\), \(v_2 = 2.50~\text{V}\)
Ideal op-amp; all error comes from the resistors.

Part (a) — differential gain

Superposition: ground \(v_2\) and the stage is an inverting amplifier; ground \(v_1\) and it is an attenuator followed by a non-inverting amplifier. With the bridge balanced the two results collapse to a clean difference:

\[\begin{aligned} v_o &= \frac{R_2}{R_1}(v_2 - v_1) = 10(v_2 - v_1) \\ v_d &= 2.50 - 2.40 = 0.10~\text{V} \\ v_o &= 10 \times 0.10~\text{V} = 1.000~\text{V} \end{aligned}\]

\(A_d = 10\), \(v_o = 1.00~\text{V}\)

Part (b) — input resistances

\[\begin{aligned} R_{in(-)} &= R_1 = 10~\text{k}\Omega \\ R_{in(+)} &= R_3 + R_4 = 110~\text{k}\Omega \end{aligned}\]

\(10~\text{k}\Omega\) and \(110~\text{k}\Omega\) — low and badly unbalanced, so any source resistance unbalances the bridge and destroys the rejection.

Part (c) — CMRR set by resistor tolerance

The rejection depends on the ratios \(R_2/R_1\) and \(R_4/R_3\) matching. With all four resistors at a fractional tolerance \(t\) the worst case is

\[\begin{aligned} \text{CMRR} &\approx \frac{1 + R_2/R_1}{4t} = \frac{1 + 10}{4(0.01)} = 275.0 \\ \text{CMRR}_{\text{dB}} &= 20\log_{10}(275.0) = 48.79~\text{dB} \end{aligned}\]

\(\text{CMRR} = 275\), only \(48.8~\text{dB}\) — set entirely by the resistors, not by the op-amp.

Part (d) — the common-mode error

\[\begin{aligned} V_{cm} &= \frac{v_1 + v_2}{2} = 2.450~\text{V} \\ A_{cm} &= \frac{A_d}{\text{CMRR}} = \frac{10}{275.0} = 0.03636 \\ V_{o(cm)} &= A_{cm}V_{cm} = 0.03636 \times 2.45~\text{V} = 89.1~\text{mV} \end{aligned}\]

\(V_{o(cm)} = 89~\text{mV}\) sitting on a wanted output of \(1.00~\text{V}\) — an error of \(8.9\%\).

Part (e) — tolerance needed for 0.1%

\[\begin{aligned} A_{cm} &\le \frac{0.001 \times 1.000~\text{V}}{2.45~\text{V}} = 0.0004082 \\ \text{CMRR} &\ge \frac{10}{0.0004082} = 24500 = 87.8~\text{dB} \\ t &\le \frac{1 + R_2/R_1}{4\,\text{CMRR}} = \frac{11}{4(24500)} = 0.000112 = 0.0112\% \end{aligned}\]

\(t \le 0.011\%\) — a 0.01% matched resistor network.

This is the whole case against the one-op-amp difference amplifier: its rejection is a resistor-matching problem, and its input resistance is low and unequal. Both faults are cured by putting buffers in front of it, which is exactly the three-op-amp instrumentation amplifier.

PROBLEM 05

Three-Op-Amp Instrumentation Amplifier and Gain Setting

Problem Statement

A three-op-amp instrumentation amplifier has two input buffers cross-coupled by \(R_G\) with feedback resistors \(R = 25~\text{k}\Omega\) each, followed by a unity-gain difference amplifier built from four equal resistors.

State the overall gain formula and evaluate it for \(R_G = 500~\Omega\).
Design. Choose \(R_G\) from the E96 series for an overall gain of \(500\), and quote the gain error.
A bridge sensor delivers \(2.00~\text{mV}\) differential on a \(2.50~\text{V}\) common-mode pedestal. Find \(v_o\).
The difference stage uses 0.01% resistors. Find the CMRR of that stage, the CMRR of the whole amplifier, and the common-mode error at the output.

Solution

First stage: \(R = 25~\text{k}\Omega\) feedback resistors, gain-setting resistor \(R_G\)
Second stage: unity-gain difference amplifier, \(R_3/R_2 = 1\), resistors matched to 0.01%
Ideal op-amps; the first stage passes common mode at unity gain.

Part (a) — the gain formula

No current enters the buffer inputs, so the whole of the differential input appears across \(R_G\) and the same current flows through both \(R\)s:

\[\begin{aligned} i &= \frac{v_2 - v_1}{R_G} \\ v_{o2} - v_{o1} &= i(R + R_G + R) = (v_2 - v_1)\left(1 + \frac{2R}{R_G}\right) \\ A_v &= \left(1 + \frac{2R}{R_G}\right)\frac{R_3}{R_2} \end{aligned}\]

\[A_v = \left(1 + \frac{2(25~\text{k}\Omega)}{500~\Omega}\right)(1) = 101\]

\(A_v = 101\) with \(R_G = 500~\Omega\).

Part (b) — design for a gain of 500

\[\begin{aligned} R_G &= \frac{2R}{A_v - 1} = \frac{50~\text{k}\Omega}{499} = 100.20~\Omega \;\Rightarrow\; 100~\Omega\ \text{(E96)} \\ A_{v(\text{actual})} &= 1 + \frac{50~\text{k}\Omega}{100~\Omega} = 501.0 \end{aligned}\]

\(R_G = 100~\Omega\) gives \(A_v = 501\), high by \(0.2\%\).

Part (c) — the sensor signal

\[v_o = A_v v_d = 501 \times 2.00~\text{mV} = 1.0020~\text{V}\]

\(v_o = 1.002~\text{V}\)

Part (d) — common-mode rejection

The first stage has unity gain for common mode (no current flows in \(R_G\) when both inputs move together), so all the rejection comes from the difference stage — but the differential signal has already been amplified, and that is what makes the overall CMRR so good:

\[\begin{aligned} \text{CMRR}_2 &= \frac{1 + R_3/R_2}{4t} = \frac{2}{4(10^{-4})} = 5000 = 74.0~\text{dB} \\ A_{cm(\text{total})} &= 1 \times \frac{1}{5000} = 0.000200 \\ \text{CMRR}_{\text{total}} &= \frac{A_v}{A_{cm}} = \frac{501}{0.000200} = 2505000 = 128.0~\text{dB} \\ V_{o(cm)} &= A_{cm}V_{cm} = 0.000200 \times 2.50~\text{V} = 0.50~\text{mV} \end{aligned}\]

\(\text{CMRR}_2 = 74.0~\text{dB}\) but \(\text{CMRR}_{\text{total}} = 128.0~\text{dB}\); the common-mode error is \(0.50~\text{mV}\), i.e. \(0.050\%\) of the signal.

Two things earn their keep here. Gain is set by the single resistor \(R_G\), which sits outside every matched pair, so trimming the gain cannot disturb the matching. And because the front end amplifies the difference while passing the common mode at unity, the overall CMRR is the difference stage's CMRR multiplied by the front-end gain — \(501\times\) here.

PROBLEM 06

Integrator — Triangular Output and the DC-Limiting Resistor

Problem Statement

An op-amp integrator has \(R = 100~\text{k}\Omega\) from the source to the inverting input and \(C = 0.01~\mu\text{F}\) from output to inverting input. The input is a \(1~\text{kHz}\) square wave switching between \(-5~\text{V}\) and \(+5~\text{V}\). The op-amp has \(V_{io} = 2~\text{mV}\), \(I_B = 80~\text{nA}\), \(I_{io} = 20~\text{nA}\) and clips at \(\pm 13~\text{V}\).

Write the ideal output expression and find the time constant.
Find the ramp rate and sketch in words the output waveform, giving its peak-to-peak amplitude.
With no DC feedback path the output drifts. Find the drift rate and how long the integrator survives before it saturates.
A resistor \(R_f = 1~\text{M}\Omega\) is placed across \(C\). Find the DC gain, the corner frequency, the bounded DC output error, and check that integration at \(1~\text{kHz}\) is still accurate.

Solution

\(R = 100~\text{k}\Omega\), \(C = 0.01~\mu\text{F}\), \(v_{in} = \pm5~\text{V}\) square at \(1~\text{kHz}\)
\(V_{io} = 2~\text{mV}\), \(I_B = 80~\text{nA}\), \(I_{io} = 20~\text{nA}\), rails \(\pm 13~\text{V}\)
Ideal op-amp otherwise; the inverting node is a virtual ground.

Part (a) — the ideal integrator

The source current \(v_{in}/R\) has nowhere to go but into \(C\), and the capacitor voltage is the output (the node is at zero):

\[\begin{aligned} \frac{v_{in}}{R} &= -C\frac{dv_o}{dt} \\ v_o(t) &= -\frac{1}{RC}\int_0^t v_{in}\,dt' + v_o(0) \\ RC &= (100~\text{k}\Omega)(0.01~\mu\text{F}) = 1.00~\text{ms} \end{aligned}\]

\(v_o = -\dfrac{1}{RC}\displaystyle\int v_{in}\,dt\) with \(RC = 1.0~\text{ms}\).

Part (b) — response to the square wave

A constant input gives a constant \(dv_o/dt\), so the output is a straight ramp that reverses each time the input reverses — a triangular wave:

\[\begin{aligned} \left|\frac{dv_o}{dt}\right| &= \frac{V_{in}}{RC} = \frac{5~\text{V}}{1.0~\text{ms}} = 5.0~\text{V/ms} \\ \frac{T}{2} &= \frac{1}{2(1~\text{kHz})} = 500~\mu\text{s} \\ \Delta v_o &= 5.0~\text{V/ms} \times 0.500~\text{ms} = 2.50~\text{V} \end{aligned}\]

A triangular wave of \(2.50~\text{V}\) peak-to-peak (\(\pm 1.250~\text{V}\)), ramping down while the input is positive.

Part (c) — drift with no DC feedback

At DC the capacitor is an open circuit, so the loop has no feedback at all: \(V_{io}\) drives a steady current \(V_{io}/R\) and \(I_B\) adds to it, and both charge \(C\) indefinitely:

\[\begin{aligned} \frac{dv_o}{dt}\bigg|_{\text{drift}} &= \frac{V_{io}}{RC} + \frac{I_B}{C} = \frac{2~\text{mV}}{1.0~\text{ms}} + \frac{80~\text{nA}}{0.01~\mu\text{F}} \\ &= 2.0~\text{V/s} + 8.0~\text{V/s} = 10.0~\text{V/s} \\ t_{\text{sat}} &= \frac{13~\text{V}}{10.0~\text{V/s}} = 1.30~\text{s} \end{aligned}\]

The output ramps into the rail in about \(1.3~\text{s}\) with no signal applied at all.

Part (d) — the practical integrator

\[\begin{aligned} A_{DC} &= -\frac{R_f}{R} = -\frac{1~\text{M}\Omega}{100~\text{k}\Omega} = -10 \\ f_c &= \frac{1}{2\pi R_f C} = \frac{1}{2\pi(10^{6})(10^{-8})} = 15.92~\text{Hz} \\ V_{o(\text{DC})} &= V_{io}\left(1 + \frac{R_f}{R}\right) + I_{io}R_f = 22~\text{mV} + 20~\text{mV} = 42~\text{mV} \end{aligned}\]

(The offset current is used in the last term because a compensating resistor \(R \parallel R_f\) is assumed at the non-inverting input.) The circuit integrates properly only well above \(f_c\). At the signal frequency

\[\frac{f}{f_c} = \frac{1000}{15.92} = 62.8, \qquad \text{amplitude error} = 1 - \frac{1}{\sqrt{1 + (f_c/f)^2}} = 0.0127\%\]

\(A_{DC} = -10\), \(f_c = 15.9~\text{Hz}\), DC output bounded at \(42~\text{mV}\), and the \(1~\text{kHz}\) integration is in error by only \(0.013\%\).

\(R_f\) is a compromise, and the ratio \(f/f_c\) is the figure of merit: it must be large enough that the stage still integrates, and small enough that the DC gain stays bounded. A factor of \(63\) as here is comfortable.

PROBLEM 07

Differentiator — Square Output and the Stabilising Resistor

Problem Statement

A differentiator has \(C = 0.01~\mu\text{F}\) in series with the inverting input and \(R_f = 100~\text{k}\Omega\) as the feedback resistor.

Write the ideal output expression and evaluate the time constant.
The input is a \(1~\text{kHz}\) triangular wave of \(2.0~\text{V}\) peak-to-peak. Find the output waveform and its amplitude.
The input is instead a \(0.5~\text{V}\) peak sine at \(1~\text{kHz}\). Find the output amplitude and phase.
A resistor \(R_1 = 1~\text{k}\Omega\) is added in series with \(C\). Find the high-frequency gain limit and the corner frequency, say why the resistor is needed, and quote the error it introduces at \(1~\text{kHz}\).

Solution

\(C = 0.01~\mu\text{F}\), \(R_f = 100~\text{k}\Omega\)
Signals: \(2.0~\text{V}\) peak-to-peak triangle and \(0.5~\text{V}\) peak sine, both at \(1~\text{kHz}\)
Ideal op-amp; virtual ground at the inverting input.

Part (a) — the ideal differentiator

The capacitor current is \(C\,dv_{in}/dt\) and it all flows through \(R_f\):

\[\begin{aligned} v_o &= -R_f C\frac{dv_{in}}{dt} \\ R_f C &= (100~\text{k}\Omega)(0.01~\mu\text{F}) = 1.00~\text{ms} \end{aligned}\]

\(v_o = -R_fC\,dv_{in}/dt\) with \(R_fC = 1.0~\text{ms}\).

Part (b) — triangular input

A triangle has a constant slope of one sign for half a period and the opposite sign for the next, so the derivative is a square wave:

\[\begin{aligned} \left|\frac{dv_{in}}{dt}\right| &= \frac{V_{pp}}{T/2} = \frac{2.0~\text{V}}{500~\mu\text{s}} = 4.0~\text{V/ms} \\ |v_o| &= R_fC\left|\frac{dv_{in}}{dt}\right| = (1.0~\text{ms})(4.0~\text{V/ms}) = 4.00~\text{V} \end{aligned}\]

A square wave of \(\pm4.00~\text{V}\) (\(8.00~\text{V}\) peak-to-peak), negative while the input ramps up.

Part (c) — sinusoidal input

\[\begin{aligned} v_{in} &= 0.5\sin(2\pi \cdot 1000\,t)~\text{V} \\ v_o &= -R_fC\,\omega V_{pk}\cos(\omega t) \\ |v_o| &= (1.0\times10^{-3})(2\pi \cdot 10^{3})(0.5) = 3.1416~\text{V} \end{aligned}\]

\(v_o = -3.142\cos\omega t~\text{V}\), i.e. \(3.142~\text{V}\) peak lagging the input by \(90^\circ\) — the \(+90^\circ\) of differentiation plus the \(180^\circ\) of inversion. The gain rises at \(20~\text{dB/decade}\), so this is a high-pass response.

Part (d) — the practical differentiator

\[\begin{aligned} |A_v|_{\text{HF}} &= \frac{R_f}{R_1} = \frac{100~\text{k}\Omega}{1~\text{k}\Omega} = 100 \\ f_c &= \frac{1}{2\pi R_1 C} = \frac{1}{2\pi(10^{3})(10^{-8})} = 15.92~\text{kHz} \end{aligned}\]

Without \(R_1\) the noise gain climbs at \(+20~\text{dB/decade}\) while the open-loop gain falls at \(-20~\text{dB/decade}\); they close at \(40~\text{dB/decade}\), which is a recipe for ringing or oscillation, and the stage amplifies high-frequency noise without limit. \(R_1\) flattens the noise gain above \(f_c\) and restores a well-behaved \(20~\text{dB/decade}\) closure.

\[\text{error at }1~\text{kHz} = 1 - \frac{1}{\sqrt{1 + (f/f_c)^2}} = 1 - \frac{1}{\sqrt{1 + (1/15.92)^2}} = 0.197\%\]

\(|A_v|_{\text{HF}} = 100\), \(f_c = 15.9~\text{kHz}\), and the \(1~\text{kHz}\) output is low by only \(0.20\%\).

The integrator and the differentiator are duals, and so are their practical fixes: the integrator needs \(R_f\) across \(C\) to stop the gain rising without limit at DC, the differentiator needs \(R_1\) in series with \(C\) to stop it rising without limit at high frequency.

PROBLEM 08

Design — A Complete Bridge Sensor Signal Chain

Problem Statement

Design. A bridge sensor produces a differential output of \(-10~\text{mV}\) to \(+10~\text{mV}\) sitting on a \(2.5~\text{V}\) common-mode pedestal. It must be conditioned to drive an ADC that wants \(0.5~\text{V}\) to \(4.5~\text{V}\), with the signal band limited to about \(100~\text{Hz}\). A \(-5.00~\text{V}\) reference is available. Use:

a three-op-amp instrumentation amplifier with \(R = 24.9~\text{k}\Omega\) feedback resistors and a unity-gain difference stage matched to 0.01%, gain set by \(R_G\);
an inverting summing stage with \(R_{in} = 10~\text{k}\Omega\) for the signal and a second input from the reference through \(R_b\), to supply both the remaining gain and the level shift;
a capacitor across the summing stage's feedback resistor for the \(100~\text{Hz}\) roll-off.

Work out the overall gain, choose every component from the E96 (resistors) and E12 (capacitors) series, verify the three end points, and check the common-mode error.

Solution

Input span \(\pm 10~\text{mV}\) differential, \(V_{cm} = 2.50~\text{V}\)
Output span \(0.5\)–\(4.5~\text{V}\) (mid-scale \(2.50~\text{V}\)), corner \(100~\text{Hz}\)
\(V_{ref} = -5.00~\text{V}\); instrumentation-amp \(R = 24.9~\text{k}\Omega\), difference stage matched to 0.01%

Step 1 — total gain and where to put it

\[\begin{aligned} A_{\text{total}} &= \frac{4.5 - 0.5~\text{V}}{20~\text{mV}} = 200 \\ \text{split as } A_1 &\approx 50 \text{ (in-amp)},\quad A_2 \approx 4.00 \text{ (summing stage)} \end{aligned}\]

Most of the gain goes in front, where it lifts the signal clear of the second stage's own offset and where it multiplies the difference stage's CMRR.

Step 2 — the instrumentation-amplifier gain resistor

\[\begin{aligned} R_G &= \frac{2R}{A_1 - 1} = \frac{2(24.9~\text{k}\Omega)}{49} = 1016.3~\Omega \;\Rightarrow\; 1020~\Omega\ \text{(E96)} \\ A_1 &= 1 + \frac{49.8~\text{k}\Omega}{1020~\Omega} = 49.8235 \end{aligned}\]

Step 3 — the summing stage: gain and level shift

The stage forms \(v_o = -\dfrac{R_f}{R_{in}}v_1 - \dfrac{R_f}{R_b}V_{ref}\). The first term supplies the remaining gain; the second, with a negative reference, supplies a positive pedestal:

\[\begin{aligned} A_2 &= \frac{A_{\text{total}}}{A_1} = \frac{200}{49.8235} = 4.0142 \\ R_f &= A_2 R_{in} = 40.142~\text{k}\Omega \;\Rightarrow\; 40.2~\text{k}\Omega\ \text{(E96)} \\ R_b &= \frac{|V_{ref}|R_f}{V_{\text{mid}}} = \frac{(5.00)(40.2~\text{k}\Omega)}{2.50~\text{V}} = 80.4~\text{k}\Omega \;\Rightarrow\; 80.6~\text{k}\Omega\ \text{(E96)} \\ V_{\text{offset}} &= \frac{(5.00)(40.2)}{80.6} = 2.4938~\text{V} \end{aligned}\]

\[R_{comp} = R_f \parallel R_{in} \parallel R_b = 7.284~\text{k}\Omega \;\Rightarrow\; 7.32~\text{k}\Omega\ \text{(E96)}\]

Step 4 — the band-limiting capacitor

\[\begin{aligned} C &= \frac{1}{2\pi f_c R_f} = \frac{1}{2\pi(100~\text{Hz})(40.2~\text{k}\Omega)} = 39.6~\text{nF} \;\Rightarrow\; 39~\text{nF (E12)} \\ f_c &= \frac{1}{2\pi(40.2~\text{k}\Omega)(39~\text{nF})} = 101.5~\text{Hz} \end{aligned}\]

Step 5 — end-point check

\(v_d\)	In-amp output	Final output	Target
\(-10~\text{mV}\)	-0.4982 V	4.4967 V	4.500 V
\(0\)	0.0000 V	2.4938 V	2.500 V
\(+10~\text{mV}\)	0.4982 V	0.4909 V	0.500 V

\[\begin{aligned} \text{span} &= 4.4967 - 0.4909 = 4.0058~\text{V} \quad(0.145\%\ \text{error}) \\ \text{mid-scale} &= 2.4938~\text{V} \quad(-0.248\%\ \text{error}) \end{aligned}\]

Step 6 — common-mode error

\[\begin{aligned} \text{CMRR}_{\text{diff stage}} &= \frac{2}{4(10^{-4})} = 5000 \\ \text{CMRR}_{\text{in-amp}} &= A_1 \times 5000 = 249118 = 107.9~\text{dB} \\ V_{o(cm)} &= \frac{V_{cm}}{\text{CMRR}_{\text{diff stage}}} \times A_2 = \frac{2.50~\text{V}}{5000} \times 4.02 = 2.01~\text{mV} \end{aligned}\]

\(R_G = 1020~\Omega\), \(R_{in} = 10~\text{k}\Omega\), \(R_f = 40.2~\text{k}\Omega\), \(R_b = 80.6~\text{k}\Omega\), \(R_{comp} = 7.32~\text{k}\Omega\), \(C = 39~\text{nF}\). Span error \(0.15\%\), mid-scale error \(-0.25\%\), common-mode error \(2.0~\text{mV}\) (\(0.050\%\) of span), corner \(102~\text{Hz}\).

Two details worth keeping. The summing stage inverts, so the chain as drawn runs backwards — swap the two sensor connections at the in-amp input to restore polarity, which costs nothing. And the level shift is done by summing a reference at the same virtual-ground node that already carries the signal: no extra amplifier, and the shift is set by a resistor ratio, so it tracks as well as the gain does.