Worked problems on half-wave, centre-tapped and bridge rectifiers: DC and rms output, ripple factor, form factor, rectification efficiency, PIV, transformer utilisation factor, the cost of the silicon diode drop, a transformer/diode design, and regulation when the winding and diode resistances are not negligible.
Each problem below is solved in full — the given data is listed first, the governing relation is stated, and the arithmetic is carried through to a boxed answer. Work through the statement yourself before opening the solution. The underlying theory is covered in the Electronic Devices lecture series.
Half-Wave Rectifier Figures of Merit
A half-wave rectifier is fed from a transformer whose secondary delivers \( 24~\text{V} \) rms at \( 50~\text{Hz} \). The load is a pure resistance \( R_L = 500~\Omega \) and the diode may be treated as ideal.
Find the peak, DC and rms load voltages.
Find \( I_{dc} \) and \( I_{rms} \).
Find the form factor and the ripple factor.
Find the rectification efficiency and the peak inverse voltage.
Secondary voltage \( V_s = 24~\text{V} \) (rms), \( f = 50~\text{Hz} \)
\( R_L = 500~\Omega \), ideal diode \( (V_D = 0,\; r_f = 0) \)
Step 1 — Peak values
The secondary rms value is converted to a peak, and the peak load current follows from Ohm's law.
Step 2 — DC and rms values
A half-wave waveform is one sine loop per period, so the average is \( V_m/\pi \) and the rms is \( V_m/2 \) (not \( V_m/\sqrt{2} \) — half the period is zero).
(a) \( V_m = 33.9~\text{V} \), \( V_{dc} = 10.8~\text{V} \), \( V_{rms} = 17~\text{V} \)
(b) \( I_{dc} = 21.6~\text{mA} \), \( I_{rms} = 33.9~\text{mA} \)
Step 3 — Form factor and ripple factor
(c) \( \text{FF} = 1.571 \), ripple factor \( r = 1.211 \) i.e. \( 121\% \)
Step 4 — Efficiency and PIV
Efficiency is the ratio of DC power in the load to the total power delivered to it.
When the diode is off, the whole secondary peak appears across it while the load sits at 0 V, so \( \text{PIV} = V_m \).
(d) \( \eta = 40.5\% \), \( \text{PIV} = 33.9~\text{V} \)
A ripple factor of 1.21 means the ripple is larger than the DC it rides on — a half-wave rectifier is useless without a filter, and its \( 40.5\% \) ceiling on efficiency is a property of the waveform, not of the diode.
Effect of the 0.7 V Diode Drop
A half-wave rectifier uses a silicon diode \( (V_D = 0.7~\text{V}) \) fed from a \( 12~\text{V} \) rms secondary into \( R_L = 1~\text{k}\Omega \).
Find \( V_{dc} \) using the usual approximation \( V_{dc} = (V_m - V_D)/\pi \), and compare with the ideal-diode answer.
The diode does not conduct for the full half cycle. Find the conduction angle and the exact \( V_{dc} \) obtained by averaging only over the conduction interval.
Is the approximation of part (a) safe here?
\( V_s = 12~\text{V} \) rms \( \Rightarrow V_m = \sqrt{2}\times 12 = 17~\text{V} \)
\( V_D = 0.7~\text{V} \) (constant-voltage-drop model), \( R_L = 1~\text{k}\Omega \)
Step 1 — Approximate DC output
Subtract the drop from the peak, then average as if the loop were still a full half sine.
With an ideal diode the same circuit would give \( V_m/\pi = 5.4~\text{V} \), so the drop costs \( 4.12\% \) of the output.
(a) \( V_{dc} \approx 5.18~\text{V} \) versus \( 5.4~\text{V} \) for an ideal diode
Step 2 — Conduction angle
The diode turns on only once \( V_m\sin\theta \) exceeds \( V_D \).
Step 3 — Exact average
Average \( (V_m\sin\theta - V_D) \) over \( \theta_1 \to \pi-\theta_1 \) and divide by the full period \( 2\pi \).
(b) Conduction angle \( = 175.3^\circ \), exact \( V_{dc} = 5.06~\text{V} \), \( I_{dc} = 5.06~\text{mA} \)
Step 4 — Verdict
The two answers differ by \( 0.123~\text{V} \), i.e. the simple formula runs \( 2.42\% \) high. The reason is visible in the algebra: the approximation removes only \( V_D/\pi = 0.223~\text{V} \) from the average, whereas the diode actually removes \( V_D(\pi - 2\theta_1)/2\pi = 0.341~\text{V} \) — close to \( V_D/2 \), because the drop is present only while the diode conducts.
(c) Acceptable for engineering work — the error is \( 2.42\% \) here and shrinks as \( V_m/V_D \) grows, but it becomes serious for a low-voltage secondary of only a few volts.
Note the PIV is unchanged at \( V_m = 17~\text{V} \): on the negative half cycle the load carries no current, so the entire secondary voltage stands across the diode.
Centre-Tapped Full-Wave Rectifier and Its PIV
A centre-tapped full-wave rectifier uses a transformer with \( 18\text{-}0\text{-}18~\text{V} \) rms secondary (\( 18~\text{V} \) rms from the tap to each end) and two silicon diodes. \( R_L = 100~\Omega \), \( f = 50~\text{Hz} \).
Find \( V_{dc} \), \( I_{dc} \) and \( I_{rms} \).
Find the ripple factor and the rectification efficiency.
Find the PIV of each diode and explain why it is \( 2V_m \) and not \( V_m \).
Each half secondary: \( 18~\text{V} \) rms \( \Rightarrow V_m = \sqrt{2}\times 18 = 25.5~\text{V} \)
One diode in the conduction path at a time \( \Rightarrow \) one drop, \( V_D = 0.7~\text{V} \)
\( R_L = 100~\Omega \), ripple frequency \( = 2f = 100~\text{Hz} \)
Step 1 — Peak load quantities
Step 2 — DC and rms values
Both half cycles now reach the load, so the average doubles relative to half-wave and the rms becomes the full-sine value \( I_m/\sqrt{2} \).
(a) \( V_{dc} = 15.8~\text{V} \), \( I_{dc} = 158~\text{mA} \), \( I_{rms} = 175~\text{mA} \)
Step 3 — Ripple factor and efficiency
(b) \( r = 0.483 \; (48.3\%) \), \( \eta = 81.1\% \)
Step 4 — Peak inverse voltage
Take the instant when the upper half of the secondary is at \( +V_m \). Diode \( D_1 \) conducts, so the cathode of the off diode \( D_2 \) sits at \( V_m - V_D \) (the load voltage). But \( D_2 \)'s anode is tied to the lower end of the secondary, which is at \( -V_m \) with respect to the tap. The reverse voltage across \( D_2 \) is therefore the whole secondary, end to end.
(c) \( \text{PIV} \approx 2V_m = 50.9~\text{V} \) (exactly \( 50.2~\text{V} \) with the conducting diode's drop counted)
This doubled PIV is the price of the centre tap: each half winding is idle for half the cycle (rms current only \( I_m/2 = 124~\text{mA} \) per half), and the diodes must be rated for twice the peak the bridge demands.
Bridge Versus Centre-Tap: TUF and PIV
The same \( 18~\text{V} \) rms secondary is used in two ways: (i) as a single winding feeding a silicon bridge rectifier, and (ii) as an \( 18\text{-}0\text{-}18~\text{V} \) centre-tapped winding feeding two diodes. \( R_L = 100~\Omega \) in both cases.
Find \( V_{dc} \) and the PIV for the bridge.
Derive the transformer utilisation factor for the bridge and for the centre-tapped secondary, and state the form factor of a full-wave output.
Tabulate the comparison and say when each topology is preferred.
\( V_m = \sqrt{2}\times 18 = 25.5~\text{V} \) (peak of the winding used)
Bridge: two diodes conduct in series each half cycle \( \Rightarrow 2V_D = 1.4~\text{V} \)
Centre tap: one diode conducts \( \Rightarrow V_D = 0.7~\text{V} \), but only half the winding is used
Step 1 — Bridge output
When a bridge diode is reverse biased, its two conducting partners clamp it across the load, so it sees only the peak load voltage plus one forward drop:
(a) Bridge: \( V_{dc} = 15.3~\text{V} \), \( \text{PIV} \approx V_m = 25.5~\text{V} \)
Step 2 — Transformer utilisation factor
\( \text{TUF} = P_{dc}/(\text{VA rating of the winding}) \). For the bridge the secondary carries a full sine, \( I_{rms} = I_m/\sqrt{2} \):
For the centre tap each half winding conducts only alternate half cycles, so its rms current is \( I_m/2 \) and the total secondary VA is \( 2\times(V_m/\sqrt2)(I_m/2) \):
Form factor of any full-wave sine output:
(b) \( \text{TUF}_{\text{bridge}} = 0.811 \), \( \text{TUF}_{\text{centre-tap}} = 0.692 \), \( \text{FF} = 1.111 \)
Step 3 — Comparison
| Quantity | Centre-tapped FW | Bridge |
|---|---|---|
| Diodes | 2 | 4 |
| Winding needed | 18-0-18 V | 18 V |
| Drops in series | 1 \( (0.7~\text{V}) \) | 2 \( (1.4~\text{V}) \) |
| \( V_{dc} \) here | \( 15.8~\text{V} \) | \( 15.3~\text{V} \) |
| PIV | \( 2V_m = 50.9~\text{V} \) | \( V_m = 25.5~\text{V} \) |
| TUF | \( 0.692 \) | \( 0.811 \) |
| Ripple factor | \( 0.483 \) (same waveform) | |
| \( \eta_{max} \) | \( 81.1\% \) | |
(c) The bridge gives \( 1.17\times \) better copper utilisation and half the PIV, at the cost of \( 0.446~\text{V} \) more DC output lost in the extra diode drop.
Rule of thumb: use the bridge for anything above about 12 V DC, where an extra 0.7 V is negligible; use the centre tap for low-voltage supplies where that 0.7 V is a large fraction of the output.
Design of a 12 V Bridge Rectifier
Design. A silicon bridge rectifier working from the \( 230~\text{V} \), \( 50~\text{Hz} \) mains must deliver \( 12~\text{V} \) DC into a resistive load drawing \( 500~\text{mA} \). No filter is used.
Choose the transformer secondary voltage and the turns ratio.
Specify the average forward current, rms current and PIV each diode must withstand, and pick a standard rectifier from the 1N400x family.
Find the power dissipated in each diode and the secondary VA rating required.
Required \( V_{dc} = 12~\text{V} \) at \( I_{dc} = 500~\text{mA} \Rightarrow R_L = 24~\Omega \)
Bridge \( \Rightarrow \) two silicon drops in the conduction path, \( 2V_D = 1.4~\text{V} \)
Mains \( 230~\text{V} \) rms primary, \( f = 50~\text{Hz} \)
Step 1 — Work backwards from the DC specification
Invert \( V_{dc} = 2(V_m - 2V_D)/\pi \) to find the peak the load must see, then add the diode drops back to get the secondary peak.
The nearest standard secondary is \( 15~\text{V} \) rms, for which \( n = 230/15 = 15.3:1 \) and the delivered output becomes
(a) Ideal secondary \( = 14.3~\text{V} \) rms (\( n = 16.1:1 \)); specify the standard \( 15~\text{V} \) secondary, \( n = 15.3:1 \), giving \( 12.6~\text{V} \) DC.
Step 2 — Diode ratings
Each diode conducts on alternate half cycles, so it carries half the load's average current; the rms current in a diode is the half-wave value \( I_m/2 \).
Applying the usual \( 2\times \) safety margin on both current and voltage gives \( \ge 0.5~\text{A} \) and \( \ge 40.5~\text{V} \).
(b) \( I_{F(av)} = 250~\text{mA} \), \( \text{PIV} = 19.5~\text{V} \) → a 1N4001 (\( 1~\text{A} \), \( 50~\text{V} \)) is comfortably adequate.
Step 3 — Dissipation and transformer VA
(c) \( P_D = 175~\text{mW} \) per diode; secondary rating \( \approx 7.95~\text{VA} \) — specify a \( 15~\text{V} \), \( 1~\text{A} \) transformer.
Sanity check on the utilisation: the winding is rated \( 7.95~\text{VA} \) to deliver \( V_{dc}I_{dc} = 6~\text{W} \), a ratio of \( 0.755 \). That sits a little under the ideal bridge TUF of \( 0.811 \), as it must once the \( 2V_D \times I_{dc} = 0.7~\text{W} \) dissipated in the diode drops is taken out of the winding's output.
Voltage Regulation with Finite Source Resistance
A centre-tapped full-wave rectifier has \( V_m = 30~\text{V} \) peak per half secondary. The half-winding resistance is \( r_s = 2~\Omega \) and each diode has a forward (bulk) resistance \( r_f = 1.5~\Omega \). Model the diodes as ideal switches in series with \( r_f \) — the \( 0.7~\text{V} \) offset is neglected so the regulation caused by the resistances alone is isolated. \( R_L = 50~\Omega \).
Find \( I_{dc} \) and the full-load DC output voltage.
Find the percentage voltage regulation and confirm it against \( \%\text{Reg} = (r_f + r_s)/R_L \).
Find the rectification efficiency, and recompute the regulation if the load is changed to \( 25~\Omega \).
\( V_m = 30~\text{V} \), \( r_s = 2~\Omega \), \( r_f = 1.5~\Omega \), \( R_L = 50~\Omega \)
Full wave \( \Rightarrow I_{dc} = 2I_m/\pi \) with \( I_m = V_m/(R_L + r_f + r_s) \)
Step 1 — Peak and DC current
The winding and diode resistances are in series with the load throughout conduction, so they simply add to \( R_L \).
(a) \( I_{dc} = 357~\text{mA} \), \( V_{dc} = 17.8~\text{V} \)
Step 2 — Regulation
At no load no current flows, so nothing is dropped in \( r_f + r_s \) and the output rises to the ideal value.
Check with the closed form. Since \( V_{dc} = 2V_m/\pi - I_{dc}(r_f+r_s) \), the rectifier behaves as an ideal \( 2V_m/\pi \) source behind \( (r_f + r_s) \):
(b) \( \%\text{Reg} = 7\% \) — both routes agree.
Step 3 — Efficiency, and a heavier load
(c) \( \eta = 75.8\% \) (below the \( 81.1\% \) ideal); halving \( R_L \) doubles the regulation to \( 14\% \).
Regulation is inversely proportional to \( R_L \): the heavier the load, the worse the droop. Good regulation therefore demands \( r_f + r_s \ll R_L \), which is why mains supplies use fat secondary wire and low-\( r_f \) rectifiers.