Power Diode Characteristics and Reverse Recovery

Slope and intercept. Two points define the line:

At a steady 30 A the average and RMS coincide, so the two loss terms combine into the obvious product:

The pulsed case is where the model earns its keep. The two currents now differ:

Both diodes carry 20 A on average, yet the pulsed one dissipates 27 W against the steady one’s 19 W — a 42% penalty bought entirely by the resistive term responding to the RMS.

Now try to fit an exponential. With \(v_F = nV_T\ln\left(i_F/I_S\right)\), taking the difference of the two points eliminates \(I_S\):

Read what that number means. The ideality factor of a real junction lies between 1 and 2. A fitted value of 9.6 says the exponential is not describing this data at all: between 10 and 50 A the diode’s voltage is rising almost linearly with current, because it is dominated by ohmic drop in the drift region and the contacts — not by the junction.

This is the justification for the whole piecewise-linear approach. The exponential governs microamps to milliamps; at tens of amps a power diode is a battery in series with a resistor, and modelling it as anything else is wasted effort.

The two relations come from one triangle. The current falls through zero at the applied slope and continues to \(-I_{RM}\), so \(I_{RM} = (di/dt)t_a\). With abrupt recovery the whole charge is in that first segment, \(Q_{rr} = \tfrac12 I_{RM}t_a\). Eliminating \(t_a\):

The standard diode:

The fast diode, with fifteen times less stored charge:

Both scale as \(\sqrt{Q_{rr}}\), so a 15× reduction in charge buys only a 3.9× reduction in peak current and duration. Recovery is stubborn.

The incoming switch carries the sum:

Recovery loss. The charge is removed while the switch stands off the full link:

Here the loss is proportional to \(Q_{rr}\), so the 15× improvement transfers in full. The current spike scales as a square root; the energy scales linearly.

Doubling the \(di/dt\) to 40 A/µs, by using a stronger gate drive:

Switching faster shortens the event but raises the spike, and since \(E_{rr} = Q_{rr}V_{dc}\) is unchanged, the energy is the same. Fast gate drive reduces the overlap loss of the switch but does nothing about recovery — and makes the peak current worse.

Where the overshoot comes from. Once the recovery current is falling, the stray inductance in the commutation loop opposes the change and adds its own voltage to the link. The rate that matters is the return, not the initial fall:

The snappy device:

The soft device, with the same stored charge released twelve times more gently:

Identical \(Q_{rr}\), identical \(I_{RM}\), identical recovery energy — and a twelvefold difference in peak voltage. Softness is not a refinement of the recovery specification; it is a separate specification.

Voltage rating. Applying the customary 100% margin to the worst case:

A snappy diode does not merely ring — it pushes the whole design into the next voltage class, and higher-voltage silicon has a higher forward drop, so the conduction loss rises too.

Snubber design. The energy trapped in the stray inductance at the moment of the snap must go somewhere; an RC snubber gives it a capacitor to charge instead of a voltage to build:

What the snubber costs. That capacitor is charged to the link voltage and discharged through the resistor once per cycle:

Compare the alternative: fitting the soft-recovery diode costs 0 W and needs no components. The snubber is the right answer when the device is already chosen and the layout cannot be improved — it is rarely the right answer when the diode can still be changed.

What each diode actually sees. With a highly inductive load the DC current is smooth, and each diode of the bridge conducts it for a full half cycle — a rectangular pulse of 25 A at \(D = 0.5\):

Note that the RMS is not 12.5 A. The ratio is \(1/\sqrt{D} = 1.414\), exactly as in Set 1.

Peak inverse voltage. The blocked diode stands off the full supply peak:

For a bridge, not \(2V_m\) — that figure belongs to the centre-tapped rectifier, and confusing the two doubles the cost of the device.

Dissipation per diode, both terms:

Output voltage. The ideal average of a full-wave rectified sine:

Two diodes are always in the path, so subtract two forward drops evaluated at 25 A:

Check the power balance:

A line-frequency rectifier is a very efficient thing, because there is no switching loss at all — the diodes commutate naturally at a zero crossing. Every percent lost in Part 2 of the book is a conduction percent.

Device selection. Apply the usual margins — roughly 100% on voltage for line transients, and enough current headroom to survive at temperature:

A 600–800 V, 25 A bridge module. Note that the datasheet \(I_{F(AV)}\) is quoted at a stated case temperature; at a realistic 100 °C it may be half the headline figure, which is where the 2× current derating comes from.

Why series diodes share badly. In series they must carry the same total current. A diode with lower leakage needs more reverse voltage to pass that current, so it takes the larger share — and being more stressed, it is the one nearer to breakdown.

Here \(D_1\), at 15 mA, is the more stressed device.

Add a resistor across each diode and write the node condition. The total current down the string is the same at both stages:

With \(V_1 = 2000\) V and \(V_2 = 1000\) V:

The price of that sharing:

Now demand better sharing — hold \(D_1\) to 1.8 kV, a 10% derating:

Tighter sharing needs a smaller resistor, and a smaller resistor burns more power: 23.4 W against 15.0 W for a 200 V improvement in balance. There is no free sharing — only a choice of where to pay.

Parallel diodes. In parallel the two devices are forced to the same voltage, and the one with the lower offset hogs the current:

A ratio of 1.53:1 from a 100 mV mismatch. Diode 1 carries 21% more than its fair share, runs hotter, and — because a diode’s forward drop falls with temperature — then takes even more. Parallel diodes are thermally unstable in a way that parallel MOSFETs are not.

Force sharing with series resistors. Adding \(R_s = 10\ \text{m}\Omega\) to each branch simply adds to the slope:

The ratio improves from 1.53:1 to 1.20:1. The mechanism is worth stating plainly: the mismatch is a fixed voltage, so raising the slope of the characteristic reduces the current it produces.

The cost of that too:

Which is why a single larger diode is preferred whenever one exists. Paralleling is for when it does not.

The diode’s average current in a boost is the load current. It carries the full inductor current \(I_L = I_o/(1-D) = 10\) A, but only for the fraction \((1-D) = 0.5\):

This is a general result for the boost, and a useful check: whatever leaves through the diode must be what the load takes.

Conduction loss follows the average, so the SiC device — with the higher forward drop — starts behind:

Recovery loss at 60 kHz, paid by the MOSFET at the full output voltage:

A SiC Schottky is not perfectly charge-free: it has a junction capacitance that must still be charged to the output voltage each cycle. That charge is independent of temperature and current, which is its real advantage — silicon’s \(Q_{rr}\) roughly doubles from 25 to 125 °C.

Totals at 60 kHz — and it is close:

At 60 kHz the SiC wins by 0.3 W — within the tolerance of the forward drops, so effectively a tie. At 150 kHz it wins by 3.0 W, which is decisive.

Find the crossover explicitly. Equate the two totals as functions of frequency:

Below 50 kHz the silicon diode’s lower forward drop wins; above it, the absence of stored charge does. The same structure as Problem 2 of Set 2 — a fixed penalty against a penalty that scales — with frequency in place of current.

What the loss comparison leaves out. Three things push the crossover lower than 50 kHz in practice:

None of these appear in the two-line loss comparison, and all of them favour the SiC device. The arithmetic identifies the region where the choice is genuinely open; it does not settle it.