Conduction and Switching Losses

The waveform is a trapezoid, not a rectangle. Each MOSFET carries the inductor current, which ramps from \(I_o-\Delta I_L/2 = 17\) A to \(I_o+\Delta I_L/2 = 23\) A, but only for its own conduction interval:

How much did the ripple matter? Dropping the \(\Delta I_L^2/12\) term gives \(I_o\sqrt{D} = 10.00\) A against 10.04 A — an error of 0.4% in current and 0.8% in loss.

This is worth proving once. A 30% ripple ratio sounds large, but it enters as \(\Delta I^2/12\) against \(I_o^2\), i.e. 3 against 400. For any sane design the ripple term is ignorable — and now you know why rather than merely that.

High-side conduction, cold and hot. The channel is a resistor, so the RMS is the current that counts:

A 70% increase, from temperature alone. A datasheet \(R_{DS(on)}\) quoted at 25 °C is a number the device will never show you in service.

Total conduction loss at temperature:

The low-side device dissipates three times the high-side, purely because it conducts for three times as long. In a low duty-ratio converter it is the synchronous rectifier that deserves the larger die.

The Schottky alternative. A junction device holds a roughly fixed voltage, so its loss follows the average current, not the RMS:

Against 4.11 W for the MOSFET — the synchronous rectifier saves 4.9 W here. Note the structural difference: the diode’s loss is linear in current while the MOSFET’s is quadratic, which is exactly the competition Problem 2 resolves.

Both currents are needed, so compute both. For a rectangular pulse of amplitude \(I\) and duty \(D\):

The diode has a term for each. Its offset voltage sees the average current; its bulk resistance sees the RMS:

The MOSFET has only one term:

The MOSFET wins here despite having the larger resistance, because it carries no fixed offset.

The crossover. Setting the two equal for a general pulse amplitude \(I\), the duty ratio appears in every term and cancels only if we work with the peak. Writing both losses at the same \(D\):

Below 80 A the MOSFET is the better conductor; above it the diode is, because a quadratic eventually overtakes a line whatever its intercept. This is why very high-current, low-voltage rectification uses MOSFETs and very high-voltage rectification does not.

The consequence of using the wrong current. Evaluating the diode’s resistive term with \(I_{avg}\):

A 25% underestimate, and one that happens to land exactly on the MOSFET’s figure — so the error would also reverse the design decision. The ratio \(I_{rms}^2/I_{avg}^2 = 1/D\) is the whole of the mistake, and it grows without bound as the pulse narrows.

The two overlap terms, as in Set 1:

The diode does not stop conducting when the current reaches zero. Its stored charge must be swept out first, and that reverse current flows through the incoming MOSFET. Approximating the recovery as a triangle of base \(t_{rr}\):

The switch momentarily carries 2.3 times the load current. A device chosen on the 30 A load rating alone would be operating far outside its safe area every single cycle.

The recovery energy. All of that charge is moved while the MOSFET still holds off the full link voltage, so to a first approximation:

Compare that with the 300 µJ of genuine turn-on overlap: the diode costs the MOSFET more than five times what its own transition does.

Total switching loss:

Recovery accounts for \(1600/2320 = 69\%\) of it.

With a silicon-carbide Schottky. A majority-carrier device stores no minority charge, so \(E_{rr}\to0\) and only the overlap terms remain:

A saving of 32 W by changing one passive-looking component — and the peak switch current falls back to 30 A, allowing a smaller MOSFET as well. Set 3, Problem 6 works out when that trade stops paying.

Duty ratio and the five terms. With \(D = 5/12 = 0.4167\):

Full-load total, against \(P_o = (5)(10) = 50\) W:

Read the middle column before the bottom row. The efficiencies are nearly equal, but for completely different reasons. At full load 63% of the loss is conduction; at 10% load 94% of it is switching and gate drive. The same number, produced by a different machine.

This is why an efficiency figure quoted without a load point is worthless, and why converter datasheets plot \(\eta\) against \(I_o\) rather than tabulating it.

Where the fixed loss takes over. All three conduction terms sum to \(1.209\) W at 10 A, i.e. \(0.01209 I_o^2\). Setting that equal to the constant gate-drive loss:

Below roughly 3 A the converter spends more energy turning its transistors on and off than it does pushing current through them.

What to do about it. Gate-drive and switching loss are both proportional to \(f_s\) and independent of — or only linear in — \(I_o\). The remedy is therefore to stop switching so often at light load:

That is precisely what pulse-skipping and burst-mode controllers do: deliver a few full-current cycles and then idle, so the average switching frequency falls with load while each cycle stays efficient. At 0.5 A this converter would otherwise manage only 94.5%.

The naive answer first, so we can see what it costs. The thermal path is a series chain:

But the device is not at 25 °C. Both loss terms depend on \(T_j\), and \(T_j\) depends on the losses. Writing \(\Delta T = T_j - 25\):

Two equations, two unknowns — and both are linear, so this could be solved in closed form. Iterating is quicker and generalises to the nonlinear case.

Iterate to convergence:

The naive calculation understated the dissipation by 13 W (22%) and the junction temperature by 8.5 °C. On a design sitting near its limit, that is the difference between passing and failing qualification.

Maximum ambient. Work backwards from the junction limit, where \(\Delta T = 125\) °C:

Stability. A rise in junction temperature increases the dissipation, which raises the temperature further. The loop converges only if each degree of rise produces less than one degree of further rise:

Runaway would require \(R_{th} > 1/0.21 = 4.76\) K/W — roughly seven times worse than the design has, i.e. a device operated with no heatsink at all. The loop is convergent here, but the 22% correction it produced is not optional.

Why the magnetics term falls with frequency. Holding the ripple current fixed forces \(L \propto 1/f_s\), so the peak flux \(\Phi = L\Delta I/N\) also falls as \(1/f_s\). With a Steinmetz core loss of the form \(P \propto f_s B^2\), the two dependences combine:

Switching harder costs more in the switch and less in the magnetics. That opposition is what creates an optimum rather than a monotone.

Write the total and differentiate:

Substitute:

The two frequency-dependent terms are equal at the optimum. That is not a coincidence of these numbers — setting the derivative to zero for \(Ef_s + K/f_s\) always equalises them, and it gives a useful check on any such design.

The minimum, and how sharp it is:

A factor of two in either direction costs 4 W — 14% more loss. The curve is symmetric in \(\log f_s\), which is why halving and doubling cost exactly the same.

What the flatness means in practice. A 14% loss penalty for a 2:1 frequency error is small compared with the other things frequency decides:

So the loss optimum is best read as a permitted range rather than a target. Here anything from about 25 to 65 kHz is within 5% of the minimum, and the actual choice will be made by keeping out of the audio band at the low end and inside a conducted-EMI limit at the high end.