Part 3 · Chapter 13

Ćuk, SEPIC, and Fourth-Order Converters

Chapter 12 left the buck–boost with three defects: it inverts its output and it pulses both of its ports. Fixing them takes a second inductor and a capacitor to carry energy across — and produces a family of converters with identical gain and completely different characters. It also exposes a limit shared by every converter that stores energy before delivering it.

Power Electronics Prof. Mithun Mondal Reading time ≈ 50 min
Where this sits
Part 3 · DC–DC Converters
Chapter 13 of 30
You should already know
Volt-second balance and charge balance, and the three basic topologies with their port-current behaviour, from Chapter 12.
By the end you can
Analyse a converter with two inductors and two capacitors, choose between Ćuk, SEPIC and Zeta from the ports that matter, and explain why a right-half-plane zero limits what any of them can do.
Time
≈ 50 min reading · ≈ 45 min problems
i What you'll learn
  • Why the buck–boost's three shortcomings — inverted output, pulsed input, pulsed output — motivated a whole family of converters.
  • The Ćuk converter: capacitive energy transfer, \( V_o = -\dfrac{D}{1-D}V_s \), and both ports continuous.
  • The SEPIC: the same gain magnitude with the same polarity, and why that one difference decides most real designs.
  • The Zeta converter, and how all four converters are the same circuit rotated.
  • How a coupled inductor can drive the ripple at one port to exactly zero — the "ripple steering" trick.
  • The right-half-plane zero: why any converter that stores energy before delivering it must respond in the wrong direction first, and what that costs the control loop.
Section 13-1

What the Buck–Boost Could Not Do

The buck–boost converter of Chapter 12 does something neither the buck nor the boost can: it spans both directions with one inductor, one switch and one diode. For a small auxiliary rail that is enough, and it is why the topology survives.

At real power it does not survive, because it fails three requirements at once.

Three problems, and the converter that fixes each
Problem with the buck–boostWhy it mattersFixed by
Output polarity is inverted Most loads share a ground with the source. An inverted rail needs level shifting, or an isolated feedback path. SEPIC, Zeta
Input current is pulsed Conducted EMI at the source; a battery or PV panel is disturbed; a large input capacitor is forced. Ćuk, SEPIC
Output current is pulsed Large output capacitor, high ripple current, high output ripple voltage. Ćuk, Zeta
Section recap. The buck–boost inverts its output and pulses both ports. Putting an inductor at each port fixes the pulsing but leaves nothing to carry energy between them — so a capacitor does it, and the result is a fourth-order converter.
Section 13-2

The Ćuk Converter

Slobodan Ćuk's converter, published in 1977, was the first to transfer energy through a capacitor rather than an inductor. The arrangement is: \( L_1 \) from the source to a node; the switch from that node to ground; the transfer capacitor \( C_1 \) from that node onward to a second node; the diode from the second node to ground; and \( L_2 \) from the second node to the output.

V s L₁ S C₁ D L₂ C₂ R −V_o Energy crosses the converter through C₁, not through an inductor
The Ćuk converter. An inductor at each port makes both currents continuous; the capacitor \( C_1 \) between them carries the energy across.
  1. Find the transfer capacitor's voltage first In steady state, apply volt-second balance to \( L_1 \). With the switch on, \( v_{L1} = V_s \). With it off, the node after \( L_1 \) sits at \( V_{C1} \), so \( v_{L1} = V_s - V_{C1} \).
    Working
    \[ V_sDT + (V_s - V_{C1})(1-D)T = 0 \;\Longrightarrow\; V_{C1} = \frac{V_s}{1-D} \]
  2. Now do the same for \(L_2\) With the switch on, the second node is pulled to \( -V_{C1} \) relative to the rail, so \( v_{L2} = -V_{C1} - V_o \). With the switch off the diode clamps that node to zero, so \( v_{L2} = -V_o \). (Here \( V_o \) is the negative output voltage.)
    Working
    \[ (-V_{C1} - V_o)DT + (-V_o)(1-D)T = 0 \;\Longrightarrow\; V_o = -D\,V_{C1} \]
  3. Substitute
    Result
    \[ V_o = -D\cdot\frac{V_s}{1-D} = -\frac{D}{1-D}V_s \]
    The same gain as the buck–boost — but arrived at through a capacitor, and with both ports continuous.
  4. Note the device stress The switch and the diode each stand off \( V_{C1} = V_s/(1-D) \), which equals \( V_s + |V_o| \) — the same as the buck–boost. Fourth-order topologies fix the port currents, not the blocking voltage.
🔑
Ćuk converter
\[ V_o = -\frac{D}{1-D}V_s, \qquad V_{C1} = V_s + |V_o| = \frac{V_s}{1-D}, \qquad \Delta I_{L1} = \frac{V_sD}{fL_1},\quad \Delta I_{L2} = \frac{V_sD}{fL_2} \]

Both inductors see the same applied volt-seconds, so with equal inductances they have equal ripple — a fact the coupled-inductor trick of Section 13-5 exploits.

Section recap. Two applications of volt-second balance — one per inductor — give \( V_{C1} = V_s/(1-D) \) and then \( V_o = -DV_s/(1-D) \). Both port currents are continuous. The price is a transfer capacitor carrying the full converter ripple current, which rules out electrolytics.
Section 13-3

The SEPIC

The Ćuk converter fixed the port currents but kept the inverted output. The SEPIC — Single-Ended Primary-Inductor Converter — fixes the polarity too, and it is the workhorse of the family.

The change is small: swap the positions of the diode and the second inductor. \( L_2 \) now goes from the second node to ground, and the diode goes from that node to the output.

  1. Volt-second balance on \(L_1\), exactly as before
    Working
    \[ V_sDT + (V_s - V_{C1} - V_o)(1-D)T = 0 \]
  2. Volt-second balance on \(L_2\) With the switch on, \( L_2 \) is across \( C_1 \) with reversed sign, so \( v_{L2} = -V_{C1} \). With the switch off, \( L_2 \) is across the output, so \( v_{L2} = V_o \).
    Working
    \[ -V_{C1}DT + V_o(1-D)T = 0 \;\Longrightarrow\; V_{C1} = \frac{(1-D)}{D}V_o \]
  3. Combine Substituting into the first equation and simplifying:
    Result
    \[ V_o = +\frac{D}{1-D}V_s, \qquad V_{C1} = V_s \]
    Positive output — and, remarkably, the coupling capacitor sits at exactly the input voltage.
  4. Check the device stress The switch blocks \( V_s + V_o \) and the diode blocks the same. Identical to the Ćuk and the buck–boost.
🔑
SEPIC
\[ V_o = \frac{D}{1-D}V_s, \qquad V_{C1} = V_s, \qquad \Delta I_{L1} = \frac{V_sD}{fL_1} \]

Step-up or step-down, non-inverting, with a continuous input current. That combination is why the SEPIC exists, and why it appears wherever a battery must feed a fixed rail.

Interactive · one gain, four converters

All four converters share the gain \( |V_o/V_s| = D/(1-D) \) — so the choice between them is never about voltage. Move the duty ratio and the input voltage, then read what each one actually costs at that operating point.

0.50
12 V
Live comparison at the chosen operating point
ConverterOutputInput current Output currentSwitch blocksInductors
Buck–boost−12.0 VPulsedPulsed24 V1
Ćuk−12.0 VContinuousContinuous24 V2
SEPIC+12.0 VContinuousPulsed24 V2
Zeta+12.0 VPulsedContinuous24 V2
Gain D/(1−D)1.00
RegimeUnity
Coupling cap VC112 V
Sensitivity dV/dD48 V

Section recap. The SEPIC is the Ćuk with the diode and second inductor exchanged: same gain magnitude, positive output, continuous input current, and a coupling capacitor that sits at \( V_s \). It is the default choice for a wide-input, non-inverting rail.
Section 13-4

Zeta, and the Family Pattern

One rearrangement remains. Put the switch on the input side (referenced to the positive rail rather than to ground) and the diode on the output side, and you get the Zeta converter: non-inverting, with a continuous output current instead of a continuous input current.

All four converters now form a complete pattern.

The buck–boost family, ordered by what they fix
ConverterGainPolarityInput currentOutput currentOrderReach for it when
Buck–boost\(-\dfrac{D}{1-D}\)InvertedPulsedPulsed2nd Part count matters more than anything else
Ćuk\(-\dfrac{D}{1-D}\)InvertedContinuousContinuous4th Both ports must be quiet and inversion is acceptable
SEPIC\(+\dfrac{D}{1-D}\)SameContinuousPulsed4th Wide input range, shared ground, quiet source
Zeta\(+\dfrac{D}{1-D}\)SamePulsedContinuous4th Output ripple is critical; a high-side driver is available
Section recap. Four converters, one gain \( D/(1-D) \), differing only in polarity, which port is continuous, and whether the switch is high-side. Choose on those three, never on gain.
Section 13-5

Coupled Inductors and Ripple Steering

Both inductors in a Ćuk or SEPIC converter see the same applied volt-seconds. That opens a possibility that is genuinely surprising the first time you meet it: wind them on the same core, and the ripple at one port can be made exactly zero.

Section recap. Winding both inductors on one core lets the induced ripple cancel the applied ripple at one port, steering it to the other. Perfect cancellation needs \( M = L_2 \) and holds at one operating point; in practice 80–95% is achieved, which shrinks the input filter dramatically.
Section 13-6

The Right-Half-Plane Zero

There is one behaviour shared by the boost, the buck–boost and every converter in this chapter, and it has nothing to do with how they are drawn. It is a consequence of storing energy before delivering it, and it sets a hard ceiling on how fast any of them can be controlled.

🔑
The right-half-plane zero, and the bandwidth it permits
\[ f_{RHPZ} = \frac{R(1-D)^2}{2\pi L}\ \text{(boost)}, \qquad f_{RHPZ} = \frac{R(1-D)^2}{2\pi D L}\ \text{(buck–boost family)} \]

\[ f_{bandwidth} \lesssim \frac{f_{RHPZ}}{5} \]

Note the \( (1-D)^2 \): the zero moves to lower frequency as the duty ratio rises, so a wide-input converter is hardest to control at its lowest input voltage — exactly where it is also working hardest.

Which converters have a right-half-plane zero, and why
ConverterRHP zero?Reason
BuckNoThe inductor is in series with the load. Increasing \(D\) sends more current to the output immediately, with no delay.
BoostYesIncreasing \(D\) lengthens the interval during which the output is disconnected.
Buck–boostYesSame mechanism; the load is fed only during \(t_{off}\).
Ćuk, SEPIC, ZetaYesAll are indirect converters — energy is stored before it is delivered.
Forward (Ch. 14)NoA transformer-isolated buck. Energy passes straight through during \(t_{on}\).
Flyback (Ch. 14)YesA transformer-isolated buck–boost. Energy is stored in the magnetising inductance first.
Section recap. Every indirect converter responds to a duty-ratio increase by first moving the wrong way — a right-half-plane zero at \( R(1-D)^2/2\pi L \) that cannot be compensated, only avoided by keeping the loop bandwidth below about a fifth of it. Direct converters have no such limit.
Section 13-7

Worked Examples

1 A SEPIC across a wide input

Problem. A SEPIC produces 12 V at 2 A from an input of 9 V to 16 V, switching at 300 kHz. Find the duty-ratio range, the coupling-capacitor voltage, the device stress, and \( L_1 \) for 30% ripple.

Duty ratio at both extremes
\[ \frac{V_o}{V_s} = \frac{D}{1-D} \;\Longrightarrow\; D = \frac{V_o}{V_o + V_s} \]
\[ V_s = 9\ \text{V}: \; D = \frac{12}{21} = 0.571 \qquad V_s = 16\ \text{V}: \; D = \frac{12}{28} = 0.429 \]

Coupling capacitor. \( V_{C1} = V_s \), so it sees 9–16 V — choose a 25 V part.

Device stress. \( V_s + V_o \), worst at the highest input: \( 16 + 12 = 28 \) V. Choose 40 V or 60 V devices.

Inductor, at the worst case (lowest input)
\[ I_{L1} = I_s = \frac{P_o}{\eta V_s} = \frac{24}{0.88(9)} = 3.03\ \text{A} \]
\[ \Delta I_{L1} = 0.30(3.03) = 0.91\ \text{A} \]
\[ L_1 = \frac{V_sD}{f\,\Delta I_{L1}} = \frac{9(0.571)}{3\times10^5(0.91)} = 18.8\ \mu\text{H} \]

Choose 22 μH, the nearest standard value above. Using the same value for \( L_2 \) is normal practice and makes coupling them on one core straightforward later.

Note where each worst case fell. The inductor was sized at the lowest input (highest current) and the devices at the highest input (highest blocking voltage). Checking only one end of the range would have produced an unsafe design either way.

2 Ćuk converter and its transfer capacitor

Problem. A Ćuk converter produces −15 V at 3 A from 20 V at 100 kHz. Find \( D \), \( V_{C1} \), the RMS current in \( C_1 \), and comment on capacitor selection.

Working
\[ \frac{15}{20} = \frac{D}{1-D} \;\Longrightarrow\; D = \frac{15}{35} = 0.429 \]
\[ V_{C1} = V_s + |V_o| = 20 + 15 = 35\ \text{V} \]
\[ I_{L1} = \frac{P}{V_s} = \frac{45}{20} = 2.25\ \text{A}, \qquad I_{L2} = I_o = 3\ \text{A} \]

The transfer capacitor's current. \( C_1 \) carries \( I_{L2} \) while the switch is on and \( I_{L1} \) while it is off — a square wave alternating between +3 A and −2.25 A:

RMS of the two-level square wave
\[ I_{C1(rms)} = \sqrt{D\,I_{L2}^2 + (1-D)I_{L1}^2} = \sqrt{0.429(9) + 0.571(5.06)} = 2.6\ \text{A} \]

Reading that number. 2.6 A RMS at 100 kHz is a serious requirement.

  • An aluminium electrolytic is out — its ESR at 100 kHz would dissipate several watts inside the can, and it would fail within months.
  • A film capacitor works: low ESR, excellent ripple rating, but physically large.
  • Ceramics (X7R or better) are the usual answer, several in parallel — but beware the DC bias effect, where a Class-II ceramic can lose 50–70% of its rated capacitance at its rated voltage. Derate accordingly, or specify at the working voltage.

The general point. In any Ćuk or SEPIC design, the coupling capacitor's ripple current rating is a first-order design constraint — often harder to satisfy than the capacitance itself.

3 Where the bandwidth ceiling falls

Problem. The SEPIC of Example 1 has \( L_1 = 22\ \mu\text{H} \) and a 6 Ω load (12 V, 2 A). Find the RHP zero frequency at both input extremes and state the achievable loop bandwidth.

At \(V_s = 16\) V, \(D = 0.429\)
\[ f_{RHPZ} = \frac{R(1-D)^2}{2\pi D L} = \frac{6(0.571)^2}{2\pi(0.429)(22\times10^{-6})} = 33\ \text{kHz} \]
At \(V_s = 9\) V, \(D = 0.571\)
\[ f_{RHPZ} = \frac{6(0.429)^2}{2\pi(0.571)(22\times10^{-6})} = 14\ \text{kHz} \]

The worst case governs. The loop must be stable across the whole range, so the bandwidth is set by the lower figure: \( 14/5 \approx 2.8 \) kHz.

Put that in context. The converter switches at 300 kHz, so the loop is limited to roughly 1% of the switching frequency. A buck at the same frequency would reach 30–60 kHz — more than ten times faster.

Two things follow for the design:

  1. Transient response will be slow, so the output capacitor must be sized to ride out load steps passively rather than relying on the loop to correct them.
  2. The RHP zero moves with input voltage, so the compensator must be designed at the worst case and merely verified elsewhere — never optimised at the nominal point.
4 Choosing within the family

Problem. A battery-powered instrument needs −5 V at 200 mA from a 3.0–4.2 V lithium cell. The analogue front end is sensitive to noise on both supplies. Choose a topology.

Solution — take the constraints in order.

  1. Polarity. The output is negative, so an inverting topology is required: buck–boost or Ćuk. SEPIC and Zeta are eliminated.
  2. Range. \( |V_o|/V_s \) runs from \( 5/4.2 = 1.19 \) to \( 5/3.0 = 1.67 \), so the converter must step up throughout. \( D = 0.54 \) to \( 0.63 \) — a narrow and comfortable band.
  3. Noise, and this decides it. "Sensitive on both supplies" rules out any topology with a pulsed port. The Ćuk is the only inverting converter with both ports continuous.
  4. Answer: a Ćuk converter, and with coupled inductors, since the extra ripple reduction costs nothing once both windings are on one core.

Sanity-check the cost. At 1 W the components are small: the transfer capacitor carries about 300 mA RMS, well within a single ceramic, and the coupled inductor is a standard dual-winding part. The Ćuk's usual objection — a demanding transfer capacitor — simply does not apply at this power.

The alternative worth mentioning. At 200 mA, a switched-capacitor inverter (a "charge pump") followed by a small LDO would also work, with no magnetics at all. It would be less efficient, but quieter still and physically smaller. Below about half a watt this is often the better engineering answer — a reminder that the right topology is sometimes not in the family you were studying.

Section 13-8

Summary & Formula Sheet

Chapter 13 in five sentences:

  1. The buck–boost inverts its output and pulses both ports; putting an inductor at each port fixes the pulsing and forces a capacitor to carry the energy across.
  2. Ćuk, SEPIC and Zeta all have the gain \( D/(1-D) \) and all impose \( V_s + |V_o| \) on the switch — they differ only in polarity, which port is continuous, and whether the switch is high-side.
  3. Coupling the two inductors on one core steers the ripple to whichever port can tolerate it, typically achieving 80–95% cancellation.
  4. The transfer capacitor's RMS ripple current, not its capacitance, is usually the binding constraint on component choice.
  5. Every indirect converter has a right-half-plane zero at \( R(1-D)^2/2\pi L \) that caps the loop bandwidth at about a fifth of it, and no compensator can remove it.
Formula sheet · Chapter 13
Ćuk gaininverting; both ports continuous
\( V_o = -\dfrac{D}{1-D}V_s \)
Ćuk transfer capacitorrate it for this voltage
\( V_{C1} = V_s + |V_o| = \dfrac{V_s}{1-D} \)
SEPIC gainnon-inverting
\( V_o = +\dfrac{D}{1-D}V_s \)
SEPIC coupling capacitora useful check on your analysis
\( V_{C1} = V_s \)
Duty ratio, whole familysolve directly
\( D = \dfrac{|V_o|}{|V_o| + V_s} \)
Switch and diode stressall four topologies
\( V_{sw} = V_s + |V_o| \)
Inductor rippleboth inductors see the same volt-seconds
\( \Delta I_L = \dfrac{V_s D}{fL} \)
Transfer capacitor RMS currentusually the binding constraint
\( I_{C1(rms)} = \sqrt{D\,I_{L2}^2 + (1-D)I_{L1}^2} \)
Zero-ripple couplingcondition for cancellation in \(L_1\)
\( M = L_2 \)
RHP zero, boostworst at low input voltage
\( f_{RHPZ} = \dfrac{R(1-D)^2}{2\pi L} \)
RHP zero, buck–boost familynote the extra \(D\)
\( f_{RHPZ} = \dfrac{R(1-D)^2}{2\pi D L} \)
Usable loop bandwidthhard ceiling, not a guideline
\( f_{bw} \lesssim f_{RHPZ}/5 \)

Key terms

Fourth-order converter
A converter with two inductors and two capacitors, and so four state variables. Ćuk, SEPIC and Zeta.
Ćuk converter
Inverting converter that transfers energy through a capacitor. Both port currents continuous.
SEPIC
Single-Ended Primary-Inductor Converter. Non-inverting, continuous input current, \(V_{C1} = V_s\).
Zeta converter
Non-inverting, continuous output current, high-side switch. The SEPIC's mirror image.
Transfer (coupling) capacitor
The capacitor that carries energy across the converter. Selected on RMS ripple current, not capacitance.
Ripple steering
Using coupled inductors so the ripple at one port cancels, appearing instead at the other.
Right-half-plane zero
A response that initially moves the wrong way. Adds gain but subtracts phase; cannot be compensated, only avoided.
Direct converter
Energy passes from source to load during the on-time. No RHP zero, small magnetics, fast loop. Buck, forward.
Indirect converter
Energy is stored before delivery. RHP zero, large magnetics, slow loop. Boost, buck–boost, Ćuk, SEPIC, Zeta, flyback.
High-side switch
A switch whose source terminal moves with the switching node, requiring a bootstrap or isolated gate supply.
DC bias effect
The loss of capacitance in a Class-II ceramic capacitor as DC voltage is applied — often 50–70% at rated voltage.
Check yourself

Test Yourself

Chapter 13 · six questions answers hidden until you ask
Why can a SEPIC's output be shorted without shorting the input, when a boost converter's cannot?

Because of where the coupling capacitor sits, and this is a genuine safety property rather than an incidental one.

The boost converter. Trace the path from source to load: \( V_s \rightarrow L \rightarrow \) diode \( \rightarrow \) output. Every element is a DC conductor. Short the output and that path carries whatever the source can deliver, limited only by the wiring. The switch is not in the path, so turning it off changes nothing. The diode fails first, usually within milliseconds.

The SEPIC. The same trace passes through \( C_1 \), which blocks DC by construction. A short at the output cannot pull steady current from the source, because a capacitor will not pass it. Stop switching and the fault current stops.

Why this matters commercially. Automotive, aerospace and medical standards frequently require that a single output fault must not draw unlimited current from the supply. A boost converter needs an added series disconnect device to comply; the SEPIC complies inherently. When a SEPIC is specified over a boost that would otherwise do the job, this is often the reason.

Two caveats, so the property is not oversold:

  • The transient discharge of \( C_1 \) into the short is still substantial — the protection is against sustained current, not against the initial surge.
  • The Ćuk shares the property (its \( C_1 \) is in the path too); the Zeta and the buck–boost do not, since their switch is in series and must be commanded off.
A Ćuk converter's transfer capacitor is replaced with one of ten times the capacitance, same voltage rating. The converter overheats. Why?

Almost certainly because the replacement is an electrolytic and the original was a film or ceramic part. Capacitance was never the specification that mattered.

What \( C_1 \) actually does. It carries the full converter current as a two-level square wave — \( I_{L2} \) while the switch is on, \( -I_{L1} \) while it is off. Its RMS current is

\[ I_{C1(rms)} = \sqrt{D\,I_{L2}^2 + (1-D)I_{L1}^2} \]

which for a typical design is close to the converter's full load current.

What that does to an electrolytic. A 100 μF aluminium electrolytic has perhaps 200 mΩ of ESR at 100 kHz. At 2.6 A RMS:

\[ P = I^2R = (2.6)^2(0.2) = 1.35\ \text{W} \]

dissipated inside a sealed can with poor thermal conductivity. The core temperature rises far above ambient, the electrolyte dries out, the ESR rises further, and the heating accelerates. It is a thermal runaway with a lifetime measured in weeks.

What the original part was doing. A film capacitor of one-tenth the capacitance might have 5 mΩ of ESR, dissipating 34 mW — forty times less, in a package that sheds heat far better.

The rule to carry away: in Ćuk and SEPIC converters, select \( C_1 \) on RMS ripple current rating first, then check that the capacitance is sufficient for the ripple voltage. Reversing that order is one of the most common ways to build a converter that works on the bench and fails in the field.

Why does a right-half-plane zero limit bandwidth so much more severely than an ordinary pole would?

Because it combines the phase penalty of a pole with the gain increase of a zero, and there is no way to cancel it.

Compare the three:

  • A left-half-plane zero at \( \omega_z \) adds +20 dB/decade of gain and adds up to +90° of phase. Helpful — it is what compensator design uses to buy phase margin.
  • A pole adds −20 dB/decade and subtracts up to 90°. Harmful in phase, but at least the gain falls, so the loop naturally rolls off.
  • A right-half-plane zero adds +20 dB/decade and subtracts up to 90°. The worst of both: the gain rises just where the phase is collapsing.

Why it cannot be cancelled. A left-half-plane zero can be nulled by a compensator pole at the same frequency. To do the same for an RHP zero you would need a compensator pole in the right half-plane — an unstable filter. Even if it were implementable, any tiny mismatch would leave an unstable mode. So it is not a matter of designing more carefully; it is impossible.

What is done instead. Roll the loop gain off below the zero so the loop simply never operates there. The rule of thumb \( f_{bw} \le f_{RHPZ}/5 \) leaves enough margin for the zero's phase contribution to be negligible at crossover.

And the physical reading. The RHP zero is not a modelling artefact — it is the crouch before the jump. Asking the loop to respond faster than the zero is asking it to correct the output before the inductor has had time to build up the current that will correct it. No controller can do that, because the information does not exist yet.

All four converters in this chapter have the same gain. So on what basis would you ever choose the buck–boost?

On part count, board area and cost — and for small auxiliary rails those often win outright.

The comparison, concretely. A buck–boost needs one inductor, one switch, one diode and two capacitors. A SEPIC needs two inductors (or one coupled part), one switch, one diode, and three capacitors including a coupling capacitor with a demanding ripple rating.

Where the buck–boost is the right answer:

  • Low power. At 1 W the pulsed port currents are milliamps. The EMI they generate is trivially filtered, and the capacitors are tiny.
  • An inverted rail is wanted anyway. Op-amp bias supplies, LCD panel drivers and many analogue front ends need a negative rail, so the "problem" of inversion is the requirement.
  • Board area is the binding constraint. A wearable or a sensor node may simply have no room for a second inductor.
  • Cost is the binding constraint. A high-volume consumer product will not pay for a coupled inductor and a film capacitor to save a few decibels of EMI it can filter more cheaply.

Where it is the wrong answer: above roughly 20–50 W, when the source is a battery or PV panel that dislikes pulsed current, when conducted-emissions limits are strict, or when the load shares a ground with the source.

The engineering lesson generalises. The fourth-order converters are strictly better on port behaviour and strictly worse on part count. "Better" is never absolute — it is relative to what the application is short of.

A designer coupled a SEPIC's two inductors on one core and the converter became unstable. What might have happened?

Coupling changes the small-signal dynamics as well as the ripple, and a loop tuned on the uncoupled converter may no longer be stable. Three specific mechanisms are worth checking.

1. A new resonance. With the windings coupled, the leakage inductance and the coupling capacitor \( C_1 \) form a series resonant circuit. Leakage is small, so the resonance is at a high frequency — potentially inside the loop's bandwidth — and it is lightly damped, since there is little resistance to damp it. A sharp peak in the plant response at that frequency can push the gain above unity where the phase has already passed −180°.

2. The effective inductance changed. Two coupled windings do not behave as two independent inductors. Depending on the winding polarity, the effective inductance seen by the ripple can be roughly \( L + M \) or \( L - M \) — which for tight coupling can differ from the uncoupled value by a factor of two or more. That moves both the resonant frequency and the RHP zero, and the compensator was placed for the old ones.

3. Polarity wired backwards. If the windings are connected in the wrong sense, the mutual term adds to the ripple instead of cancelling it. The symptom is ripple that got worse rather than better, along with the changed dynamics — and it is the first thing to check, because it is the easiest to get wrong.

How to diagnose it properly. Measure the loop gain with a network analyser and compare against the uncoupled measurement. A resonant peak that was not there before points to mechanism 1; a general frequency shift points to mechanism 2; worse ripple points to mechanism 3.

The fix is usually a small damping network — a resistor in series with a capacitor across \( C_1 \), sized to damp the leakage resonance without dissipating much at the switching frequency — plus re-tuning the compensator for the new plant.

Why does the buck converter have no right-half-plane zero, when every converter in this chapter does?

Because in a buck converter, increasing the duty ratio sends more energy to the output immediately. There is no interval during which the load is deliberately disconnected.

Trace the buck's response to a step increase in \( D \). The switch is on for longer, so the source is connected to the inductor for longer, so more charge flows to the output within the same cycle. The output rises straight away and keeps rising. Correct action, correct direction, no delay.

Now trace the boost's. The switch is on for longer, so the diode — which is the only path to the output — is off for longer. Less charge reaches the output in that cycle, and the output dips. Only after the inductor current has built up over several cycles does the output recover and overshoot. Correct action, wrong direction first.

The structural distinction. In a buck, the inductor is in series with the load, so its current is the load current and it is never interrupted. In a boost, buck–boost, Ćuk, SEPIC or Zeta, the load is fed only during part of the cycle, and increasing \( D \) shortens exactly that part.

The consequences you can predict from this alone:

  • A buck's loop bandwidth is limited by the switching frequency (typically \( f_s/5 \) to \( f_s/10 \)) — a design choice.
  • An indirect converter's is limited by \( f_{RHPZ}/5 \), which may be a hundredth of \( f_s \) — a physical constraint.
  • So a buck's transient response can be an order of magnitude faster for the same switching frequency.

Why this shapes real architectures. When a fast-responding rail is needed from a wide-ranging input, designers frequently use two stages — a slow boost or SEPIC to make an intermediate bus, then a fast buck to regulate. The buck does the responding; the indirect stage only has to hold a rough average. That is a direct consequence of everything above, and it is worth recognising the pattern when you meet it.

Practice

Problems

Three habits for this chapter:

  1. Apply volt-second balance to each inductor separately. Two equations, two unknowns — the transfer capacitor voltage falls out first, then the gain.
  2. Rate the transfer capacitor on RMS current before you look at its capacitance.
  3. Check the RHP zero at the lowest input voltage, which is always the worst case.

Problems 1–5 are direct application; 6–9 need judgement; 10–12 are design questions worth discussing in a tutorial.

  1. A Ćuk converter produces −18 V at 2.5 A from 24 V at 150 kHz. Find \( D \), \( V_{C1} \), both inductor currents, and the RMS current in \( C_1 \).
  2. A SEPIC produces 5 V at 3 A from an input of 2.7 V to 5.5 V. Find the duty-ratio range, the worst-case device stress, and the coupling-capacitor voltage rating you would specify.
  3. Derive the SEPIC gain from volt-second balance on both inductors, showing clearly why \( V_{C1} = V_s \).
  4. For a SEPIC with \( L_1 = L_2 = 33\ \mu\text{H} \), \( V_s = 12 \) V, \( V_o = 15 \) V, \( R = 10\ \Omega \), \( f = 250 \) kHz, find the inductor ripple, the RHP zero frequency and the achievable loop bandwidth.
  5. Show that for all four converters of this chapter the switch blocking voltage is \( V_s + |V_o| \), and hence that a converter with a 4:1 input range must use a device rated for the highest input, not the nominal one.
  6. A Ćuk converter and a SEPIC are both proposed for a 30 W supply feeding a sensitive radio receiver from a battery. Compare them on input ripple, output ripple, polarity and part count, and recommend one with reasons.
  7. A designer wishes to run a SEPIC at \( D = 0.85 \) to obtain 60 V from 10 V. Identify four separate reasons this is a poor choice, and propose two alternatives.
  8. Explain why coupling the inductors of a SEPIC reduces input ripple, why the reduction is never complete, and what determines how close to complete it is.
  9. A boost converter and a buck converter both switch at 200 kHz and drive a 20 Ω load. The boost has \( L = 47\ \mu\text{H} \) and \( D = 0.5 \). Estimate the achievable loop bandwidth of each and explain the difference in one paragraph.
  10. Design a SEPIC for an automotive application: 12 V output at 3 A, input 6 V to 18 V, 400 kHz, input ripple below 200 mA. Specify \( D \) range, \( L_1 \), \( L_2 \), \( C_1 \) (including its RMS current), and the device voltage ratings. State whether you would couple the inductors and why.
  11. A two-stage architecture (boost to a 400 V bus, then buck to 12 V) is proposed instead of a single SEPIC for a 200 W supply with a 100–300 V input. Compare the two on efficiency, transient response, part count and control complexity, and identify the circumstances under which each wins.
  12. Starting from the physical description of the right-half-plane zero, explain why a current-mode-controlled boost converter still suffers from it even though current-mode control removes one plant pole. What does current-mode control actually improve, and what does it leave untouched?