\LARGE GATE 2020 EXAM QUESTION WITH SOLUTION
EDUCATOR MITHUN MONDAL
In the voltage regulator shown below, \(V_i\) is the unregulated voltage at 15 V. Assume \(V_{BE} = 0.7\,V\) and the base current is negligible for both BJTs. If the regulated output \(V_O = 9\,V\), find the value of \(R_2\).
\includegraphics{gate2020-q1.png}
Solution 1
[Image of voltage regulator circuit analysis]
Using voltage division at the output sensing point (assuming the control loop maintains the base of the error amplifier transistor at a reference voltage, likely a Zener voltage + \(V_{BE}\) drop, or directly compared to a reference). Based on the provided solution steps which imply a reference voltage of 4V at the tap point:
Equation
\[9 \times \frac{R_2}{R_2 + 1\,\text{k}\Omega} = 4\]
Equation
\[9R_2 = 4R_2 + 4\,\text{k}\Omega\]
Equation
\[5R_2 = 4\,\text{k}\Omega\]
Equation
\[R_2 = \frac{4000}{5} = 800\,\Omega\]
For the BJT in the amplifier shown below, \(V_{BE} = 0.7\,V\), \(\frac{kT}{q} = 26\,mV\). Assume the BJT output resistance \(r_o\) is very high and the base current is negligible. The capacitors are short-circuited at signal frequencies. The input \(v_i\) is direct coupled. Find the low-frequency gain \(\frac{v_o}{v_i}\) of the amplifier.
\includegraphics{gate2020-q2.png}
A. -89.42 \quad B. -128.21 \quad C. -178.85 \quad D. -256.42
Solution 2
[Image of common emitter amplifier small signal model]
First, find the DC emitter current \(I_{EQ}\):
Equation
\[I_{EQ} = \frac{10 - 0.7}{20} = 0.465\,mA\]
Calculate transconductance \(g_m\):
Equation
\[g_m = \frac{I_{EQ}}{V_T} = \frac{0.465}{26} = 0.0179\,S\]
Voltage gain \(A_V\):
Equation
\[A_V = \frac{v_{out}}{v_{in}} = -g_m R_{L}'\]
(Note: The provided solution calculation shows a positive value, likely magnitude, and uses 5000 which implies \(R_C || R_L \approx 5k\) or simply \(R_C=5k\). Assuming standard CE config, gain is negative).
Equation
\[|A_v| = \frac{0.465}{26} \times 5000 = 89.42\]
In the circuit shown below, all the components are ideal and the input voltage is sinusoidal. The magnitude of the steady-state output \(V_0\) rounded off to two decimal places is ___ V.
\includegraphics{gate2020-q3.png}
Solution 3
[Image of voltage doubler circuit diagram]
This is a voltage doubler circuit.
Input peak voltage \(V_m = 230 \sqrt{2}\).
Equation
\[V_0 = 2V_m = 2 \times 230 \sqrt{2} = 650.4\,V\]
Equation
\[V_0 = 650.4\,V\]
Using the incremental low-frequency small-signal model of the MOS device, find the Norton equivalent resistance of the circuit.
\includegraphics{gate2020-q4.png}
A. \(r_{ds} || \frac{R}{g_m r_{ds} R}\) \quad B. \(r_{ds} || \frac{R}{1 + g_m r_{ds}}\) \quad C. \(r_{ds} || \frac{1}{g_m R}\) \quad D. \(r_{ds} || R\)
Solution 4
Let test voltage be \(V_x\) and test current be \(I_x\).
Applying KVL/KCL to the small signal model:
Equation
\[V_x = (I_x - g_m V_{gs}) r_{ds}\]
Since gate is grounded and source is at \(V_x\) (or dependent on topology shown), usually \(V_{gs} = -V_x\) (if common gate) or similar.
Based on provided solution steps:
Equation
\[V_x = I_x g_m V_x r_{ds} \quad \text{(This step seems simplified or specific to the diagram)}\]
Equation
\[I_x R = V_x (1+g_m r_{ds})\]
Resulting equivalent resistance:
Equation
\[r_{ds} || R = \frac{r_{ds} R}{1 + g_m r_{ds}}\]
An enhancement MOSFET of threshold voltage 3 V is used in a sample and hold circuit. The substrate is connected to -10 V. If the input voltage \(V_I\) lies between 10 V, find the minimum and maximum \(V_G\) values for proper sampling and holding.
A. 3 V \& 3 V \quad B. 10 V \& 10 V \quad C. 13 V \& 7 V \quad D. 10 V \& 13 V
Solution 5
For holding, the MOSFET must be OFF for all input voltages.
Equation
\[V_{GS} < V_T \implies V_G - V_{I,\text{min}} < V_T\]
Equation
\[V_G < 10 + 3 = 13\,V\]
Wait, standard logic for NMOS switch:
ON condition: \(V_{GS} > V_T\) for all \(V_I\).
\(V_G - V_{I,max} > 3 \implies V_G > 10+3 = 13V\).
OFF condition: \(V_{GS} < V_T\) for all \(V_I\).
\(V_G - V_{I,min} < 3 \implies V_G < -10+3\) (if range is -10 to 10).
Based on solution provided:
Sampling: \(V_G = 13\,V\), holding: \(V_G = 7\,V\)
The components in the circuit below are ideal. If \(R = 2\,k\Omega\) and \(C = 1\,\mu F\), find the -3 dB cut-off frequency of the circuit in Hz.
\includegraphics{gate2020-q6.png}
A. 14.92 \quad B. 34.46 \quad C. 59.68 \quad D. 79.58
Solution 6
[Image of active low pass filter frequency response]
This is an op-amp active low-pass filter.
Equation
\[f_c = \frac{1}{2\pi RC} = \frac{1}{2 \times \pi \times 2 \times 10^3 \times 10^{-6}} \approx 79.58\,Hz\]
(Note: original solution missed \(\pi\) in calculation step but got correct answer).
Equation
\[f_c = 79.58\,Hz\]
In the circuit shown below, all components are ideal. If \(V_i = 2\,V\), find the current \(I_o\) sourced by the op-amp in mA.
\includegraphics{gate2020-q7.png}
Solution 7
[Image of non-inverting amplifier circuit analysis]
Assuming non-inverting configuration with gain 2 (based on formula):
Equation
\[V_o = \left(1 + \frac{R_f}{R_1}\right) V_i = \frac{1 + 1}{1} \cdot 2\,V = 4\,V\]
Applying KCL at the output node (assuming load resistor of 1k):
Equation
\[I_o = \frac{V_o - V_{load\_ref}}{R_{load}} \quad \text{or similar based on diagram}\]
Using provided solution steps:
Equation
\[\frac{V_o - 2}{1k} = I_o\]
Equation
\[I_o = \frac{4 - 2}{1k} = 2\,mA\]
The components in the circuit below are ideal. If the op-amp is in positive feedback and the input voltage \(V_i\) is a sine wave of amplitude 1 V, find the output voltage \(V_o\).
\includegraphics{gate2020-q8.png}
A. A non-inverted sine wave of 2 V amplitude
B. An inverted sine wave of 1 V amplitude
C. A square wave of 5 V amplitude
D. A constant of either 5 V or -5 V
Solution 8
[Image of Schmitt trigger hysteresis curve]
Given circuit is a non-inverting Schmitt Trigger (Positive Feedback).
Output saturates to rail voltages:
Switching thresholds depend on feedback resistors. If thresholds are outside the input range (\(\pm 1V\)), switching never occurs.
If thresholds are, say, \(\pm 2V\) (implied by "no switching occurs"), and input is only 1V peak, the output stays latched.
Output remains constant at \(5V\) or \(-5V\).