GATE 2018 Analog Electronics Questions and Solutions

In the circuit shown below, the \((W/L)\) value for \(M_2\) is twice that for \(M_1\). The two nMOS transistors are otherwise identical. The threshold voltage \(V_T\) for both transistors is \(1.0\, V\). The voltage at \(V_2\) is (in volts, accurate to two decimal places):

Solution

[Image of MOSFET small signal model analysis]

Let \(K_n = \mu_n C_{ox} (W/L)\), \(K_2 = 2K_1\). For \(M_1\): \(V_{GS1} - V_T = 2-1 = 1\,V\), in linear region. For \(M_2\): \(V_{GS2} - V_T = 2-V_2-1 = 1-V_2\) and \(V_{DS2} = 3.3 - V_2 > (V_{GS2} - V_T)\) (saturation). Set \(I_{D1} = I_{D2}\):

Solve: \(2V_1 - V_1^2 = 2(1 + V_2^2 - 2V_2)\), which simplifies to \(3V_2^2 - 6V_2 + 2 = 0\). Quadratic formula gives \(V_2 = 1.58\) or \(V_2 = 0.42\). Since \(V_{GS2} > V_T\), only \(V_2 = 0.42\) V is valid.

In the op-amp circuit shown, with ideal op-amp, what is the voltage (in volts, to one decimal place) at node A connected to negative input?

Solution

The op-amp is in negative feedback, but the output rail is \(-15\)V (due to supply range). Applying KCL at node \(A\): \(\displaystyle \frac{V_A-(-15)}{31k} + \frac{V_A-1}{1k}=0 \implies 32V_A=16 \implies V_A = 0.5\,V\).

A DC current of \(26\,\mu\)A flows through the circuit shown. The diode (ideality 1) at quiescent point has junction capacitance \(0.5\) nF. Assume \(V_T=26\)mV. For \(\omega = 2\times10^6\) rad/s, small-signal input is \(5\sin(\omega t)\) mV across the diode. The amplitude of the small-signal component of diode current is (in \(\mu\)A, to one decimal place):

Solution

Small-signal resistance \(r_d = V_T/I_{DC} = 26\,mV/26\,\mu A = 1\,k\Omega\), and the junction capacitance contributes \(1/(j\omega C) = -j/(2\times10^6 \times 0.5\times10^{-9}) = -j1\,k\Omega\). The two are in parallel:

\(Z_d\) is in series with the \(100\,\Omega\) resistor, so the loop impedance is \(600 - j500\,\Omega\), of magnitude \(781\,\Omega\), and with a \(5\,\)mV drive

A regulated \(5\)V is to be maintained across a \(1k\Omega\) resistor by the circuit. The Zener reverse breakdown starts from \(I_{zmin}=2\)mA, max allowed current \(I_{zmax}\); input \(V_1\) can vary by 5% from \(6\)V. Diode's breakdown resistance is negligible. The value of \(R\) and required minimum power dissipation of the diode are:

1. \(186\,\Omega\), \(10\,\)mW
2. \(100\,\Omega\), \(40\,\)mW
3. \(100\,\Omega\), \(10\,\)mW
4. \(186\,\Omega\), \(40\,\)mW

Solution

[Image of zener regulator circuit with variable input voltage]

\(V_1=6V\pm5\%=5.7\) to \(6.3\)V Load current \(I_L=5V/1k=5\)mA. Minimum current through resistor for zener to engage: \(I_s(min)=5+2=7\)mA. \(R=(V_1(min)-V_z)/I_s(min) = (5.7-5)/0.007 \approx 100\Omega\) \(R=100\Omega\): at \(V_1=6.3V\): \(I_s=13\)mA, so \(I_z(max)=13-5=8\)mA. So, \(P_{z}(min)=5V\times8\)mA = \(40\)mW. Correct answer: B

[2] A good transimpedance amplifier has:

1. Low input, high output impedance
2. High input, high output impedance
3. High input, low output impedance
4. Low input, low output impedance

Solution

[Image of transimpedance amplifier diagram]

A transimpedance amplifier takes a current in and delivers a voltage out, so it must present a low input impedance to the driving current source and a low output impedance to the load. Correct answer: D

In the circuit shown below with ideal op-amp and unit step input \(v_{in}(t) = u(t)\), Zener voltage is \(2.5\)V, \(t=0\) capacitors are zero. At what time \(t\) (ms) does the output cross \(-10\)V?

1. \(2.5\)
2. \(5.0\)
3. \(7.5\)
4. \(10.0\)

Solution

For \(t>0\) the input holds at \(1\)V, so the virtual ground drives a constant \(I = 1\,\mathrm{V}/1\,k\Omega = 1\,\)mA into the feedback path. Until the Zener strikes, the two \(1\,\mu\)F capacitors are in series, \(C_{eq} = 0.5\,\mu\)F, so

The capacitor across the Zener charges at \(1\,\mathrm{mA}/1\,\mu\mathrm{F} = 1\,\)V/ms and reaches the \(2.5\)V breakdown at \(t = 2.5\)ms, by which time \(v_{out} = -5\)V. After that the Zener holds that capacitor at \(2.5\)V, the whole \(1\,\)mA flows into the remaining \(1\,\mu\)F and the slope becomes \(-1\,\)V/ms:

Correct answer: C

Two identical nMOS transistors \(M_1\) and \(M_2\) are connected as shown. Input between \(G\) and \(S\), output between \(D\) and \(S\). The transconductance \(g_m\) and output resistance \(r_o\) for the combination are best estimated as:

1. \(g_m \approx g_{m1} \cdot g_{m2} \cdot r_{o2}\) and \(r_o \approx r_{o1} + r_{o2}\)
2. \(g_m \approx g_{m1} + g_{m2}\) and \(r_o \approx r_{o1} + r_{o2}\)
3. \(g_m \approx g_{m1}\) and \(r_o \approx r_{o1} \cdot g_{m2} \cdot r_{o2}\)
4. \(g_m \approx g_{m1}\) and \(r_o \approx r_{o2}\)

Solution

This is a cascode. \(M_2\) acts as a current buffer, so the output current follows the drain current of \(M_1\) and \(g_m \approx g_{m1}\). Looking into the drain of \(M_2\), the degeneration \(r_{o1}\) is boosted by \(M_2\): \(r_o = r_{o1} + r_{o2} + g_{m2}r_{o1}r_{o2} \approx r_{o1}\,g_{m2}\,r_{o2}\). Correct answer: C