Solved GATE Paper

GATE 2017 Analog Electronics Questions and Solutions

Instructor: Prof. Mithun Mondal Institution: BITS Pilani Subject: Analog Electronics
Question 01

Question 1

In the circuit shown, transistors \(Q_1\) and \(Q_2\) are biased at a collector current of \(2.6\,mA\). Assuming \(I_C \approx I_E\) and thermal voltage \(V_T=26\,mV\), the magnitude of voltage gain \(V_o/V_i\) in mid-band is:

GATE 2017 Analog Electronics Q1 diode circuit diagram
GATE 2017 Analog Electronics Q1 diode circuit diagram

Solution

[Image of differential amplifier small signal analysis]

The base of \(Q_2\) is bypassed to ground by the capacitor, so at mid-band \(Q_2\) is a common-base stage and \(Q_1\) sees only its emitter resistance:

Equation
\[r_{e1} = r_{e2} = \frac{V_T}{I_E} = \frac{26\,mV}{2.6\,mA} = 10\,\Omega\]

\(Q_1\) is therefore a common-emitter stage with an unbypassed emitter resistance \(r_{e2}\), loaded by the \(1\,k\Omega\) collector resistor:

Equation
\[\left|\frac{V_o}{V_i}\right| = \frac{R_C}{r_{e1}+r_{e2}} = \frac{1000}{10+10} = 50\]
Question 02

Question 2

In the voltage reference circuit with 32 identical transistors, \(V_P=0.7\,V\), \(V_T=26\,mV\), the output voltage \(V_{out}\) is approximately:

GATE 2017 Analog Electronics Q2 transistor circuit diagram
GATE 2017 Analog Electronics Q2 transistor circuit diagram

Solution

- Use KCL and log expression for junction voltages. - \(V = V_T \ln 31 + V_P = 0.789\,V\). - \(V_{out} = 5 - 2.8 = 1.145\,V\).

A
Final Answer
Correct answer: A.
Question 03

Question 3

For identical MOSFETs \(M_1\) and \(M_2\) with threshold voltage \(1\,V\), and given operating voltages, the states of \(M_1, M_2\) are:

GATE 2017 Analog Electronics Q3 MOSFET circuit diagram
GATE 2017 Analog Electronics Q3 MOSFET circuit diagram
  1. Saturation, Saturation
  2. Linear, Linear
  3. Linear, Saturation
  4. Saturation, Linear

Solution

- Calculate \(V_{GS1}, V_{GS2}\) and compare with \(V_{DS1}, V_{DS2}\). - Solve current equality for \(V\) and verify operation regions. - Result: \(M_1\) in linear, \(M_2\) in saturation.

C
Final Answer
Correct answer: C.
Question 04

Question 4

Real diode \(D_1\) drop \(0.7\,V\), Zener diode \(D_2\) breakdown \(-6.8\,V\), input periodic square wave \(\pm14\,V\) with \(T \gg \tau\). Maximum and minimum output voltages are:

GATE 2017 Analog Electronics Q4 Zener circuit diagram
GATE 2017 Analog Electronics Q4 Zener circuit diagram
  1. \(7.5\,V\) and \(-20.5\,V\)
  2. \(6.1\,V\) and \(-21.9\,V\)
  3. \(7.5\,V\) and \(-21.9\,V\)
  4. \(6.1\,V\) and \(-22.6\,V\)

Solution

\(D_1\) and \(D_2\) face each other cathode to cathode, so the branch conducts only for a positive output, with \(D_1\) forward biased and \(D_2\) in breakdown:

Equation
\[V_{out(\max)} = 0.7 + 6.8 = 7.5\,V\]

During the \(+14\,V\) half cycle the output is clamped at \(7.5\,V\), so the capacitor charges to \(14 - 7.5 = 6.5\,V\) with its input-side plate positive. For a negative output the branch blocks, the capacitor holds that charge, and the input swing appears directly at the output:

Equation
\[V_{out(\min)} = -14 - 6.5 = -20.5\,V\]
A
Final Answer
Correct answer: A.
Question 05

Question 5

[2] In the transistor circuit with \(V_{BE} = 0.8\,V\), \(\alpha=1\), and resistors shown, collector-to-emitter voltage \(V_{CE}\) is:

GATE 2017 Analog Electronics Q5 transistor circuit diagram
GATE 2017 Analog Electronics Q5 transistor circuit diagram

Solution

- Calculate Thevenin equivalent at base. - Calculate emitter current \(I_E\). - Calculate \(V_{CE} = V_{CC} - I_C R_C - I_E R_E = 18 - 8 - 4 = 6\,V\).

Question 06

Question 6

Average reading of DC voltmeter connected to diode circuit for input \(v(t) = 10 \sin \omega t\), \(f=50\) Hz is:

GATE 2017 Analog Electronics Q6 diode circuit diagram
GATE 2017 Analog Electronics Q6 diode circuit diagram

Solution

The single series diode gives a half-wave rectified voltage across the \(1\,k\Omega\) load, so the meter reads the average of one half sine per period:

Equation
\[V_{dc} = \frac{V_m}{\pi} = \frac{10}{3.1416} = 3.18\,V\]
Question 07

Question 7

MOSFET operating in saturation with channel length modulation behaves as a:

  1. Voltage source, zero output impedance
  2. Voltage source, non-zero output impedance
  3. Current source, finite output impedance
  4. Current source, infinite output impedance

Solution

- Channel length modulation introduces finite output resistance. - MOSFET acts as a current source with finite output impedance.

C
Final Answer
Correct answer: C.
Question 08

Question 8

The voltage gain of an op-amp amplifier with open-loop gain \(10^5\) and cutoff \(8\,Hz\) at \(15\,kHz\) is (V/V):

GATE 2017 Analog Electronics Q8 op-amp circuit diagram
GATE 2017 Analog Electronics Q8 op-amp circuit diagram

Solution

- Feedback factor \(\beta = \frac{R_1}{R_1 + R_2} = \frac{1}{80}\). - Closed-loop mid-band gain \(A_{f0} = \frac{A}{1 + A\beta} = \frac{10^5}{1 + 1250} = 79.9\). - Closed-loop bandwidth \(f_H = f_c(1 + A \beta) = 8 \times (1 + 10^5 \times \frac{1}{80}) \approx 10\,kHz\). - Gain at \(15\,kHz\):

Equation
\[|A_f| = \frac{A_{f0}}{\sqrt{1 + (f/f_H)^2}} = \frac{79.9}{\sqrt{1 + (15/10)^2}} = 44.4\]
Question 09

Question 9

NMOS transistor with threshold voltage \(1\,V\), transconductance parameter \(1\,mA/V^2\), connected as shown. Drain current \(I_D\) is (mA):

GATE 2017 Analog Electronics Q9 NMOS circuit diagram
GATE 2017 Analog Electronics Q9 NMOS circuit diagram

Solution

The gate divider gives \(V_G = 8 \times \frac{5}{3+5} = 5\,V\), and the \(1\,k\Omega\) source resistor makes \(V_{GS} = 5 - I_D R_S\). With \(I_D\) in mA:

Equation
\[I_D = \frac{1}{2}k_n(V_{GS}-V_{TH})^2 = \frac{1}{2}(5 - I_D - 1)^2 \implies I_D^2 - 10I_D + 16 = 0\]

The roots are \(8\,mA\) and \(2\,mA\). The first gives \(V_{GS} = -3\,V < V_{TH}\) and is discarded, so \(I_D = 2\,mA\). Then \(V_{GS} = 3\,V\) and \(V_{DS} = 8 - 2(1+1) = 4\,V > V_{GS}-V_{TH} = 2\,V\), confirming saturation.

Question 10

Question 10

For common emitter amplifier with given resistor values, midband voltage gain magnitude is (approximately):

GATE 2017 Analog Electronics Q10 amplifier circuit diagram
GATE 2017 Analog Electronics Q10 amplifier circuit diagram

Solution

[Image of Common Emitter amplifier small signal model]

- Calculate transconductance \(g_m = I_C / V_T\). - \(g_m = 2\,mA / 25\,mV = 80\,mS\). - \(A_v = -g_m R_C = -80 \times 1.6 k\Omega = -128\).

Question 11

Question 11

A good transconductance amplifier has:

  1. High input impedance, low output impedance
  2. Low input impedance, high output impedance
  3. High input impedance, high output impedance
  4. Low input impedance, low output impedance

Solution

- Good transconductance amplifiers (Voltage-controlled Current Source) have high input and high output impedance.

C
Final Answer
Correct answer: C.
Question 12

Question 12

For the op-amp circuit with \(\pm15\,V\) saturation, the upper and lower threshold voltages are respectively:

GATE 2017 Analog Electronics Q12 op-amp circuit diagram
GATE 2017 Analog Electronics Q12 op-amp circuit diagram
  1. \(+5\,V\) and \(-5\,V\)
  2. \(+7\,V\) and \(-3\,V\)
  3. \(+3\,V\) and \(-7\,V\)
  4. \(+3\,V\) and \(-3\,V\)

Solution

[Image of Schmitt trigger circuit thresholds]

- Compute using voltage divider relation and output saturation. - Thresholds approx \(+7\,V\) and \(-3\,V\).

B
Final Answer
Correct answer: B.
Question 13

Question 13

The Miller effect in a Common Emitter amplifier causes:

  1. Increase in low-frequency cutoff
  2. Increase in high-frequency cutoff
  3. Decrease in low-frequency cutoff
  4. Decrease in high-frequency cutoff

Solution

- Miller effect increases effective input capacitance. - This decreases the high frequency cutoff—attenuates bandwidth.

D
Final Answer
Correct answer: D.
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