GATE 2011 Analog Electronics Questions and Solutions

In the circuit shown below, assume that the voltage drop across a forward biased diode is \(0.7\,\mathrm{V}\). The thermal voltage \(V_t = KT/q = 25\,mV\). The small signal input \(v_i = V_p \cos(\omega t)\) where \(V_p = 100\,mV\).

The ac output voltage \(V_{ac}\) is:

1. \(0.25\cos(\omega t) \text{ mV}\)
2. \(1\cos(\omega t) \text{ mV}\)
3. \(2\cos(\omega t) \text{ mV}\)
4. \(22\cos(\omega t) \text{ mV}\)

Solution

First, we perform a DC analysis to find the quiescent current \(I_{DC}\) to calculate the diode's dynamic resistance.

The dynamic resistance \(r_d\) for a single diode is \(r_d = \frac{\eta V_T}{I_{DC}}\). Assuming \(\eta=1\):

Since there are 4 diodes in series, the total dynamic resistance is \(r_{d,total} = 4 \times r_d = 100\,\Omega\). For the AC analysis, the circuit is a voltage divider. The AC output voltage \(V_{ac}\) is the voltage across the total dynamic resistance:

For the BJT \(Q_1\) in the circuit shown below, \(\beta = \infty\), \(V_{BEon} = 0.7\,\mathrm{V}\), \(V_{CEsat} = 0.7\,\mathrm{V}\). The switch is initially closed. At time t=0, the switch is opened. The time t at which \(Q_1\) leaves the active region is:

1. \(10\,ms\)
2. \(25\,ms\)
3. \(100\,ms\)
4. \(50\,ms\)

Solution

1. Find DC operating point (before t=0): The switch is closed, so \(V_C = 0\,\mathrm{V}\). We find the emitter current \(I_E\) by applying KVL to the base-emitter loop:

Since \(\beta = \infty\), \(I_C = I_E = 1\,mA\). The transistor is in the active region since \(V_{CE} = V_C - V_E = 0 - (-5.7) = 5.7\,\mathrm{V}\), which is \(> V_{CEsat}\).

2. Analyze for t > 0: At t=0, the switch opens. The base and emitter voltages are fixed, so \(I_C\) remains \(1\,mA\) (as long as it's active). The \(0.5\,mA\) current source and \(I_C\) both flow towards the collector node. The current \(I_{cap}\) that charges the capacitor is the difference (flowing away from the node):

3. Find saturation condition: The transistor leaves the active region and enters saturation when \(V_{CE} = V_{CEsat} = 0.7\,\mathrm{V}\). Since \(V_E\) is fixed at \(-5.7\,\mathrm{V}\), saturation occurs when:

4. Calculate time: The capacitor \(C = 5\,\mu F\) charges from \(V_C(0) = 0\,\mathrm{V}\) to \(V_{C(sat)} = -5.0\,\mathrm{V}\) with a constant current \(I_{cap} = 0.5\,mA\). Using the capacitor equation \(I = C \frac{dV}{dt}\), which for constant current is \(t = \frac{C \cdot |\Delta V|}{I}\):

In the circuit shown below, for the MOS transistors, \(\mu_n C_{OX} = 100\,\mu A/V^2\) and the threshold voltage \(V_T = 1\,\mathrm{V}\). The voltage \(V_x\) at the source of the upper transistor is:

1. \(1\,\mathrm{V}\)
2. \(2\,\mathrm{V}\)
3. \(3\,\mathrm{V}\)
4. \(3.67\,\mathrm{V}\)

Solution

Both transistors are in series, so their drain currents are equal: \(I_{D1} = I_{D2}\). Let the upper transistor be M1 and the lower be M2.

1. Analyze M1 (Upper): \(V_{GS1} = V_G - V_S = 5 - V_x\). \(V_{DS1} = V_D - V_S = 6 - V_x\). Saturation check: \(V_{DS1} > V_{GS1} - V_T \implies 6 - V_x > (5 - V_x) - 1 \implies 6 > 4\). This is always true, so M1 is in saturation.

2. Analyze M2 (Lower): \(V_{GS2} = V_G - V_S = V_x - 0 = V_x\) (since \(V_D\) is tied to \(V_G\)). \(V_{DS2} = V_D - V_S = V_x - 0 = V_x\). Saturation check: \(V_{DS2} > V_{GS2} - V_T \implies V_x > V_x - 1 \implies 0 > -1\). This is always true (assuming \(V_x > V_T\)), so M2 is also in saturation.

3. Equate Currents: Using \(I_D = \frac{1}{2} \mu_n C_{OX} (\frac{W}{L}) (V_{GS} - V_T)^2\):

Take the square root of both sides:

Case 1 (+): \(8 - 2V_x = V_x - 1 \implies 9 = 3V_x \implies V_x = 3\,\mathrm{V}\). Case 2 (-): \(8 - 2V_x = -(V_x - 1) = -V_x + 1 \implies 7 = V_x\). We must check validity. If \(V_x = 7\,\mathrm{V}\), \(V_{GS1} = 5 - 7 = -2\,\mathrm{V}\), which is \(< V_T\), so M1 would be in cut-off. This solution is invalid. The correct solution is \(V_x = 3\,\mathrm{V}\).

The circuit below implements a filter between the input current \(I_i\) and the output voltage \(V_o\). Assume that the opamp is ideal. The filter implemented is a:

1. low pass filter
2. band pass filter
3. band stop filter
4. high pass filter

Solution

This is a transimpedance (current-to-voltage) amplifier. The transfer function is \(H(s) = \frac{V_o(s)}{I_i(s)} = -Z_f\). The feedback impedance \(Z_f\) is the parallel combination of \(R_1\) and \(L_1\):

So, \(H(s) = - \frac{sR_1L_1}{R_1 + sL_1}\). We can analyze the filter's behavior at frequency extremes:

• At \(\omega = 0\) (DC): \(s=0\). The inductor \(L_1\) acts as a short circuit (\(X_L = 0\)). This shorts the feedback path, making \(Z_f = 0\). Therefore, \(V_o = 0\). The gain is zero.
• At \(\omega \to \infty\) (high frequency): \(s \to \infty\). The inductor \(L_1\) acts as an open circuit (\(X_L \to \infty\)). The feedback path is now just \(R_1\), so \(Z_f = R_1\). Therefore, \(V_o = -I_i \cdot R_1\). The gain is a constant \(-R_1\).

Since the filter has zero gain at low frequencies and a constant, non-zero gain at high frequencies, it is a **high pass filter**.

In the circuit shown below, capacitors C1 and C2 are very large and are shorts at the input frequency. \(v_i\) is a small signal input. The gain magnitude \(|v_o/v_i|\) at \(10\,M rad/s\) is:

1. maximum
2. minimum
3. unity
4. zero

Solution

The collector load of the BJT is a parallel RLC tank circuit. The gain of this common-emitter amplifier is \(A_v = -g_m (Z_C || R_L)\), where \(Z_C\) is the impedance of the collector tank and \(R_L = 2\,k\Omega\) is the load resistor. The tank circuit consists of an inductor \(L = 10\,\mu H\) and two resistors in parallel. There is an unlabeled capacitor \(C\) in parallel with \(L\). Let's find the resonant frequency \(\omega_0\) of the \(LC\) tank.

Assuming the unlabeled capacitor value (often \(1\,nF\) in such problems or implied to match the frequency): If we calculate with \(L=10\,\mu H\) and \(C=1\,nF\):

This is \(10\,M rad/s\), which matches the input frequency. At the resonant frequency, a parallel \(LC\) tank circuit presents its maximum impedance. Since the voltage gain \(|A_v|\) is directly proportional to this impedance, the gain will be **maximum** at the resonant frequency.