By the end of this chapter you should be able to:
- Describe the three internal stages of an op-amp and explain what each contributes to the terminal behaviour.
- Derive the differential and common-mode gains of an emitter-coupled pair and compute CMRR as a ratio and in decibels.
- State the ideal op-amp assumptions and apply the virtual-short and virtual-ground results.
- Show quantitatively how negative feedback desensitises closed-loop gain against changes in open-loop gain.
- Use the 741's data-sheet parameters — \(V_{OS}\), \(I_B\), \(I_{OS}\), CMRR, slew rate and unity-gain bandwidth — in error calculations.
- Apply the constant gain–bandwidth product to find the bandwidth of a closed-loop amplifier.
- Distinguish slew-rate limiting from bandwidth limiting and compute the full-power bandwidth.
Chapter 25 ended with an exchange rate: gain can be traded for bandwidth, for linearity and for predictable impedances, and the trading is done by negative feedback. The operational amplifier is that idea taken to its limit. It is a cascade of three stages with an open-loop voltage gain of about 200 000, a figure so large that it is useless as it stands — 60 microvolts at the input drives the output from one supply rail to the other — and so poorly controlled that the data sheet quotes a minimum of 50 000 and a typical of 200 000 for the same part number. Neither the size nor the vagueness matters, because the gain is not meant to be used. It is meant to be given away.
The name is historical. These amplifiers were built in the 1940s to perform mathematical operations — addition, integration, differentiation — in analogue computers, and the operation was set entirely by the passive components connected round the amplifier. That is still the defining property: an op-amp circuit's behaviour is determined by the feedback network, not by the amplifier. This chapter builds the device up from the differential pair, states the idealisation that makes analysis trivial, and then works through the ways in which a real 741 departs from it — offset, bias current, finite CMRR, finite bandwidth and slew rate. Chapter 27 uses the ideal model to derive circuits; this chapter tells you when the ideal model will let you down.
1 A Differential-Input, Single-Ended-Output Block
An operational amplifier has two inputs and one output, and it responds to the difference between the inputs:
\(v_+\) is the non-inverting input and \(v_-\) the inverting input. The output is measured with respect to ground, which is not a terminal of the device at all — the reference comes from the midpoint of the two supplies.
Three properties define the block and each is delivered by one of the three internal stages of Figure 26.1.
- The differential input stage is the emitter-coupled pair of Section 2. It provides high input impedance, a gain of a few hundred, and — the reason it is used rather than a single common-emitter stage — near-total rejection of anything common to both inputs, including the temperature drift that Chapter 25 identified as fatal to direct coupling. Because the two transistors are on the same die within a few tens of microns of each other, their \(V_{BE}\) drifts track to within a few microvolts per degree instead of 2 mV per degree.
- The voltage gain stage is a common-emitter stage, usually a Darlington to avoid loading the input stage, and it contributes the bulk of the gain. It also carries the 30 pF compensation capacitor, which is deliberately Miller-multiplied to about 3 µF of effective input capacitance so that the whole amplifier has a single dominant pole at 5 Hz. That capacitor is why the response of Figure 26.3 is a single straight line.
- The output stage is a class-AB complementary pair, following Chapter 20. It has unity voltage gain and exists only to convert the gain stage's high output impedance into something that can drive a load — about 75 Ω open-loop, and a small fraction of an ohm once feedback is applied. It also carries the short-circuit protection that lets a 741 survive its output being tied to ground indefinitely.
The cascade of Figure 26.1 has an open-loop gain of \(500 \times 400 \times 1 = 2\times10^{5}\), which is 106.0 dB, and this is where the numbers used throughout the chapter come from. Note that the differential-input, single-ended-output arrangement is not symmetrical: two inputs collapse into one output, and the information about the common-mode level is deliberately thrown away. How completely it is thrown away is the subject of the next section.
2 The Differential Amplifier and CMRR
Two matched transistors with their emitters joined and returned to a current source form the emitter-coupled pair of Figure 26.2. Any input can be decomposed into a differential part and a common-mode part:
and by superposition the output is \(v_o = A_dv_d + A_{cm}v_{cm}\). The circuit is designed so that the first term is large and the second nearly zero.
Differential gain. Drive the two bases in antiphase by \(\pm v_d/2\). The emitter node cannot move, because the two emitter currents change by equal and opposite amounts and their sum is fixed by the tail source; it is a virtual earth for differential signals. Each half is therefore a common-emitter stage with an emitter resistance of \(r_e\) and an input of \(v_d/2\):
With a tail current of 1 mA, each transistor carries 0.5 mA, so \(r_e = 26/0.5 = 52\ \Omega\), and with \(R_C = 10\) kΩ the single-ended gain is \(10\,000/104 = 96.15\), or 39.66 dB.
Common-mode gain. Now drive both bases together with \(v_{cm}\). Both emitter currents try to rise together, so the emitter node does move, and it moves across the tail resistance \(R_{\text{tail}}\). Each half now behaves as a common-emitter stage with an unbypassed emitter resistance of \(2R_{\text{tail}}\) — the factor of two because each transistor sees the tail resistance carrying both its own current change and its partner's:
The common-mode rejection ratio is the figure of merit:
Take \(R_C = 10\) kΩ, \(I_{EE} = 1\) mA, \(r_e = 52\ \Omega\), so \(A_d = 96.15\) throughout.
With a plain 47 kΩ tail resistor (which is about what a ±15 V supply allows for 1 mA):
With a transistor current source whose output resistance is 1 MΩ:
A factor of 21, or 26.6 dB, for the price of two transistors and a resistor. That is why every op-amp input stage uses an active tail, and the 741 does better still — 90 dB typical — because its tail is a Widlar current mirror with an output resistance of several megohms.
What CMRR means in use. Suppose the pair sits with 5 V of common-mode level on both inputs and is expected to resolve a 1 mV differential signal. The common-mode level produces an output equivalent to an input error of \(v_{cm}/\text{CMRR}\). With the resistor tail that is \(5/904.3 = 5.53\) mV — five times larger than the signal, so the measurement is worthless. With the current source it is \(5/19\,231 = 0.26\) mV, a 26 per cent error. With the 741's 90 dB it is \(5/31\,623 = 0.158\) mV, 16 per cent. Only the instrumentation amplifier of Chapter 27, which reaches 110 dB or better, makes such a measurement respectable.
Notice what the differential pair has solved. A single common-emitter stage cannot be direct-coupled through many stages because \(V_{BE}\) drifts at about \(-2\) mV/°C and the drift is amplified along with the signal. In a matched pair both \(V_{BE}\)s drift together, so the drift is a common-mode input and is rejected. The residual, called the input offset voltage drift, is a few microvolts per degree — three orders of magnitude better, and the reason integrated circuits can be built with no coupling capacitors at all.
3 The Ideal Op-Amp and the Virtual Short
The idealisation is a list of limits, each of which a real device approaches closely enough that the error is worth computing separately rather than carrying through the algebra.
| Parameter | Ideal | 741 typical | Consequence of the ideal value |
|---|---|---|---|
| Open-loop gain \(A_{OL}\) | \(\infty\) | \(2\times10^{5}\) (106 dB) | \(v_+ - v_- \to 0\): the virtual short |
| Input impedance \(Z_{in}\) | \(\infty\) | 2 MΩ | the inputs draw no current |
| Output impedance \(Z_{out}\) | 0 | 75 Ω | the output voltage is independent of load |
| Bandwidth | \(\infty\) | 1 MHz unity-gain | gain does not fall with frequency |
| CMRR | \(\infty\) | 90 dB | only the difference matters |
| Offset voltage \(V_{OS}\) | 0 | 2 mV (6 mV max) | zero in gives zero out |
| Slew rate | \(\infty\) | 0.5 V/µs | the output follows instantly |
The virtual short. Rearranging the defining equation, \(v_+ - v_- = v_o/A_{OL}\). If the output is within its linear range — say \(\pm13\) V on a 741 — and \(A_{OL} = 2\times10^{5}\), then the largest the input difference can be is \(13/(2\times10^{5}) = 65\ \mu\)V. For a 10 V output it is 50 µV. Compared with the volts at the terminals of a typical circuit that is nothing, so:
The first is the virtual short: with negative feedback present and the output not saturated, the amplifier drives its output to whatever value makes the two inputs equal. It is virtual because no current flows between the terminals — they are held at the same potential by the amplifier's action, not by a wire. The second follows from the infinite input impedance. When the non-inverting input is grounded, the first rule makes the inverting input a virtual ground: it sits at 0 V without being connected to ground, which is why the inverting amplifier of Chapter 27 has an input impedance of exactly \(R_1\).
The condition for the rules to hold. Both require negative feedback — a path from the output back to the inverting input — and a non-saturated output. Remove the feedback and the amplifier runs open-loop: 65 µV of input difference is enough to slam the output to a rail, and it will stay there. That is not a fault, and Chapter 27 uses it deliberately in the comparator. But it means the virtual short must never be assumed in a circuit whose feedback goes to the non-inverting input, where it is positive and drives the output away from balance rather than towards it.
Open loop against closed loop. Open-loop, the amplifier is a comparator with an unusable gain, an unpredictable offset and a 5 Hz bandwidth. Closed-loop, with a feedback fraction \(\beta = v_f/v_o\) returned to the inverting input, the gain becomes
The quantity \(A_{OL}\beta\) is the loop gain and \(1+A_{OL}\beta\) is the desensitivity factor. Everything the op-amp does well — accuracy, low distortion, high input impedance, low output impedance, wide bandwidth — improves by that factor, and the gain falls by it. That is the trade of Chapter 25 written as one equation.
4 What Negative Feedback Buys
Differentiate the closed-loop expression with respect to \(A_{OL}\) and the central result falls out:
A fractional change in the open-loop gain produces a fractional change in the closed-loop gain smaller by the desensitivity factor. This is the single most useful property of negative feedback, and it is why an amplifier built round a device with a three-to-one gain tolerance can have a gain accurate to a fraction of a per cent.
A non-inverting amplifier uses \(R_f = 100\) kΩ and \(R_1 = 1\) kΩ, so the feedback fraction is \(\beta = R_1/(R_1+R_f) = 1/101\) and the ideal gain is \(1/\beta = 101\). With \(A_{OL} = 2\times10^{5}\):
The error against the ideal 101 is 0.050 per cent. Now change the op-amp for one whose open-loop gain is half as large, \(A_{OL} = 1\times10^{5}\) — well within the 741's own sample-to-sample spread:
a change of 0.050 per cent for a 50 per cent change in the device. Doubling \(A_{OL}\) instead gives 100.975, a change of 0.025 per cent. A 50 per cent uncertainty in the amplifier has become a 0.05 per cent uncertainty in the circuit, and the remaining uncertainty is dominated by the tolerance of \(R_f\) and \(R_1\) — which is exactly where a designer wants it, because 0.1 per cent resistors cost pennies.
The same factor everywhere. The output impedance falls from 75 Ω to \(75/1981.2 = 0.038\ \Omega\); the input impedance of the non-inverting connection rises from 2 MΩ to \(2\ \text{M}\Omega \times 1981.2 = 3.96\) GΩ (in practice limited to a few hundred megohms by leakage across the package); and the harmonic distortion falls by the same 1981 times. Ask more gain of the circuit and all of these deteriorate together: at \(A_{CL} = 1000\) the loop gain is only 200, the closed-loop gain is 995.0 rather than 1000 — a 0.50 per cent error — and halving \(A_{OL}\) now shifts it by 0.50 per cent.
The pattern is worth stating plainly, because it recurs in every feedback circuit in this course. Feedback does not improve the amplifier; it converts an excess of gain into whatever property is in short supply. Where there is a lot of surplus gain the conversion is nearly perfect, and where there is little — at high frequency, or at high closed-loop gain — it is not. Every departure from ideal behaviour in the rest of this chapter can be traced to the loop gain running out.
5 The Real Device: Offset, Bias Current and CMRR
The first group of imperfections is present at d.c. and would be there even if the signal never changed.
Input offset voltage \(V_{OS}\). The two halves of the input pair are matched but not identical: a mismatch of a few tenths of a per cent in the collector resistors or in the transistor saturation currents means that the output is zero for some small non-zero input difference. \(V_{OS}\) is defined as the differential input voltage that must be applied to bring the output to zero, and for a 741 it is 2 mV typical and 6 mV maximum. It is amplified by the noise gain \(1/\beta\), which for both the inverting and the non-inverting connection is \(1+R_f/R_1\):
Two millivolts of imperfection has become 202 mV of output error — on a \(\pm13\) V swing, 1.6 per cent of full scale, and completely intolerable if the circuit is meant to amplify a thermocouple.
Input bias and offset currents. The bases of the input pair must draw base current, so the inputs are not open circuits. \(I_B\) is the average of the two, 80 nA for a 741, and \(I_{OS} = |I_{B+}-I_{B-}|\) is the difference, 20 nA. The bias current flows through whatever resistance it sees and develops a voltage there. With \(R_f = 100\) kΩ in the feedback path, the uncompensated error is
The cure is a matter of symmetry. Put a resistor equal to \(R_f\|R_1 = 100\,\text{k}\|1\,\text{k} = 990\ \Omega\) in series with the non-inverting input, so that both inputs see the same d.c. resistance. The two bias currents then produce equal voltages that cancel in the difference, and what remains is only the offset current term, \(I_{OS}R_f = 20\ \text{nA}\times100\ \text{k}\Omega = 2\) mV — a fourfold improvement for one resistor. Adding the worst case of both effects, \(202 + 2 = 204\) mV of output error, or 2.02 mV referred to the input.
Offset nulling. The 741 brings out two pins, 1 and 5, connected to the emitters of the input stage's current-mirror load. A 10 kΩ potentiometer across them with its wiper to \(-V_{EE}\) unbalances the mirror deliberately and can be adjusted to bring the output to exactly zero with the inputs shorted. The nulling is exact only at the temperature and supply voltage at which it was performed, because \(V_{OS}\) drifts at about 5 µV/°C and shifts with supply voltage — the parameter for that is the power-supply rejection ratio, typically 30 µV/V. Where a trim is unacceptable, the answer is a chopper-stabilised or auto-zero amplifier, whose offset is a few microvolts and whose drift is measured in tens of nanovolts per degree.
Finite CMRR. The 741's 90 dB corresponds to a ratio of 31 623. In a non-inverting amplifier the whole input signal appears as a common-mode voltage at both inputs, so a 1 V input produces an equivalent input error of \(1/31\,623 = 31.6\ \mu\)V, which the noise gain of 101 turns into 3.19 mV at the output. In an inverting amplifier both inputs sit at the virtual ground and there is no common-mode swing at all, which is one genuine advantage of the inverting connection and the reason it is preferred for precision work where the source can tolerate the lower input impedance.
A 741 amplifies a thermocouple whose output is 40 µV per degree, in a non-inverting connection with \(R_f = 100\) kΩ and \(R_1 = 1\) kΩ, so the gain is 101 and 1 °C should give 4.04 mV at the output. Assume the balancing resistor of 990 Ω is fitted and the common-mode level is 0.5 V. Take the 741's typical figures \(V_{OS} = 2\) mV, \(I_{OS} = 20\) nA, CMRR = 90 dB.
| Source of error | Referred to the input | At the output | Equivalent temperature error |
|---|---|---|---|
| Offset voltage \(V_{OS}\) | 2 mV | 202 mV | 50.0 °C |
| Offset current, \(I_{OS}R_f\) | 2 mV | 202 mV | 50.0 °C |
| Finite CMRR, \(v_{cm}/\text{CMRR}\) | 15.8 µV | 1.60 mV | 0.40 °C |
| Total | 4.016 mV | 405.6 mV | 100.4 °C |
The measurement is meaningless: the error is 100 °C where the signal is 1 °C. Read the table as a list of instructions rather than a verdict. Nulling the offset removes the first row and leaves 50.4 °C, now dominated entirely by the bias-current term — and that term is proportional to \(R_f\), so reducing \(R_f\) to 10 kΩ and \(R_1\) to 100 Ω, which keeps the gain at 101, cuts it tenfold to 5.0 °C. To do better the device must change. An OP07-class precision amplifier with \(V_{OS} = 60\ \mu\)V, \(I_{OS} = 0.8\) nA and CMRR = 110 dB gives 1.50, 0.20 and 0.04 °C for the three rows, a total of 69.6 µV referred to the input, or 1.74 °C — and even that would need a chopper-stabilised part to become a real thermometer. Knowing which row dominates is what turns a data sheet into a component choice.
Two limits complete the d.c. picture and are easy to forget in a laboratory. The input common-mode range of a 741 on \(\pm15\) V rails is about \(\pm13\) V; drive both inputs beyond it and the input stage leaves the active region, whereupon the output may invert its behaviour entirely — the notorious phase reversal. And the output swing reaches only about \(\pm13\) V into 10 kΩ, falling to \(\pm10\) V into 2 kΩ, because the class-AB stage needs headroom for its own \(V_{BE}\)s and its current limiting. Neither of these appears anywhere in the ideal model, and both are the first thing to check when a circuit that analyses correctly sits stubbornly at a rail.
6 Gain–Bandwidth and Slew Rate
The second group of imperfections appears only when the signal moves, and the two members of it are quite different in kind: one is a small-signal, linear limitation and the other is a large-signal, non-linear one. Confusing them is the commonest error in op-amp design.
The gain–bandwidth product. The 30 pF compensation capacitor gives the open-loop response a single dominant pole. Its break frequency is where the gain begins to fall:
Above 5 Hz the gain falls at 20 dB per decade, so the product of gain and frequency is constant along the whole slope and equal to the unity-gain frequency. Closing the loop at any gain \(A_{CL}\) therefore gives
A gain of 10 gives 100 kHz, a gain of 100 gives 10 kHz, a gain of 1000 gives 1 kHz. There is no way round it with one amplifier: the only remedies are a faster device, or two amplifiers of gain 10 in cascade instead of one of gain 100, which gives a bandwidth of \(100\ \text{kHz} \times \sqrt{2^{1/2}-1} = 64.4\) kHz by the shrinkage formula of Chapter 25 — more than six times better than 10 kHz.
Slew rate. The output of an op-amp cannot change faster than a fixed number of volts per microsecond, no matter how small the signal or how large the loop gain. The cause is straightforward: the compensation capacitor \(C_c\) must be charged by the input stage, and the input stage can supply no more than its tail current \(I_{EE}\) however hard it is driven. So
This is a large-signal limit and it is not covered by the gain–bandwidth product at all. A sine wave \(v_o = V_p\sin\omega t\) has a maximum slope \(\omega V_p\) at the zero crossing, so the largest sine wave that emerges undistorted at frequency \(f\) has
This is the full-power bandwidth. For a 741 delivering 10 V peak, \(f_{\max} = 0.5\times10^{6}/(2\pi \times 10) = 7958\) Hz. Beyond that the output becomes the triangle wave of Figure 26.4.
A 741 is wired as a non-inverting amplifier of gain 10 and asked to deliver a 20 kHz sine wave of (a) 1 V peak and (b) 10 V peak.
Small-signal check. The closed-loop bandwidth is \(\text{GBW}/A_{CL} = 1\ \text{MHz}/10 = 100\) kHz, so at 20 kHz the amplifier is well inside its band and the gain is down by only \(20\log_{10}[1/\sqrt{1+(20/100)^2}] = -0.17\) dB. Neither case is bandwidth-limited.
Slew-rate check. The slope required is \(2\pi f V_p\). For 1 V peak that is \(2\pi(20\,000)(1) = 0.1257\ \text{V}/\mu\text{s}\), comfortably below 0.5, and the output is a clean sine. For 10 V peak it is \(1.257\ \text{V}/\mu\text{s}\), two and a half times the limit, and the output is a triangle of reduced amplitude with gross distortion. The full-power bandwidth is 7.96 kHz, so 20 kHz at 10 V peak was never possible.
The moral. The two limits scale differently: bandwidth depends on gain and not on amplitude, slew rate on amplitude and not on gain. An amplifier can be well within its \(-3\) dB bandwidth and still be grossly slew-limited, which is why an oscilloscope shows triangles where the small-signal analysis promised sines. Testing an op-amp circuit with a small signal and then using it with a large one is how this is discovered too late. Turning it round, the largest peak output a 741 can produce at 1 MHz is \(0.5\times10^{6}/(2\pi\times10^{6}) = 0.0796\) V — 80 mV, which is what "1 MHz unity-gain bandwidth" actually means in practice.
Chapter 27 now takes the ideal model and builds circuits with it. Every result there is derived from \(v_+ = v_-\) and \(i_\pm = 0\), and every one of them is subject to the corrections of this chapter: an offset that the noise gain multiplies, a bandwidth that the closed-loop gain divides, and a slew rate that the output amplitude challenges.
7 Summary and Key Results
| Quantity | Expression | Value |
|---|---|---|
| Defining relation | \(v_o = A_{OL}(v_+-v_-)\) | \(A_{OL} = 2\times10^{5} \equiv 106.0\) dB |
| Differential gain | \(A_d = R_C/2r_e\) (single-ended) | 96.15, or 39.66 dB, at \(I_{EE} = 1\) mA |
| Common-mode gain | \(A_{cm} = R_C/(2R_{\text{tail}}+r_e)\) | 0.1063 with 47 kΩ; 0.005000 with a 1 MΩ source |
| CMRR | \(|A_d/A_{cm}| \approx R_{\text{tail}}/r_e\) | 904.3 (59.13 dB) or 19 231 (85.68 dB) |
| Virtual short | \(v_+-v_- = v_o/A_{OL}\) | 50 µV for a 10 V output — treat as zero |
| Closed-loop gain | \(A_{CL} = A_{OL}/(1+A_{OL}\beta)\) | 100.949 against an ideal 101 |
| Desensitivity | \(dA_{CL}/A_{CL} = (dA_{OL}/A_{OL})/(1+A_{OL}\beta)\) | 50 % change in \(A_{OL}\) gives 0.05 % in \(A_{CL}\) |
| Closed-loop \(Z_{out}\) | \(Z_{out}/(1+A_{OL}\beta)\) | 75 Ω becomes 0.038 Ω |
| Offset voltage | \(V_{o} = V_{OS}(1+R_f/R_1)\) | 2 mV → 202 mV at a noise gain of 101 |
| Bias current | \(I_BR_f\) uncompensated | 80 nA × 100 kΩ = 8 mV |
| Offset current | \(I_{OS}R_f\) with a 990 Ω balancing resistor | 20 nA × 100 kΩ = 2 mV |
| Finite CMRR error | \(v_{cm}(1+R_f/R_1)/\text{CMRR}\) | 1 V c.m. at 90 dB gives 3.19 mV out |
| Open-loop break | \(f_c = f_{\text{unity}}/A_{OL}\) | 5 Hz |
| Gain–bandwidth | \(A_{CL}\times\text{BW} = \text{GBW}\) | gain 10 → 100 kHz; 100 → 10 kHz; 1000 → 1 kHz |
| Slew rate | \(\text{SR} = I_{EE}/C_c\) | 15 µA / 30 pF = 0.5 V/µs |
| Full-power bandwidth | \(f_{\max} = \text{SR}/2\pi V_p\) | 7.96 kHz at 10 V peak; 79.6 kHz at 1 V peak |
8 Common Mistakes
The rule \(v_+ = v_-\) is not a property of the device; it is a consequence of the amplifier having enough gain to drive its own inputs together, which it can only do when the feedback path returns to the inverting input and the output is not saturated. In a comparator, where there is no feedback at all, the input difference is whatever the signal makes it and the output is at a rail; in a Schmitt trigger, where the feedback goes to the non-inverting input, the feedback is positive and the inputs are deliberately driven apart. Writing \(v_+ = v_-\) in either circuit gives a nonsensical answer — typically a single operating point where the real circuit has two stable states. Before using the rule, find the feedback path and check where it lands.
These are different failures with different symptoms and different cures. Bandwidth limiting is linear: the output stays sinusoidal and simply shrinks, it depends on the closed-loop gain through \(\text{GBW}/A_{CL}\), and it is unaffected by amplitude. Slew limiting is non-linear: the output turns into a triangle, it depends on the amplitude through \(f_{\max} = \text{SR}/2\pi V_p\), and it is unaffected by gain. A 741 at a gain of 10 has 100 kHz of bandwidth but only 7.96 kHz of full-power bandwidth at 10 V peak, so it can be twelve times inside its \(-3\) dB point and still be badly distorting. If reducing the input amplitude cleans up the waveform, it was slew rate; if it does not, it was bandwidth.
The ideal op-amp draws no input current, but a 741 draws 80 nA, and 80 nA through a 1 MΩ source resistance is 80 mV — larger than most signals worth amplifying. The error is not the current itself but the imbalance in the resistance the two inputs see, so the fix is to make them equal: a resistor of \(R_f\|R_1\) in series with the non-inverting input reduces the error from \(I_BR_f = 8\) mV to \(I_{OS}R_f = 2\) mV in the worked circuit. The same reasoning explains why a d.c. path to ground must exist at both inputs: an a.c.-coupled non-inverting amplifier with nothing but a capacitor at the \(+\) input has no route for the bias current, so the input charges to a rail and the amplifier saturates.
9 Chapter Review
1. A differential pair has \(R_C = 15\) kΩ and a tail current of 400 µA supplied through a 68 kΩ resistor. Find \(r_e\), the single-ended differential gain, the common-mode gain and the CMRR in decibels. Then repeat with a current source of output resistance 2 MΩ.
Each transistor carries 200 µA, so \(r_e = 26\ \text{mV}/0.2\ \text{mA} = 130\ \Omega\). The single-ended differential gain is \(A_d = R_C/2r_e = 15\,000/260 = 57.69\), which is 35.22 dB. With the 68 kΩ tail resistor, \(A_{cm} = R_C/(2R_{\text{tail}}+r_e) = 15\,000/(136\,000+130) = 0.1102\), so CMRR \(= 57.69/0.1102 = 523.5\), or 54.38 dB. With a 2 MΩ current source, \(A_{cm} = 15\,000/(4\,000\,000+130) = 0.003750\) and CMRR \(= 57.69/0.003750 = 15\,385\), or 83.74 dB — an improvement of 29.4 dB. Two lessons. The differential gain does not depend on the tail impedance at all, so the improvement is free in signal terms. And the low bias current has helped the CMRR indirectly: \(r_e\) is 130 Ω here against 52 Ω in the chapter's example, and since CMRR \(\approx R_{\text{tail}}/r_e\), running the pair at a lower current raises the rejection for the same tail impedance, at the cost of gain.
2. An inverting amplifier uses \(R_1 = 2\) kΩ and \(R_f = 200\) kΩ with a 741. Find the ideal gain, the noise gain, the actual closed-loop gain, the worst-case output offset with \(V_{OS} = 6\) mV and \(I_{OS} = 20\) nA and a proper balancing resistor, and the closed-loop bandwidth.
The ideal gain is \(-R_f/R_1 = -100\). The noise gain — the factor by which offset and input noise are amplified, and the reciprocal of the feedback fraction — is \(1+R_f/R_1 = 101\), not 100; the distinction matters here. The loop gain is \(A_{OL}\beta = 2\times10^{5}/101 = 1980.2\), so the actual gain is \(-100 \times 1980.2/1981.2 = -99.95\), an error of 0.05 per cent, negligible beside the 1 per cent resistors. For the offset, the balancing resistor is \(R_1\|R_f = 2\,\text{k}\|200\,\text{k} = 1.980\ \text{k}\Omega\), and with it in place the two contributions are \(V_{OS} \times 101 = 6\ \text{mV}\times101 = 606\) mV and \(I_{OS}R_f = 20\ \text{nA}\times200\ \text{k}\Omega = 4\) mV, giving 610 mV worst case. That is 4.7 per cent of a 13 V full scale and would have to be nulled. The bandwidth is \(\text{GBW}\) divided by the noise gain, \(1\ \text{MHz}/101 = 9.90\) kHz — note that it is the noise gain, not the signal gain of 100, that sets the bandwidth, which is why an inverting amplifier of gain \(-1\) has a bandwidth of 500 kHz and not 1 MHz.
3. Show that a 741 wired as a unity-gain follower cannot reproduce a 5 V peak sine wave at 30 kHz, and find the two frequencies at which each limit is reached.
There are two independent limits and it is worth testing both. The small-signal limit: at unity gain the noise gain is 1, so the closed-loop bandwidth is the full \(\text{GBW} = 1\) MHz, and 30 kHz is a thirty-third of it — the gain is down by \(20\log_{10}[1/\sqrt{1+(0.03)^2}] = -0.004\) dB, entirely negligible. The circuit is nowhere near its bandwidth limit. The large-signal limit: a 5 V peak sine at 30 kHz needs a maximum slope of \(2\pi fV_p = 2\pi(30\,000)(5) = 0.942\ \text{V}/\mu\text{s}\), which is 1.88 times the 741's 0.5 V/µs. The output will be a triangle. Solving \(f_{\max} = \text{SR}/2\pi V_p = 0.5\times10^{6}/(2\pi\times5) = 15.9\) kHz gives the highest frequency at which 5 V peak is available. So the slew limit bites at 15.9 kHz and the bandwidth limit not until 1 MHz — a factor of 63 apart. To get 30 kHz at 5 V peak one needs \(\text{SR} \ge 2\pi(30\,000)(5) = 0.942\ \text{V}/\mu\text{s}\), so a device such as the TL071 at 13 V/µs would do it with a factor of 14 in hand. Reducing the amplitude also works: at 2 V peak the full-power bandwidth rises to 39.8 kHz.
4. Explain why the same 741 has a common-mode error in the non-inverting connection and essentially none in the inverting connection, and quantify both for a 1 V input at a gain magnitude of 50 with CMRR = 90 dB.
CMRR describes the amplifier's response to the voltage that both inputs share, so what matters is how much the input terminals actually move. In the non-inverting connection the signal is applied directly to the \(+\) input and the virtual short carries it to the \(-\) input as well, so both terminals swing with the full input: the common-mode voltage is 1 V. In the inverting connection the \(+\) input is tied to ground and the virtual short holds the \(-\) input at ground too, so neither terminal moves at all and the common-mode voltage is essentially zero — the signal is a current into a virtual earth, not a voltage at the input pins. Quantitatively, CMRR = 90 dB is a ratio of \(10^{90/20} = 31\,623\). For the non-inverting amplifier of gain 50 the noise gain is 50, so the output error is \(v_{cm}(\text{noise gain})/\text{CMRR} = 1 \times 50/31\,623 = 1.58\) mV, against a 50 V wanted output — 32 parts per million, which sounds small but is 1.58 mV of d.c. error that varies with the input and so cannot be trimmed out. For the inverting amplifier of gain \(-50\) the common-mode voltage is a few tens of microvolts at most and the error is below a nanovolt. This is the standard argument for the inverting topology in precision d.c. measurement, and against it wherever the source cannot supply current into the \(R_1\) it must drive.
5. An op-amp with GBW = 1 MHz is needed to give a gain of 1000 over 20 kHz. Show that one stage cannot do it, and design a two-stage cascade that can, checking the bandwidth shrinkage of Chapter 25.
One stage: a closed-loop gain of 1000 gives a bandwidth of \(1\ \text{MHz}/1000 = 1\) kHz, twenty times short of the requirement. Increasing the bandwidth to 20 kHz would restrict the gain to \(1\ \text{MHz}/20\ \text{kHz} = 50\). No single-amplifier arrangement escapes this, because \(A_{CL}\times\text{BW}\) is fixed by the compensation capacitor. Two stages: give each a gain of \(\sqrt{1000} = 31.62\), so each has a bandwidth of \(1\ \text{MHz}/31.62 = 31.62\) kHz. Cascading two identical single-pole stages shrinks the overall bandwidth by \(\sqrt{2^{1/2}-1} = 0.6436\), giving \(31.62\ \text{kHz}\times0.6436 = 20.35\) kHz. That just meets the requirement, with 1.8 per cent in hand — uncomfortably little, so in practice one would use three stages of gain \(1000^{1/3} = 10\), each with a bandwidth of 100 kHz, shrinking by \(\sqrt{2^{1/3}-1} = 0.5098\) to \(50.98\) kHz, two and a half times the requirement. Two further checks are needed before committing. The slew rate must support the wanted output: at 20 kHz and, say, 10 V peak the requirement is 1.257 V/µs, so a 741 at 0.5 V/µs fails and a faster device is needed regardless of bandwidth. And the offset multiplies: three stages of gain 10 give a total offset gain of \(11 + 11\times11 + 11\times11\times11 = 1463\) times the first stage's \(V_{OS}\) if all three are d.c.-coupled, so the first stage must be a low-offset device or the chain must be a.c.-coupled between stages.