By the end of this chapter you should be able to:
- Derive the inverting and non-inverting gain expressions from the virtual-short and zero-input-current rules.
- Design summing, difference and instrumentation amplifiers and state the resistor matching each demands.
- Quantify the CMRR of a difference amplifier built from resistors of a given tolerance.
- Analyse ideal and practical integrators and differentiators, and explain the stabilising components each needs.
- Design voltage-to-current and current-to-voltage converters and the precision rectifier.
- Explain how a diode or transistor inside the feedback loop produces logarithmic and antilogarithmic transfer functions.
- Derive the trip points of a Schmitt trigger and choose the hysteresis for a given noise amplitude.
Chapter 26 established two rules: with negative feedback present and the output unsaturated, an op-amp holds \(v_+ = v_-\) and draws no input current. Everything in this chapter is a consequence of applying those two rules to a different arrangement of passive components. That is the whole method, and it is worth stating explicitly because it makes op-amp analysis unlike anything earlier in this course — there is no device model, no load line, no bias calculation. The amplifier is assumed to do whatever is necessary, and the question is only what "necessary" means for the network attached to it.
The circuits divide into three groups. The linear ones — inverting, non-inverting, summing, difference, instrumentation, integrator, differentiator, and the current and voltage converters — keep the op-amp inside its linear range at all times and are described entirely by resistor and capacitor ratios. The precision-rectifier and logarithmic circuits put a non-linear element inside the feedback loop, so that the loop gain divides the non-linearity away and leaves an accurate mathematical operation. The comparator and the Schmitt trigger abandon negative feedback altogether and use the raw open-loop gain as a decision element. Each group has its own failure modes, and this chapter says what they are as well as how the circuits work.
1 The Two Amplifiers Everything Else Is Built From
The inverting amplifier. Ground the non-inverting input, drive the inverting input through \(R_1\), and return \(R_f\) from the output to the same node. The virtual short puts the inverting node at 0 V — a virtual ground — and since no current enters the op-amp, the current through \(R_1\) must continue through \(R_f\):
With \(R_f = 100\) kΩ and \(R_1 = 10\) kΩ the gain is \(-10\), and it is set by nothing but a resistor ratio. Two resistors of the same material on the same board track to a few parts per million with temperature, so the gain is more stable than anything else in the signal path.
The input impedance is exactly \(R_1\), because the source drives a resistor whose far end is held at 0 V. That is a genuine limitation: an inverting amplifier of gain \(-100\) with a 1 MΩ input impedance needs \(R_f = 100\) MΩ, which is impractical — such a resistor is noisy, expensive and its stray capacitance sets a low-pass corner in the audio band. The output impedance is the op-amp's own divided by the loop gain, some tens of milliohms.
The non-inverting amplifier. Drive the non-inverting input directly, and feed a fraction of the output back to the inverting input through the divider \(R_1\), \(R_f\). The virtual short gives \(v_- = v_i\), and the divider gives \(v_- = v_oR_1/(R_1+R_f)\), so
The same resistors give \(+11\) rather than \(-10\). The gain cannot be less than one, which is the price of the non-inverting connection; the input impedance, on the other hand, is the op-amp's own multiplied by the loop gain, so hundreds of megohms.
Take a 741 (\(A_{OL} = 2\times10^{5}\), GBW = 1 MHz) with \(R_1 = 10\) kΩ and \(R_f = 100\) kΩ. The feedback fraction is \(\beta = R_1/(R_1+R_f) = 1/11\), so the loop gain is \(A_{OL}\beta = 2\times10^{5}/11 = 18\,182\).
Inverting connection. The exact gain is \(A_v = -(R_f/R_1)\cdot A_{OL}\beta/(1+A_{OL}\beta) = -10 \times 18\,182/18\,183 = -9.99945\). The error is 55 parts per million, five hundred times smaller than the tolerance of a 1 per cent resistor.
Non-inverting connection. \(A_v = A_{OL}/(1+A_{OL}\beta) = 2\times10^{5}/18\,183 = 10.99940\) against an ideal 11 — the same 55 ppm.
Bandwidth. Both circuits have the same noise gain \(1/\beta = 11\), so both have a bandwidth of \(\text{GBW}/11 = 90.9\) kHz. Note that it is the noise gain that divides the GBW, not the signal gain, so the inverting amplifier of gain \(-10\) has 90.9 kHz rather than the 100 kHz its signal gain would suggest.
Virtual ground. For a 10 V output the inverting node is not at 0 V but at \(v_o/A_{OL} = 50\ \mu\)V. On any oscilloscope it is zero, and treating it as zero introduced the 55 ppm error above. The assumption fails only when the loop gain runs out — at high frequency, or at very high closed-loop gain.
2 The Voltage Follower and the Summing Amplifier
The voltage follower. Set \(R_f = 0\) and \(R_1 = \infty\) in the non-inverting amplifier — that is, join the output straight to the inverting input — and the gain becomes exactly 1. The circuit does nothing to the voltage, which is the point: it has an input impedance of hundreds of megohms and an output impedance of a few tens of milliohms, so it is a buffer, the op-amp equivalent of the emitter follower of Chapter 19 and a far better one. Because \(\beta = 1\), the loop gain is the full \(A_{OL}\) and the bandwidth is the full 1 MHz — the follower is the fastest and most accurate configuration an op-amp has.
The standard use is to stop one circuit from loading another. A potential divider of two 1 MΩ resistors has a Thévenin resistance of 500 kΩ and cannot drive a 10 kΩ load without collapsing to 2 per cent of its no-load voltage; put a follower between them and the divider sees no load at all while the 10 kΩ sees a stiff source.
The summing amplifier. The virtual ground of the inverting amplifier has a property that no other node in electronics has: currents arriving at it do not interact, because the node's voltage is held at zero regardless of how much current flows into it. Connect several inputs through their own resistors and the currents simply add:
If all the input resistors are equal to \(R\), this is \(v_o = -(R_f/R)(v_1+v_2+\cdots+v_n)\) — a scaled sum. If they differ, each input gets its own weight \(R_f/R_k\), which is why the circuit is also called a weighted adder. There is no interaction between channels at all: changing \(v_1\) does not alter the current from \(v_2\), because the node they share never moves.
Weighted sum. Take \(R_f = 10\) kΩ with \(v_1 = 1\) V through 10 kΩ, \(v_2 = 2\) V through 20 kΩ and \(v_3 = 3\) V through 50 kΩ. The three contributions are \(-1.0\), \(-1.0\) and \(-0.6\) V, so \(v_o = -2.6\) V. The equal contributions from the first two inputs illustrate the weighting: 2 V through twice the resistance carries the same current as 1 V through half of it.
A digital-to-analogue converter. Give four inputs the binary-weighted resistances 10, 20, 40 and 80 kΩ with \(R_f = 10\) kΩ, and drive each from a logic gate that produces either 0 V or 1 V. The weights are then 1, 0.5, 0.25 and 0.125, so the output is \(-0.125\) V per least-significant bit and full scale (all four inputs at 1 V) is \(-1.875\) V. The circuit converts a binary number into a voltage in one step. Its weakness is that an \(n\)-bit converter needs resistors spanning \(2^{n-1}:1\) — for 12 bits that is 2048:1, and the largest resistor must match the smallest to better than one part in 4096, which is why practical converters use the R-2R ladder instead, where no resistor ratio exceeds 2:1.
One caution applies to every inverting circuit with several inputs. The noise gain is \(1 + R_f/(R_1\|R_2\|\cdots\|R_n)\), not \(1 + R_f/R_k\) for any single channel. With four 10 kΩ inputs and \(R_f = 10\) kΩ the signal gain per channel is \(-1\) but the noise gain is \(1 + 10/2.5 = 5\), so the offset voltage is amplified five times and the bandwidth is a fifth of the GBW. Adding channels costs bandwidth and d.c. accuracy even though it does not change the gain.
3 The Difference and Instrumentation Amplifiers
Applying superposition to an op-amp with signals at both inputs gives the difference amplifier. With \(R_1\) from \(v_1\) to the inverting node, \(R_2\) as feedback, \(R_3\) from \(v_2\) to the non-inverting node and \(R_4\) from that node to ground:
Choose \(R_3 = R_1\) and \(R_4 = R_2\) and the second coefficient collapses to \(R_2/R_1\), leaving the clean result
The circuit subtracts, and it rejects whatever the two inputs have in common. But notice what has been assumed: two ratios must be equal, not two resistors. Everything about the circuit's usefulness rests on that matching.
What mismatch costs. Write the two coefficients as \(a_1\) and \(a_2\); then \(A_{cm} = a_2 - a_1\) and \(A_d = (a_2+a_1)/2\), and CMRR \(= |A_d/A_{cm}|\). If the ratios are perfectly matched, \(A_{cm}\) is exactly zero and the CMRR is infinite. If the resistors have a fractional tolerance \(t\), the worst case is
Take a gain of 10: \(R_1 = R_3 = 10\) kΩ, \(R_2 = R_4 = 100\) kΩ.
One resistor 1 per cent high. Let \(R_4 = 101\) kΩ and the rest exact. Then \(a_1 = -10\) and \(a_2 = (101/111)(11) = 10.00901\), so \(A_{cm} = 0.009009\) and \(A_d = 10.0045\), giving CMRR \(= 1110\), or 60.9 dB.
All four at their tolerance limits. Enumerating the sixteen sign combinations of \(\pm1\) per cent gives a worst case of CMRR \(= 275.0\), or 48.79 dB — which is exactly \((1+10)/(4\times0.01)\), confirming the rule. With 0.1 per cent resistors it becomes 2750, or 68.79 dB.
What that means. The op-amp itself has a CMRR of 90 dB; four 1 per cent resistors have thrown away 41 dB of it. To measure a 2.5 mV differential signal sitting on a 5 V common-mode level to 1 per cent accuracy needs CMRR \(= 5/(0.01\times0.0025) = 200\,000\), or 106 dB — unreachable with any ordinary resistor tolerance. This single calculation is why the difference amplifier is not used for bridge transducers and why the instrumentation amplifier exists.
The instrumentation amplifier. Two further faults compound the CMRR problem. The difference amplifier's input impedances are \(R_1\) and \(R_3 + R_4\), which are unequal and both modest, so a source with any resistance of its own unbalances the ratios further. And changing the gain requires changing two resistors simultaneously while preserving their match, which no potentiometer can do.
The three-op-amp arrangement of Figure 27.2 fixes all three. Two followers-with-gain buffer the inputs, and they are cross-coupled by \(R\), \(R_G\), \(R\). Because no current flows into either op-amp input, the whole of \(v_1-v_2\) appears across \(R_G\), and the current it drives, \((v_1-v_2)/R_G\), flows through both \(R\)s as well. The differential output of the first stage is therefore \((v_1-v_2)(1+2R/R_G)\), while a common-mode input produces no current in \(R_G\) at all and passes through with a gain of exactly one. The first stage amplifies the difference and not the common mode, so it raises the CMRR by its own differential gain:
The gain is set by one resistor, \(R_G\), which need not match anything — a 500 Ω \(R_G\) gives 201 and a 10 kΩ one gives 11. The matched pairs are confined to the third stage, where they are trimmed once at manufacture, and the input impedance is that of two non-inverting inputs, hundreds of megohms. A monolithic instrumentation amplifier reaches 110 dB or better, which is what the bridge measurement of Worked Example 27.3 needed. That is why every strain gauge, load cell, thermocouple and biopotential electrode in existence is read by one.
4 The Integrator and the Differentiator
Replace the feedback resistor by a capacitor. The current into the virtual ground is still \(v_i/R\), and it must all flow into \(C\), whose voltage is the integral of the current through it:
With \(R = 100\) kΩ and \(C = 0.1\ \mu\)F, \(RC = 10\) ms, so a steady 1 V input drives the output down at 100 V per second. After 5 ms the output is \(-0.5\) V; after 130 ms it would be at \(-13\) V, and the amplifier would saturate.
Why the ideal integrator is useless. That saturation happens with no signal at all. The op-amp's own offset voltage and bias current are indistinguishable from a real d.c. input, and the integrator integrates them faithfully: a 2 mV offset with \(RC = 10\) ms drives the output at 0.2 V per second, so the circuit hits the rail in about a minute and stays there. In frequency terms, the ideal integrator has a gain of \(1/2\pi fRC\), which tends to infinity as \(f \to 0\) — infinite d.c. gain, and there is nothing to hold the operating point.
The practical integrator puts a large resistor \(R_f\) across the capacitor. At d.c. the capacitor is an open circuit and the circuit is an ordinary inverting amplifier of gain \(-R_f/R\), which is finite, so the offset is amplified by a fixed amount instead of ramping. Above the break frequency \(f_b = 1/2\pi R_fC\) the capacitor dominates and true integration resumes:
The rule of thumb is \(R_f \ge 10R\), and the circuit integrates properly for signals at least a decade above \(f_b\) — here from about 16 Hz upwards.
The differentiator is the same idea reversed: capacitor at the input, resistor in the feedback path.
With \(R_f = 100\) kΩ and \(C = 0.01\ \mu\)F, \(R_fC = 1\) ms, so a ramp rising at 1000 V/s gives a steady \(-1\) V output. A square-wave input gives spikes, and a triangular input gives a square wave — the inverse of the integrator's behaviour.
Why the ideal differentiator is worse than useless. Its gain is \(2\pi fR_fC\), which rises with frequency without limit. That has two consequences. High-frequency noise, which is present in every real signal and is exactly the component a differentiator amplifies most, swamps the output: a 1 mV interference spike at 100 kHz is amplified 628 times while a 1 V signal at 100 Hz is amplified 0.628 times. Worse, the input capacitor introduces a 90° phase lag into the feedback loop which adds to the op-amp's own lag; at the frequency where the noise gain crosses the falling open-loop response the total approaches 180°, the feedback becomes positive, and the circuit oscillates. A differentiator built exactly as the textbook draws it will very often ring or oscillate on the bench.
The cure is a small resistor \(R_1\) in series with the input capacitor. Above \(f = 1/2\pi R_1C\) the capacitor's reactance is small compared with \(R_1\) and the circuit becomes an ordinary inverting amplifier of gain \(-R_f/R_1\) instead of continuing to rise. With \(R_1 = 1\) kΩ and \(C = 0.01\ \mu\)F that corner is at 15.9 kHz and the gain is limited to 100. The circuit differentiates properly up to about a tenth of that, 1.6 kHz, and is stable and quiet above it. A small capacitor across \(R_f\) is often added for the same purpose.
5 Converters and the Precision Rectifier
The current-to-voltage converter is the inverting amplifier with \(R_1\) removed: a current source is connected directly to the virtual ground and the whole of it flows through \(R_f\), giving \(v_o = -i_{in}R_f\). Its virtue is that the source sees a virtual short circuit — zero volts across it — which is exactly what a photodiode wants, because any voltage across a photodiode makes its dark current and its capacitance worse. A photodiode delivering 1 µA into \(R_f = 1\) MΩ gives 1 V out, and the same circuit resolves 1 nA as 1 mV. The transimpedance, as the gain of such a stage is called, is measured in ohms.
The voltage-to-current converter inverts the arrangement. Put the load in the feedback path of an inverting amplifier: the current through it is \(v_i/R_1\), set entirely by the input voltage and the input resistor, and independent of the load's own resistance because the op-amp will supply whatever voltage is needed. With \(v_i = 1\) V and \(R_1 = 1\) kΩ the load carries 1 mA whether it is a 100 Ω resistor or a 5 kΩ one — up to the point where the op-amp runs out of output swing, at \(5\ \text{k}\Omega \times 1\ \text{mA} = 5\) V here, comfortably within a \(\pm13\) V limit. The restriction is that the load must float; a grounded load needs the Howland current pump, which uses four matched resistors and suffers from the same matching sensitivity as the difference amplifier.
The precision rectifier. A plain diode rectifier does not work below about 0.7 V, and works badly below a few volts, because the diode drop is subtracted from the signal: a 1 V peak input gives 0.3 V out, a 30 per cent error, and a 100 mV input gives nothing at all. The conduction angle is also wrong, since the diode is off for the part of the cycle when the input is below 0.7 V.
Put the diode inside the feedback loop and the problem disappears. In the superdiode, a follower drives the load through a diode with the feedback taken from the load side, so the op-amp adjusts its output to whatever value makes the load voltage equal the input. To do that it must supply the diode's drop out of its own output swing, and the input voltage needed to start conduction is only
Five orders of magnitude better than the diode alone. The circuit rectifies millivolt signals accurately, which is what makes true a.c. millivoltmeters and precision peak detectors possible.
The improvement is proportional to the loop gain, and the loop gain falls at 20 dB per decade. At 10 kHz a 1 MHz-GBW op-amp has an open-loop gain of only \(10^{6}/10^{4} = 100\), so the effective diode drop is \(0.7/100 = 7\) mV rather than 3.5 µV — a two-thousandfold deterioration. Worse, on the negative half-cycle the diode is off, the loop is broken entirely, and the op-amp output slams to the negative rail; when the input goes positive again the output must slew all the way back, which for a 741 at 0.5 V/µs takes \((13+0.7)/0.5 = 27.4\ \mu\)s. That dead time is a quarter of a cycle at 10 kHz. The improved half-wave rectifier, which keeps a second diode conducting on the unused half-cycle so the loop is never broken, exists precisely to remove this recovery delay, and a fast op-amp should be used regardless.
6 Logarithmic and Antilogarithmic Amplifiers
The same manoeuvre — a non-linear element inside the loop — produces a logarithm. Put a diode in the feedback path of an inverting amplifier. The current into the virtual ground is \(v_i/R\), and it must flow through the diode, whose equation from Chapter 6 is \(I = I_S(e^{V/\eta V_T}-1) \approx I_Se^{V/\eta V_T}\) for forward voltages above about 100 mV. Since the diode's anode is at the virtual ground and its cathode at the output, \(V_D = -v_o\), and
The output is proportional to the logarithm of the input. In decade terms the scale factor is \(V_T\ln 10 = 26 \times 2.3026 = 59.87\) mV per decade with \(\eta = 1\): an input that changes from 0.1 V to 1 V to 10 V produces an output that changes in equal steps of 59.87 mV.
Two practical points follow immediately. First, \(v_i\) must be positive with the diode oriented this way, since a logarithm of a negative number is undefined and the circuit simply stops working; a second, reversed channel is needed for bipolar signals. Second, the input range is limited at the bottom by the \(-1\) in the diode equation and by leakage, and at the top by the diode's bulk resistance, which adds a linear term \(IR_S\) to the exponential. A transistor is used instead of a diode in every serious design, connected with its collector at the virtual ground and its base grounded: the collector current follows \(I_C = I_Se^{V_{BE}/V_T}\) with almost no bulk-resistance term and with \(\eta\) equal to 1 to within a fraction of a per cent, giving six or seven decades of accurate logarithmic range instead of two or three.
Temperature is the real difficulty. Both \(V_T = kT/q\) and \(I_S\) appear in the answer. \(V_T\) is proportional to absolute temperature, so the scale factor drifts by \(1/300 = 0.33\) per cent per degree; \(I_S\) roughly doubles every 10 °C, which shifts the whole characteristic sideways and is far worse. Practical logarithmic amplifiers therefore use a matched transistor pair, one carrying the signal and one a reference current, so that the two \(I_S\) terms cancel in the difference, and a temperature-sensitive resistor in the output divider to compensate the residual \(V_T\) dependence.
The antilogarithmic amplifier exchanges the two components: the diode or transistor goes in series with the input and the resistor becomes the feedback element. Then \(i = I_Se^{v_i/\eta V_T}\) and
Together the two circuits perform multiplication and division, because \(\log a + \log b = \log ab\): take the logarithm of each input with a log amplifier, add them in a summing amplifier, and take the antilogarithm. Raising a signal to a power is the same construction with a gain in the middle — a gain of 0.5 between the log and antilog stages produces a square root. Before analogue multiplier chips existed this was how analogue computers multiplied, and the log-ratio amplifier remains the standard front end for absorbance measurements in spectrophotometry, where the wanted quantity is literally \(\log(I_0/I)\).
7 Comparators and the Schmitt Trigger
Remove the feedback altogether and the op-amp becomes a comparator. With \(A_{OL} = 2\times10^{5}\), an input difference of 65 µV is enough to drive the output to a rail, so the output is \(+V_{sat}\) whenever \(v_+ > v_-\) and \(-V_{sat}\) whenever \(v_+ < v_-\). It is a one-bit analogue-to-digital converter, and it is how a zero-crossing detector, a level detector and the trigger circuit of an oscilloscope are built.
Why a plain comparator misbehaves. Consider a slowly rising input crossing the threshold, with 50 mV of noise on it. Every time the noise carries the signal back across the threshold the output changes state, so a single crossing produces a burst of transitions. If the comparator drives a counter, the count is wrong; if it drives a relay, the relay chatters. The problem is intrinsic: a device with a single threshold and enormous gain must respond to every crossing of it, however brief.
The Schmitt trigger solves this by making the threshold depend on the present output state. A fraction of the output is fed back to the non-inverting input, so the feedback is positive, and the threshold moves away from the input as soon as the output switches.
for the inverting configuration of Figure 27.4, where the signal enters the inverting input, \(R_2\) returns from the output to the non-inverting input, and \(R_1\) takes that node to ground. With \(R_1 = 10\) kΩ, \(R_2 = 100\) kΩ and \(V_{sat} = 13\) V, UTP \(= +1.182\) V, LTP \(= -1.182\) V, and the hysteresis is 2.364 V.
The non-inverting Schmitt trigger takes the signal to the non-inverting input through \(R_1\), returns \(R_2\) from the output to the same node, and grounds the inverting input. Switching occurs when the node reaches zero, so \(v_iR_2 + V_{sat}R_1 = 0\) and
Note the different formula: \(R_1/R_2\), not \(R_1/(R_1+R_2)\), and the thresholds can now exceed \(V_{sat}\) if \(R_1 > R_2\), which the inverting version cannot do.
Sizing the loop. A sensor output crosses a threshold slowly and carries 80 mV peak-to-peak of noise. The hysteresis must exceed the noise with margin, so take \(V_H = 400\) mV, five times the noise. In the inverting configuration with \(V_{sat} = 13\) V, \(V_H = 2V_{sat}R_1/(R_1+R_2) = 0.4\) V requires \(R_1/(R_1+R_2) = 0.4/26 = 0.01538\), so with \(R_1 = 1.5\) kΩ, \(R_2 = 96\) kΩ; the nearest preferred value 100 kΩ gives \(V_H = 2(13)(1.5/101.5) = 384\) mV, still 4.8 times the noise. There is a cost to over-generous hysteresis: the trip points move \(\pm192\) mV from where they were intended, so the circuit does not switch at the level asked for. Hysteresis must be large enough to reject the noise and no larger.
Offsetting the thresholds. Both loops above are centred on zero, which is rarely what is wanted. Returning \(R_1\) to a reference \(V_{ref}\) instead of ground shifts the whole loop: UTP \(= V_{ref}R_2/(R_1+R_2) + V_{sat}R_1/(R_1+R_2)\) and LTP the same with a minus sign. With \(R_1 = 10\) kΩ, \(R_2 = 100\) kΩ, \(V_{sat} = 13\) V and \(V_{ref} = 2\) V, UTP \(= 1.818 + 1.182 = 3.000\) V and LTP \(= 1.818 - 1.182 = 0.636\) V — the same 2.364 V of hysteresis, now centred on 1.818 V. A thermostat with a 3 °C dead band is exactly this circuit.
Speed. A 741 is a poor comparator: to swing from \(-13\) V to \(+13\) V at 0.5 V/µs takes 52 µs, so the output is a recognisable square wave only below about 9.6 kHz. A dedicated comparator such as the LM311 has no compensation capacitor, an open-collector output and a propagation delay of about 200 ns. The general rule is that a device optimised for linear feedback operation is optimised for exactly the wrong thing when used open-loop.
The Schmitt trigger's positive feedback also makes it the basis of the relaxation oscillator: connect an RC network from the output to the inverting input and the circuit charges towards one threshold, switches, and charges towards the other, producing a square wave at a frequency set by \(RC\) and the hysteresis. Chapter 29 develops that idea, along with the sinusoidal oscillators that use positive feedback of a much more carefully controlled kind.
8 Summary and Key Results
| Circuit | Transfer function | Worked value |
|---|---|---|
| Inverting amplifier | \(v_o = -(R_f/R_1)v_i\) | \(-10\) with 100 kΩ/10 kΩ; exact answer \(-9.99945\); \(Z_{in} = 10\) kΩ |
| Non-inverting amplifier | \(v_o = (1+R_f/R_1)v_i\) | \(+11\); exact 10.99940; \(Z_{in}\) hundreds of MΩ |
| Voltage follower | \(v_o = v_i\) | gain 1, bandwidth the full 1 MHz |
| Summing amplifier | \(v_o = -R_f\sum v_k/R_k\) | 1 V/10 k + 2 V/20 k + 3 V/50 k into 10 k gives \(-2.6\) V |
| Binary-weighted DAC | \(R, 2R, 4R, 8R\) into \(R_f = R\) | 0.125 V per bit; full scale \(-1.875\) V |
| Difference amplifier | \(v_o = (R_2/R_1)(v_2-v_1)\) | needs \(R_3/R_4 = R_1/R_2\) exactly |
| Difference-amp CMRR | \((1+R_2/R_1)/4t\) | gain 10: 275 (48.8 dB) at 1 %; 2750 (68.8 dB) at 0.1 % |
| Instrumentation amplifier | \(G = (1+2R/R_G)(R_2/R_1)\) | 101 with \(R = 50\) kΩ, \(R_G = 1\) kΩ |
| Ideal integrator | \(v_o = -(1/RC)\int v_i\,dt\) | \(RC = 10\) ms: 1 V for 5 ms gives \(-0.5\) V |
| Practical integrator | \(R_f\) across \(C\) | \(R_f = 1\) MΩ: d.c. gain \(-10\), break 1.59 Hz |
| Differentiator | \(v_o = -R_fC\,dv_i/dt\) | \(R_fC = 1\) ms: 1000 V/s gives \(-1\) V |
| Differentiator stability | \(R_1\) in series with \(C\) | \(R_1 = 1\) kΩ: gain limited to 100 above 15.9 kHz |
| I-to-V converter | \(v_o = -i_{in}R_f\) | 1 µA into 1 MΩ gives 1 V; source sees 0 V |
| V-to-I converter | \(i_L = v_i/R_1\) | 1 V into 1 kΩ gives 1 mA, load independent |
| Precision rectifier | \(v_{i(\min)} = V_D/A_{OL}\) | 3.5 µV at d.c.; 7 mV at 10 kHz |
| Logarithmic amplifier | \(v_o = -\eta V_T\ln(v_i/RI_S)\) | 59.87 mV per decade; 0.33 %/°C scale drift |
| Inverting Schmitt | \(\pm V_{sat}R_1/(R_1+R_2)\) | \(\pm1.182\) V, \(V_H = 2.364\) V with 10 k/100 k |
| Non-inverting Schmitt | \(\pm V_{sat}R_1/R_2\) | \(\pm1.3\) V, \(V_H = 2.6\) V with the same resistors |
9 Common Mistakes
The closed-loop bandwidth is \(\text{GBW}\) divided by the noise gain \(1/\beta = 1+R_f/R_1\), and the output offset is \(V_{OS}\) multiplied by the same quantity. For the non-inverting amplifier the noise gain and the signal gain happen to be equal, so nothing goes wrong; for the inverting amplifier they differ by one, and for a summing amplifier they can differ by a large factor. Four 10 kΩ inputs into a 10 kΩ feedback resistor give a signal gain of \(-1\) per channel but a noise gain of \(1+10/2.5 = 5\), so the bandwidth is 200 kHz rather than 500 kHz and the offset is amplified five times, not twice. The extreme case is the unity-gain inverter, \(R_f = R_1\): its signal gain is \(-1\) but its noise gain is 2, so it has half the bandwidth of the voltage follower that has the same signal gain magnitude.
Both ideal circuits are unusable, for opposite reasons. The ideal integrator has infinite d.c. gain, so the op-amp's own offset voltage and bias current ramp the output to a rail within a minute with no signal applied; it needs \(R_f\) across the capacitor, typically \(10R\), to give it a finite d.c. gain. The ideal differentiator has a gain rising without limit with frequency, so it amplifies noise preferentially and — because the input capacitor adds 90° of lag inside the loop — it very often oscillates; it needs \(R_1\) in series with the capacitor to flatten the response above \(1/2\pi R_1C\). Neither component appears in the derivation, both are essential in the circuit, and a bench full of students whose integrators sit at \(+13\) V is the usual way this is learnt.
The op-amp's own CMRR of 90 dB is irrelevant if the four resistors are 1 per cent parts: the worst-case CMRR is then \((1+R_2/R_1)/4t = 275\), or 48.8 dB, and the resistors have thrown away 41 dB. The mistake is to check the amplifier's data sheet and not the resistor tolerance, and it is compounded by forgetting that the source resistances add to \(R_1\) and \(R_3\) and unbalance the ratios further — a 100 Ω source resistance on one input of a 10 kΩ difference amplifier is a 1 per cent error all by itself. Where the common-mode voltage is large compared with the signal, as in every bridge and every long cable run, the answer is not better resistors but the instrumentation amplifier, whose input stage rejects common mode by topology rather than by matching.
10 Chapter Review
1. Design an inverting amplifier of gain \(-25\) with an input impedance of at least 20 kΩ, using a 741. State the resistor values, the balancing resistor, the closed-loop bandwidth and the worst-case output offset for \(V_{OS} = 6\) mV and \(I_{OS} = 200\) nA.
The input impedance of an inverting amplifier is \(R_1\) exactly, so \(R_1 = 20\) kΩ is the minimum; take \(R_1 = 22\) kΩ as a preferred value, whereupon \(R_f = 25 \times 22 = 550\) kΩ. The nearest preferred value is 560 kΩ, giving a gain of \(-560/22 = -25.45\), a 1.8 per cent error; using 22 kΩ and 549 kΩ from the 1 per cent E96 series gives \(-24.95\). The balancing resistor in series with the non-inverting input is \(R_1\|R_f = 22\|560 = 21.17\) kΩ. The noise gain is \(1 + 560/22 = 26.45\), so the bandwidth is \(1\ \text{MHz}/26.45 = 37.8\) kHz — note that using the signal gain of 25.45 would have given 39.3 kHz, a 4 per cent error in the optimistic direction. The output offset is \(V_{OS} \times 26.45 + I_{OS}R_f = 6\ \text{mV}\times26.45 + 200\ \text{nA}\times560\ \text{k}\Omega = 158.7 + 112 = 270.7\) mV. That is 2.1 per cent of the \(\pm13\) V swing and would need nulling for any d.c. application; for an a.c.-coupled one it is harmless. If the offset matters, note that the bias-current term is proportional to \(R_f\), so scaling both resistors down by ten — 2.2 kΩ and 56 kΩ — would cut it to 11.2 mV at the cost of an input impedance of only 2.2 kΩ.
2. A difference amplifier with a gain of 100 is built from 0.1 per cent resistors. Find its worst-case CMRR, and determine whether it can measure a 1 mV differential signal riding on a 10 V common-mode level to within 2 per cent.
The worst-case CMRR is \((1+R_2/R_1)/4t = (1+100)/(4\times0.001) = 25\,250\), which is 88.05 dB. The differential output is \(100 \times 1\ \text{mV} = 100\) mV, and 2 per cent of that is 2 mV. The common-mode error at the output is \(v_{cm}\times A_d/\text{CMRR} = 10 \times 100/25\,250 = 39.6\) mV — nearly twenty times the permitted error and 40 per cent of the wanted signal. The circuit fails by a wide margin. To meet the requirement, CMRR must be at least \(10\times100/0.002 = 500\,000\), or 114 dB, which from the same formula needs \(t = 101/(4\times500\,000) = 5.05\times10^{-5}\), a tolerance of 0.005 per cent. Individual resistors of that grade are laboratory standards; a monolithic resistor network laser-trimmed on one substrate can reach it, and that is exactly what the inside of an instrumentation amplifier contains. The practical answer is therefore an instrumentation amplifier with a specified CMRR of 120 dB, or a difference amplifier built from a matched network rather than from four discrete parts.
3. An integrator with \(R = 47\) kΩ and \(C = 0.22\ \mu\)F is driven by a symmetrical square wave of \(\pm2\) V at 500 Hz. Sketch the output analytically: find its shape, its peak-to-peak amplitude and its phase. Then add a practical \(R_f\) and state the break frequency.
\(RC = 47\,000 \times 0.22\times10^{-6} = 10.34\) ms. During the positive half-cycle the input is a constant \(+2\) V, so the output ramps at \(-v_i/RC = -2/0.01034 = -193.4\) V/s; during the negative half-cycle it ramps upwards at the same rate. The output is therefore a triangle wave. The half-period is \(1/(2\times500) = 1\) ms, so the output moves \(193.4 \times 10^{-3} = 0.1934\) V in each half-cycle, and the peak-to-peak amplitude is 193.4 mV, that is \(\pm96.7\) mV about the mean. The phase: the triangle reaches its most negative value at the instant the square wave falls, so the output lags the input by a quarter of a period, 90°, which is exactly what integration does to any waveform. For the practical version take \(R_f = 10R = 470\) kΩ: the d.c. gain becomes \(-R_f/R = -10\) and the break frequency is \(f_b = 1/(2\pi \times 470\,000 \times 0.22\times10^{-6}) = 1.54\) Hz. Since the signal is at 500 Hz, more than two decades above \(f_b\), the integration is unaffected — the error in the triangle amplitude is of order \((f_b/f)^2\), utterly negligible — while the output can no longer drift to a rail on offset alone.
4. Explain why a half-wave rectifier built from a plain silicon diode cannot measure a 200 mV r.m.s. a.c. signal, and how the precision rectifier fixes it. Quantify the residual error at 1 kHz for an op-amp with GBW = 1 MHz.
A 200 mV r.m.s. sine has a peak of \(200\sqrt{2} = 283\) mV, which never reaches the roughly 0.6 V a silicon diode needs to conduct usefully. The diode passes essentially nothing, so the output is zero and the measurement is impossible; even at a 2 V peak, where the diode does conduct, the output peak would be \(2 - 0.7 = 1.3\) V instead of 2 V, a 35 per cent error that varies with amplitude and temperature and so cannot be calibrated out. The precision rectifier places the diode inside the feedback loop, taking the feedback from the load side of the diode, so the op-amp raises its own output by whatever the diode drops and the load voltage follows the input. The input voltage required to bring the diode to the edge of conduction is \(V_D/A_{OL}\), the loop gain having divided the threshold away. At 1 kHz the open-loop gain of a 1 MHz-GBW amplifier is \(10^{6}/10^{3} = 1000\), so the effective threshold is \(0.7/1000 = 0.7\) mV, which is 0.25 per cent of the 283 mV peak — usable, though not excellent. At d.c. the same figure would be \(0.7/2\times10^{5} = 3.5\ \mu\)V. The dominant error at 1 kHz is in fact not the threshold but the recovery time: on the negative half-cycle the loop is broken and the output saturates, and a 741 needs \((13+0.7)/0.5 = 27.4\ \mu\)s to slew back, which is 2.7 per cent of the 1 ms period. The improved rectifier topology, with a second diode to keep the loop closed on the unused half-cycle, removes that term.
5. A Schmitt trigger must switch at a nominal 4 V with 500 mV of hysteresis, from a 15 V supply where the op-amp saturates at \(\pm13\) V. Design it, and state what the circuit does with a 5 V peak sine wave at its input.
Use the inverting configuration with the lower end of \(R_1\) returned to a reference \(V_{ref}\) rather than ground, since the thresholds must be centred on 4 V rather than on zero. The hysteresis is \(V_H = 2V_{sat}R_1/(R_1+R_2) = 0.5\) V, so \(R_1/(R_1+R_2) = 0.5/26 = 0.019231\), giving \(R_2/R_1 = 51.0\). Take \(R_1 = 2\) kΩ and \(R_2 = 102\) kΩ, so \(R_1/(R_1+R_2) = 0.019231\) exactly and the trip points sit \(\pm250\) mV from the centre. The centre is \(V_{ref}R_2/(R_1+R_2) = V_{ref} \times 0.98077\), so \(V_{ref} = 4/0.98077 = 4.078\) V, obtained from a divider off the 15 V rail buffered by a follower — unbuffered, the divider's own resistance would appear in parallel with \(R_1\) and shift both the centre and the hysteresis. The result is UTP \(= 4.250\) V and LTP \(= 3.750\) V. Given a 5 V peak sine wave, the input crosses 4.250 V on the way up and 3.750 V on the way down, so the output is a rectangular wave of the same frequency, switching between \(+13\) V and \(-13\) V. Because both thresholds lie in the upper part of the sine's range and not at its centre, the waveform is not symmetrical: solving \(5\sin\theta = 4.25\) and \(5\sin\theta = 3.75\) gives crossings at \(58.2^\circ\) and \(131.4^\circ\), so the output spends \(73.2^\circ\) of every \(360^\circ\) — a duty cycle of 20.3 per cent — in the state that corresponds to the input being above the threshold. A comparator with hysteresis is a level detector, not a zero-crossing detector, and its duty cycle depends on where the thresholds sit relative to the signal.