Thermal Design and Heat-Sink Selection

Work backwards from the junction. The total temperature rise available is fixed by the derated limit and the ambient, and the loss is fixed by Sets 2 and 7:

One kelvin per watt for the whole path — that single number is the thermal budget, and everything else is spending it.

Subtract the links you do not control:

The device and the interface have already consumed a quarter of the budget before any heatsink is chosen. Note the implication: if the loss were 160 W instead of 80, the budget would be 0.5 K/W, the fixed links would still take 0.25, and the heatsink would have to be four times better — not twice.

The intermediate temperatures follow from the same current flowing through each link:

Verify from the other end:

The two routes agree, which they must if the chain is series. This check catches the most common thermal error — adding a resistance in the wrong place, or forgetting that the full loss passes through every link.

Read the temperature distribution. Of the 80 °C total rise:

Three-quarters of the problem is the heatsink, which is both the only link the designer selects and by far the largest and most expensive. That ratio is typical, and it is why improving a thermal design almost always means more surface area or more airflow rather than a better device.

The sink sees the sum; the packages see their own. This is the only structural point in the problem, and it is where mistakes happen:

Both devices start from the same 90 °C platform, however unequal their losses.

Each junction then rises above that platform by its own loss through its own package:

The verdict. Device 1 exceeds 125 °C by one degree; device 2 has 11 °C of margin. A design checked only on its average device — \(90+50(0.6) = 120^\circ\text{C}\) — would have passed, and would have been wrong.

The general rule: on a shared sink, always check the highest-dissipating device, and if the packages differ, check every one, because a low-loss device in a poor package can still be the binding constraint — as happens in Problem 6.

Size the sink properly. Impose the limit on the worst device:

A 2% improvement on the existing sink — which sounds trivial and is not, since heatsink performance improves slowly with size. In practice one would either use a marginally larger extrusion or accept 126 °C against a 150 °C absolute limit.

The alternative worth considering: separate the devices.

Splitting a sink into two of twice the resistance makes the hot device worse, because it loses the thermal help of its cooler neighbour. Sharing a sink is a form of averaging, and averaging always favours the device above the mean — which is precisely the one at risk.

Average power first, because the steady part of the temperature rise depends on it alone:

Split the problem in two. The junction temperature is the steady rise produced by the average power, plus the transient excursion produced by the excess above that average during each pulse:

The average term uses the full steady-state resistance because, over many cycles, the whole thermal mass has come to equilibrium. The pulse term uses the much smaller transient impedance because 10 ms is far too short for the heat to reach the sink.

Evaluate:

Comfortably inside the 125 °C limit, with a 22.5 °C ripple riding on a 95 °C mean.

Now the comparison that makes the point. If 500 W were applied continuously:

Which is not a temperature so much as a statement that the device would be destroyed in well under a second. The same power level is perfectly survivable in 10 ms bursts and instantly fatal continuously — a factor of more than four in temperature rise from nothing but the time scale.

Why \(Z_{th}\) is so much smaller than \(R_{th}\). Each layer of the thermal path has heat capacity as well as resistance, so it takes time to warm up and pass heat onward:

For a short pulse the silicon's own heat capacity absorbs the energy and releases it slowly afterwards. This is exactly the mechanism behind the \(I^2t\) rating of Set 4 — and behind the surge ratings that let a rectifier survive an inrush many times its continuous current.

Where the approximation fails. Two limits are worth naming:

And at the other end, a very short but very intense pulse can melt the die locally even though the average junction temperature is modest — the failure is thermal gradient across the die, not bulk temperature. Single-pulse \(Z_{th}\) curves stop being valid below about 100 µs for this reason, and the safe operating area takes over.

Natural convection — the design of Problem 1:

Exactly at the derated limit, with no margin at all. That was the design intent, but it means every assumption — ambient, loss, mounting quality — must hold perfectly.

With forced air:

A 32 °C reduction from moving air across the same piece of metal. Note that the heatsink more than halved — 0.75 to 0.35 — but the junction temperature rise fell only 40%, because the fixed 0.25 K/W of package and interface does not improve with airflow.

How much more power the fan permits at the same 125 °C:

Which is the real economic argument. A fan costing a few units of currency substitutes for a heatsink two-thirds larger, in a smaller enclosure — and this is why almost every converter above a kilowatt is forced-cooled.

Now the risk. Suppose the design is uprated to 133 W on the strength of the fan, and the fan then fails:

Well past the 150 °C absolute maximum, and the device is destroyed — not eventually, but within the thermal time constant of the heatsink, typically a few minutes. A forced-cooled design has no passive fallback.

What the design must therefore include:

Note that a sink thermistor responds on the heatsink's time constant — minutes — which is fast enough for airflow loss but far too slow for a short circuit. The two failure modes need different protection, and Set 7's desaturation detection handles the fast one.

Dry mounting. Two machined surfaces touch at a small fraction of their apparent area; the rest is air, which is an excellent insulator:

Past any sensible derating and close to the absolute maximum. Dry mounting is not a mounting method; it is a fault.

Thermal grease fills the air gaps with something 200 times more conductive than air:

A 40 °C improvement from a film a few tens of micrometres thick. Note also that more grease is worse, not better: the compound itself is a poor conductor compared with metal, and its only job is to displace air from the gaps that remain after the surfaces are clamped.

Now add electrical isolation, which is usually mandatory — the tab of most power packages is connected to the drain or collector, and several devices sharing a grounded sink cannot all have live tabs:

The isolated package does the same job differently. The isolation is built into the package, so \(R_{th(j-c)}\) is worse but the interface can use plain grease:

Fifteen degrees better than the mica washer, for the same isolation.

Compare the four:

The isolated package wins because it puts the insulating layer where the heat flux is spread over the whole die-attach area, rather than at a mechanical joint where it must also survive clamping force, thermal cycling and assembly variation.

Why the interface is the least reliable link. Every other resistance in the chain is a material property; this one is an assembly outcome:

A design that only works with a perfect interface will fail in production. Allowing 0.15 K/W where 0.1 is nominal costs 5 °C on paper and prevents an entire class of field returns.

Total loss through the baseplate and sink:

Every watt passes through the module baseplate and the heatsink; only the final junction-to-case link is per-device. That asymmetry is what makes module thermal design different from discrete design.

Write the chain for the IGBT, being careful about which loss flows through which link:

And for the diode, which dissipates less but sits behind twice the junction-to-case resistance:

The two are within a degree of each other — 64.25 against 63.5 — which is not a coincidence. Module designers size each die so that all junctions reach their limit together; oversizing the diode would waste area, undersizing it would make the diode the constraint.

The IGBT binds, so impose the limit on it:

Check the diode at that value: \(63.5+300(0.20) = 123.5^\circ\text{C}\) — inside the limit with 1.5 °C to spare. Both constraints are satisfied by the tighter of the two.

The full temperature profile:

Eighty per cent of the total rise happens between the ambient and the heatsink surface. That is where the design effort belongs, and it is why 0.20 K/W at 300 W means forced air at minimum — a natural-convection extrusion of that performance would be impractically large.

Sanity-check the specification. A 0.20 K/W sink dissipating 300 W means:

Which raises three practical points at once: the sink is a burn hazard and needs guarding; the capacitors and gate drivers mounted nearby will see a far higher ambient than 50 °C; and at 110 °C the sink itself radiates significantly, so the real performance will be slightly better than the catalogue figure. A thermal design that stops at the junction temperature has answered only half the question.