Buck–Boost Converters and the CCM–DCM Boundary

The duty ratio. Volt-second balance gives \(V_{in}D = \left|V_o\right|(1-D)\), so:

Above 0.5 because the output magnitude exceeds the input — the converter is boosting. Below 0.5 it would be bucking, and the same expression covers both without a mode change. That seamless crossing is the topology's chief attraction.

The inductor current is larger than either terminal current, because it carries the whole throughput in both intervals:

Check the power: \((12)(2.5) = 30\) W in, \((15)(2) = 30\) W out. The inductor handles 4.5 A to move 2 A of load current — worse than either the buck or the boost, as Problem 6 quantifies.

The inductance, from the on-interval when the input is across it:

The capacitor, which like the boost's must supply the load alone during the entire on-time:

Same form as the boost's, for the same reason — the diode is reverse biased for \(DT_s\) and the capacitor is on its own. And as in the boost, ESR will usually decide the part: the capacitor current steps by the full peak inductor current of 5.18 A.

The device stresses are the sum of the two voltages, which is the converter's other structural penalty:

Compare all three at 30 W:

The buck–boost is worse on every row. It carries more inductor current, blocks more voltage, and pulses at both terminals — so it needs filtering on both sides. What it buys is the only thing neither of the others can do: an output that crosses the input voltage without a topology change.

Define the criterion once. Conduction is continuous while the inductor current never reaches zero, which happens when the ripple is smaller than twice the average. Cast into a dimensionless form:

Large \(K\) means a big inductor, a fast switch, or a heavy load — all of which favour continuous conduction. The topology enters only through \(K_{crit}\).

Check Problem 1's converter:

By a factor of 6.7, so the load could fall to about 15% of rated before the mode changes.

Confirm with the critical current, which says the same thing in amps:

Fifteen per cent of the 2 A rating — matching the \(K\) ratio, as it must. The two forms are the same statement: one in dimensionless parameters, one in the current a designer actually measures.

Now the three topologies side by side:

The buck is by far the hardest to keep continuous — its critical value is five times the boost's at every duty ratio. That is why Set 18's buck went discontinuous at 0.9 A while Set 19's boost needed a deliberately undersized inductor to get there at all.

Why the buck is worst. Its inductor current equals the output current, so as the load falls the average falls with it:

A boost at \(D = 0.75\) carries four times the load current in its inductor, so it has four times as far to fall before the current reaches zero. The critical parameter is just that ratio, squared and folded into the ripple.

How to read the boost's maximum. Its \(K_{crit} = D(1-D)^2\) peaks at \(D = 1/3\):

So a boost's worst case for conduction mode is at a gain of 1.5, not at high gain. A designer checking only the extremes of the duty range would miss it — which is a genuine trap in wide-input PFC designs that sweep through \(D = 1/3\) every half cycle.

Test the mode:

By a factor of six — a small inductor and a light load together. The CCM formula should not be expected to survive this.

The DCM conversion ratio for a buck–boost is the simplest of the three:

Against the continuous prediction:

Thirty volts where twelve was expected — two and a half times over. An open-loop converter designed with the wrong formula would destroy its load, and the failure would be blamed on almost anything except the duty ratio.

Verify by reconstruction:

Self-consistent. Note the idle interval: \(1-0.5-0.2 = 0.30\) — the inductor is empty for 30% of every cycle, which is what makes the ratio load-dependent.

Why the output rises. The physical mechanism is the same in all three topologies:

In DCM the converter is a fixed-energy pump: each cycle it takes \(\tfrac12LI_{pk}^2\) from the input and delivers all of it to the load, whatever the load resistance. A light load cannot absorb that energy at low voltage, so the voltage rises until \(V_o^2/R\) matches. That is the whole of the DCM behaviour, and it explains why \(M\) depends on \(R\).

The three DCM ratios compared:

The buck–boost's is the clean one, and the reason is that it is a pure energy pump: the inductor is charged from the input and emptied into the output with no simultaneous connection, so no \(V_{in}\) term survives in the DCM expression. The other two have partial transfers that complicate the algebra without changing the physics.

The classical buck–boost across the battery range:

The inductor carries 3.2 to 3.7 A to deliver 2 A, and the worst case is at low battery — which is exactly when the pack's own internal resistance is highest and its remaining capacity lowest. Everything conspires at the end of discharge.

Notice the crucial fact about this application:

The input never falls below the output, so this converter never actually needs to boost. It is paying the buck–boost's full penalty — higher inductor current, higher device voltage, pulsed input and output — for a capability it will never use.

The four-switch buck–boost uses two half-bridges around one inductor and picks its mode:

In buck mode throughout this range:

The conduction loss difference:

Three and a third times the \(I^2R\) loss at low battery, in the inductor and in the switch. Doubling the switch count more than pays for itself — and the four-switch version also has a continuous input current in buck mode, so it needs less input filtering.

The two designs compared:

The four-switch wins everywhere except component count and control complexity, and the non-inverting output is often decisive on its own — the classical topology's negative output needs level shifting for any shared ground.

Where the classical topology still belongs. Two cases:

A bias supply needing \(-15\) V from \(+12\) gets it directly, and the inversion is the feature rather than the nuisance. And (ii) at low power, where a couple of hundred milliwatts of extra loss is irrelevant and the single switch saves board area and cost. Above a few watts with a wide input, the four-switch version is standard.

What boundary conduction means. The next cycle begins at the instant the inductor current reaches zero, so the ripple is exactly twice the average and the period is whatever that takes:

Nothing is fixed except the topology and the inductor. The duty ratio still follows the voltages — \(D = 15/27 = 0.556\) — but the frequency falls out of the timing rather than being commanded.

At full load, 2 A:

At quarter load, 0.5 A:

The frequency has risen by exactly the factor the load fell — \(f_s \propto I_o\) — because both intervals scale with the peak current and the peak current scales with the load. A ten-to-one load range gives a ten-to-one frequency range.

What boundary operation buys:

The second row is often the decisive one. Set 3 found reverse recovery contributing more loss than turn-on and turn-off combined; boundary conduction removes it completely, without a soft-recovery diode or a snubber.

And what it costs:

Against \(4.50\) A for the CCM design of Problem 1 — so the conduction loss rises by:

A third more conduction loss, plus a frequency that sweeps across a decade — making EMI filtering harder and the magnetics work over a wide range. Practical controllers therefore clamp the frequency at light load, letting the converter drop into true DCM below some threshold.

Where the trade comes out positive:

All four are cases where switching-related loss dominates conduction loss. At high current and low voltage the balance reverses and continuous conduction wins.

The complete comparison:

The buck wins on almost every row that matters. Its inductor carries only the load current, its devices see only the input, its output is naturally smooth, and it has no right-half-plane zero and no gain ceiling. Its one weakness — the highest DCM sensitivity — is the cheapest to fix, with a larger inductor or synchronous rectification.

Requirement 1: a 48 V bus to 12 V, 20 A.

Buck, and probably interleaved — Set 18, Problem 4 showed two phases halve the conduction loss and cancel the output ripple. At 20 A the conduction loss is everything, so splitting the current is worth more than any other change.

Requirement 2: 230 V AC to a 400 V bus, 1 kW.

Boost — the only choice, and a natural one. Its continuous input current is what makes the shaping possible, and its gain of 1.23 is far below the ceiling of Set 19, Problem 3. Set 19, Problem 4 worked the design.

Requirement 3: a 6–8.4 V battery to 5 V, 2 A.

Buck — not a buck–boost. Problem 4 found the input never crosses the output, so a buck–boost would pay 3.36 times the conduction loss for nothing. Only if the pack could sag below 5 V would a four-switch buck–boost be warranted.

Requirement 4: \(+12\) V to \(-15\) V, 100 mA bias rail.

Classical buck–boost — the inversion is the requirement, not a side effect, and at 1.5 W the efficiency penalty is a fraction of a watt. This is the case the topology exists for.

When none of the three will do:

Every row in this table is a limitation of the three-component cell, and every one is answered by adding either a fourth reactive element or a transformer. Those are the next two sets, and they complete the DC–DC toolkit.