Chapter 4: Thyristor Triggering, Protection, and Commutation — Power Electronics

Where this sits

Part 1 · Power Semiconductor Devices
Chapter 4 of 30

You should already know

Latching, \(I_L\) and \(I_H\), \(t_q\), and the \(di/dt\) and \(dv/dt\) limits from Chapter 3.

By the end you can

Place a load line on the gate plane, size a pulse train, coordinate an \(I^2t\) fuse, and design a commutation circuit and a series string.

Time

≈ 65 min reading · ≈ 60 min problems

i What you'll learn

How to read the gate characteristic — the spread band, the minimum trigger limits, the power hyperbola — and place a load line on it.
Why gate pulses must be hard, fast, and wide enough, and how the duty cycle relates peak to mean gate power.
Firing circuits from simple R and RC networks to the UJT relaxation oscillator, and why isolation by pulse transformer or optocoupler is mandatory.
Protection against overvoltage, overcurrent, \(di/dt\), \(dv/dt\) and heat — snubbers, MOVs, crowbars, and \(I^2t\) fuse coordination.
The difference between natural (line) and forced commutation, and the six classes A to F.
How to design series and parallel strings: string efficiency, derating factor, and static and dynamic equalisation.

Section 4-1

The Gate Characteristic and Its Limits

The gate–cathode path of an SCR is simply a PN junction, so its \(v\!-\!i\) characteristic looks like a diode's. What makes gate design interesting is that it is not one curve but a band. Manufacturing spread means the same part number may need anywhere between the two boundary curves to fire, and the band widens further with temperature — a cold device needs substantially more gate current than a hot one. The drive must therefore satisfy the worst device at the lowest expected temperature.

The drive must land inside the band, above the minimum limits, below the hyperbola

◇Intuition · a target with four walls

Do not read that diagram as a curve. Read it as a target you must land inside, fenced by four walls:

Wall	Cross it and…	Set by
Left — \(I_{GT(min)}\)	the device may not fire at all	the weakest device, when cold
Bottom — \(V_{GT(min)}\)	the gate junction never turns on	the same worst case
Right / top — \(I_{GM}\), \(V_{GM}\)	the gate junction is destroyed	absolute maximum ratings
Curved — \(V_GI_G = P_{GM}\)	the gate region overheats	instantaneous power limit

The gate supply gives you only one line to throw across this target: a straight load line \(V_G = E_s - I_GR_s\), whose intercept is \(E_s\) and whose slope is \(-1/R_s\). Design consists of choosing those two numbers so the line crosses the spread band well inside all four walls.

Why the band and not a curve: two devices of the same part number are not identical, and the characteristic shifts with temperature. Design for the worst device at the lowest expected temperature and every other combination is comfortably satisfied.

Four constraints bound the usable region. Below \(V_{GT(min)}\) and \(I_{GT(min)}\) the device may not fire at all. Above \(V_{GM}\) and \(I_{GM}\) the gate junction is damaged. And the rectangular hyperbola \(V_G I_G = P_{GM}\) marks the instantaneous power the gate can absorb — exceed it and the gate region overheats. A gate supply of open-circuit voltage \(E_s\) feeding through a series resistor \(R_s\) traces a straight load line across this plane, and the operating point is where that line crosses the device's actual characteristic. Good design puts the line comfortably inside all four bounds while crossing the band well to the right of the minimum trigger point.

!Common mistake

"More gate current is always safer — it guarantees firing."

Up to a point, yes: a harder gate pulse fires more reliably and spreads conduction faster, improving \(di/dt\) capability. Past that point you are destroying the device.

The gate–cathode junction is tiny — a fraction of a square millimetre with almost no thermal mass.
Exceeding \(V_GI_G = P_{GM}\) overheats it in microseconds, long before anything else in the device notices.
A damaged gate does not fail cleanly. It typically becomes more sensitive, so the device starts firing on noise — an intermittent fault that is very hard to trace.

The right target is a load line crossing the band at roughly 2–3 times \(I_{GT(min)}\), sitting comfortably under the hyperbola. Worked Example 1 puts the operating point exactly on the hyperbola to show the arithmetic — a real design backs off from there.

Section recap. The gate plane is a target with four walls: two minimum-trigger limits you must exceed, two absolute maxima and a power hyperbola you must stay under. The drive gives you one straight load line, \(E_s = V_G + I_GR_s\), to place inside them — designed for the worst device at the lowest temperature.

Section 4-2

Designing the Gate Drive

Because the trigger pulse lasts only a fraction of each cycle, the gate can be driven far harder than its continuous rating suggests. The instantaneous power is limited by the hyperbola; the mean power is limited separately, and the two are linked by the duty cycle \(\delta\) of the pulse train.

🔑

The three equations of gate-drive design

\[ E_s = V_G + I_G R_s, \qquad V_G I_G \le P_{GM}, \qquad \delta\,P_{GM} \le P_{G(AV)} \]

The first is the load line, the second the instantaneous limit, the third the thermal one. Given a source voltage and the device limits, these three fix \(R_s\), the pulse amplitude, and the maximum permissible pulse width — in that order.

Three properties of the pulse matter beyond its amplitude. Its rise time should be under a microsecond: a fast, hard gate pulse spreads conduction quickly across the wafer and directly improves the \(di/dt\) capability, as Chapter 3 noted. Its width must exceed the time the anode current needs to reach the latching current \(I_L\) — the calculation of Example 2 in Chapter 3, and the reason inductive loads need wide pulses. And in circuits where the load current may become discontinuous, or where two devices must conduct simultaneously as in a three-phase bridge, a single pulse is not enough: a pulse train of high-frequency pulses lasting the whole intended conduction period is used instead, giving reliable firing at a fraction of the mean gate power a continuous DC signal would cost.

→Why pulses let you cheat the power limit

The gate has two power limits, and they are not the same number:

\(P_{GM}\), the peak limit — how much the junction can take at any instant without local overheating. Typically several watts.
\(P_{G(AV)}\), the mean limit — how much heat the package can carry away continuously. Typically a few tenths of a watt.

Because the trigger only needs to last microseconds out of a milliseconds-long cycle, the duty ratio \(\delta\) is small — and \(P_{mean} = \delta P_{peak}\). A device that can only sustain 0.5 W continuously will happily accept 5 W in bursts of 10% duty.

So the three design equations run in a fixed order:

Load line \(E_s = V_G + I_GR_s\) → fixes \(R_s\) for a chosen operating point.
\(V_GI_G \le P_{GM}\) → checks the pulse amplitude is safe.
\(\delta P_{GM} \le P_{G(AV)}\) → fixes the maximum pulse width.

Worked Example 2 shows what happens when step 3 gives a width shorter than the load needs — and why the pulse train exists.

Never trigger with DC. A continuous gate current works on the bench and fails in service for three reasons: it dissipates mean gate power for the entire conduction interval, it keeps the gate junction hot and shifts the trigger characteristic, and it holds the device ready to re-fire the instant forward voltage returns — destroying the very controllability the gate was supposed to provide. Pulses, or trains of pulses, are the norm everywhere.

◇Intuition · why a pulse train beats one long pulse

A single pulse must be present at the exact moment the anode current crosses \(I_L\). If it ends early, the device does not fire; if you widen it, mean gate power rises.

A pulse train — a burst of short, hard pulses at perhaps 10 kHz, lasting the whole intended conduction interval — dissolves the conflict:

Each individual pulse is short, so the mean power stays low.
Some pulse is always arriving, so whenever the anode current happens to cross \(I_L\), a trigger is there.
If the device drops out mid-cycle (discontinuous current), the next pulse re-fires it automatically.
In a three-phase bridge two devices must conduct together; a train guarantees the second device is still being triggered when the first one fires.

Think of it as knocking repeatedly rather than leaning on the doorbell: the same certainty of being heard, at a fraction of the energy — and it works even if nobody was standing by the door when you first knocked.

Section recap. Peak and mean gate power are separate limits linked by the pulse duty ratio, so short pulses may be driven far harder than the continuous rating. Pulse width must still outlast the time for \(i_A\) to reach \(I_L\); when those two demands conflict, use a pulse train.

Section 4-3

Firing Circuits and Isolation

The job of a firing circuit is to convert a desired firing angle \(\alpha\) into a pulse at the right instant, synchronised to the supply. The classical circuits form a ladder of increasing capability.

1 Resistance (R) triggering

A potentiometer feeds the gate directly from the AC supply. Cheapest possible, but the gate current peaks with the supply voltage, so the firing angle can only be varied between 0° and 90° — half the useful range is unreachable.

2 RC triggering

A capacitor delays the gate voltage relative to the supply, extending the range to nearly 0°–180°. Still crude: the angle drifts with supply voltage and temperature, and there is no isolation.

3 UJT relaxation oscillator

A unijunction transistor discharges a capacitor into a resistor once the capacitor reaches the peak-point voltage, producing a sharp pulse. Synchronised to the supply, it gives a stable, adjustable angle over the full range — the classical analogue firing scheme.

4 Ramp and pedestal

A DC "pedestal" sets the coarse angle and a synchronised ramp rides on it, so the firing instant responds linearly to a control voltage. This is the analogue front end of closed-loop drives.

5 Digital firing

A microcontroller detects the zero crossing, waits a programmed delay, and issues the pulse train. Precise, drift-free, and trivially reconfigurable — the standard in modern equipment.

6 Isolation

The cathodes of the six devices in a bridge sit at different potentials, so gate drives must be isolated — by pulse transformer (rugged, passive, but cannot pass long pulses) or optocoupler (arbitrary pulse shapes, needs an isolated supply).

⚙Why isolation is not optional

In a three-phase bridge the six thyristor cathodes sit at six different, constantly changing potentials — hundreds of volts apart. The controller, meanwhile, sits at earth potential.

Connect a controller output directly to an upper-arm gate and you have wired the control electronics across the mains. So every gate drive is isolated, by one of two methods:

Property	Pulse transformer	Optocoupler
Passes	Short pulses and pulse trains only	Any pulse shape, including long ones
Needs an isolated supply?	No — it passes the energy too	Yes, on the gate side
Limitation	The core saturates on long pulses, so DC cannot pass	More components; propagation delay
Typical use	Rugged industrial thyristor drives	IGBT drives and anything needing precise timing

Note how well the pulse transformer's limitation matches the requirement: it cannot pass DC, and you should never trigger with DC anyway. The component enforces good practice.

In the highest-voltage application of all — an HVDC valve at several hundred kilovolts — even these are inadequate, and the gate signal travels down an optical fibre to a light-triggered thyristor. Isolation becomes free because glass does not conduct.

The UJT relaxation oscillator — C charges through R until the peak point, then dumps into R₁

The UJT circuit deserves its equations because they appear in every examination on the subject. The capacitor charges exponentially toward \(V_{BB}\); when it reaches the peak-point voltage the emitter junction turns on, the UJT's internal resistance collapses, and the capacitor dumps its charge through \(R_1\) as a sharp pulse. With \(\eta\) the intrinsic standoff ratio (typically 0.5–0.8):

Peak-point voltage and oscillation period

\[ V_P = \eta\,V_{BB} + V_D, \qquad T = RC\,\ln\!\left(\frac{1}{1-\eta}\right), \qquad f = \frac{1}{T} \]

The charging resistor is also bounded at both ends. Too large and the charging current never reaches the peak-point current \(I_P\), so the circuit never fires; too small and the current after firing exceeds the valley current \(I_V\), so the UJT never resets and the oscillation stops after one pulse. The permissible range is

Bounds on the charging resistor

\[ \frac{V_{BB} - V_V}{I_V} \lt R \lt \frac{V_{BB} - V_P}{I_P} \]

◇Intuition · the two ways a UJT oscillator dies

The double inequality looks arbitrary until you see that each side is a distinct failure:

R too large — it never fires The charging current \((V_{BB}-V_P)/R\) is smaller than the peak-point current \(I_P\). The capacitor voltage creeps up and simply stalls — the UJT never triggers, and you get a DC level instead of pulses.

R too small — it fires once and sticks After firing, the current \((V_{BB}-V_V)/R\) still exceeds the valley current \(I_V\). The UJT is held in its on-state, never resets, and the oscillation stops dead after a single pulse.

A leaky bucket makes it concrete. \(R\) is the tap filling it; \(C\) is the bucket; the UJT is a siphon that empties it once full. Too slow a tap and the bucket never fills. Too fast a tap and the siphon can never finish draining, so it stays permanently open.

Worked Example 3 checks both bounds — always check both. A design that satisfies only one will look correct on paper and produce no pulses on the bench.

Section recap. Firing circuits form a ladder: R (0–90° only), RC (nearly 0–180°), UJT relaxation oscillator (stable, full range), ramp-and-pedestal (linear control), digital (drift-free, now standard). All of them must be isolated, by pulse transformer or optocoupler.

Section 4-4

Protection

A thyristor has almost no thermal mass at the junction, so it cannot ride out abuse the way a motor or transformer can. Protection is not optional, and it addresses five distinct threats.

◇Intuition · silicon has no thermal inertia

This is the fact that makes power-semiconductor protection a separate discipline.

A motor overloaded by 50% takes minutes to reach a dangerous temperature. Its copper and iron are a large thermal store.
A transformer tolerates a short-circuit for seconds.
A thyristor junction is a layer microns thick with essentially no thermal store. A fault current reaches melting temperature in milliseconds.

So protection cannot be "detect, then decide, then act". Anything involving a relay, a contactor or a processor is far too slow. Semiconductor protection must be either:

Passive and always present — the snubber, the series inductor, the heatsink. They do not detect anything; they simply make the dangerous condition impossible.
Faster than the silicon — the semiconductor fuse, which must clear in under a millisecond, and the crowbar, which fires in microseconds.

An ordinary distribution fuse protects the cable. It will clear the fault long after your thyristor has become an expensive short circuit.

Threat	Where it comes from	Remedy
Overvoltage	Commutation transients, line switching, lightning	RC snubber across the device; MOV or selenium suppressor across the supply; crowbar SCR for gross faults
Overcurrent	Short circuits, load faults, shoot-through	Fast semiconductor (HRC) fuse coordinated on \(I^2t\); circuit breaker for slower faults
\(di/dt\)	Turn-on into a stiff source or a charged snubber	Series inductor \(L_s = V_s/(di/dt)_{max}\)
\(dv/dt\)	Fast reapplied forward voltage after commutation	RC snubber sized as \(C_s = V_s/[R_s(dv/dt)_{max}]\)
Overheating	Conduction and switching loss	Heatsink chosen from the \(R_{th}\) chain so \(T_j\) stays in limit

Two of these repay a closer look. Fuse coordination works on the \(I^2t\) integral introduced in Chapter 2: for a fault to be cleared without losing the device, the fuse's total let-through \(I^2t\) must be smaller than the thyristor's withstand \(I^2t\). Since the device's surge rating is usually quoted as a peak half-sine \(I_{TSM}\) for one cycle, converting between the two is a routine step:

Withstand energy from a half-sine surge rating

\[ I^2t = \frac{I_{TSM}^{2}}{2}\,t \qquad\text{(half-sine of duration } t\text{)} \]

An ordinary distribution fuse is far too slow for this duty — it protects the cable, not the silicon — which is why semiconductor-grade fuses with clearing times under a millisecond exist as a separate product category. Crowbar protection takes the opposite approach: a sacrificial SCR is fired deliberately across the supply when overvoltage is detected, converting the fault into a dead short that the upstream fuse or breaker then clears. It is brutal, but it is fast, and it saves the expensive devices downstream. Finally, the gate itself needs modest protection — a reverse diode across the gate–cathode, an RC filter against pickup, and twisted or screened gate leads, since a few volts of induced noise on a metre of unscreened wire is enough to fire a sensitive device.

!Common mistake

"I fitted a 30 A fuse to protect my 30 A thyristor."

Wrong Fuse protection is a matter of matching current ratings.

Right It is a matter of matching energy. The fuse's total let-through \(I^2t\) must be less than the thyristor's withstand \(I^2t\), at the actual prospective fault current.

The reason is timescale. During a bolted fault the current is limited only by circuit impedance and may reach thousands of amperes within a single half cycle. What matters is not "does the fuse eventually blow" but "how much energy passes through the silicon before it does".

Two further traps in the same calculation:

Use the total let-through, melting plus arcing. Manufacturers quote both; the arcing contribution is often the larger.
Use a semiconductor-grade (HRC) fuse. An ordinary fuse of identical current rating typically lets through several times the energy, because it was never designed to clear in under a millisecond.

Section recap. Five threats, five remedies: snubber for overvoltage and \(dv/dt\), \(I^2t\)-coordinated semiconductor fuse for overcurrent, series inductor for \(di/dt\), heatsink for heat — plus a crowbar for gross overvoltage. The junction has no thermal inertia, so protection must be passive or faster than a millisecond.

Section 4-5

Commutation: Natural versus Forced

Commutation is the process of turning a conducting thyristor off. From Chapter 3 the requirement is precise: the anode current must fall below the holding current, and the device must then be held reverse-biased for at least its turn-off time \(t_q\) before forward voltage is reapplied. Everything else is engineering detail about how that reverse bias is arranged.

When the supply is AC, it arranges itself. The current falls to zero naturally at the end of each half cycle, and the supply then holds the device reverse-biased for the following half cycle — milliseconds against a requirement of tens of microseconds. This is natural or line commutation, it costs nothing, and it is why every converter in Part 2 works with plain converter-grade thyristors.

When the supply is DC, nothing reverses on its own. An auxiliary circuit must be built whose sole purpose is to momentarily reverse the current or the voltage across the main device — forced commutation. The auxiliary circuit needs its own capacitor, often its own inductor, sometimes its own thyristor and diode, and it must be sized for the full load current. That cost, in components, losses, weight and reliability, is the single biggest reason the industry abandoned thyristor choppers and inverters as soon as the GTO and IGBT became available.

◇Intuition · one question answers everything

Commutation looks like a zoo of circuits until you ask a single question of every one of them:

Who provides the reverse bias, and where does that energy come from?

There are only two possible answers, and they divide the whole subject:

The supply does — natural commutation An AC line reverses 100 times a second whether you ask it to or not. It holds the device reverse-biased for a whole half cycle — milliseconds against a requirement of tens of microseconds. Cost: nothing.

You do — forced commutation A DC supply never reverses, so you must build a circuit that momentarily reverses the current or voltage yourself. Cost: a capacitor rated for the full load current, usually an inductor, often an extra thyristor and diode.

Once you see it this way, the Class A–F taxonomy in the next section stops being a list to memorise and becomes six answers to one question.

And the economic conclusion follows immediately: forced commutation is expensive, lossy and heavy, which is exactly why the moment a device arrived that could turn itself off — the GTO, then the IGBT of Chapter 5 — the industry abandoned thyristor choppers and inverters almost overnight.

🔑

The commutation requirement, and the capacitor it implies

\[ t_c \ge t_q \qquad\text{with}\qquad t_c = \frac{C\,V_s}{I_o} \ \text{ for a capacitor discharging at constant load current} \]

Design for \(t_c \approx 1.5\,t_q\). Note what the relation says about scaling: the commutating capacitor grows in direct proportion to the load current and inversely with supply voltage. A 500 A chopper needs ten times the capacitor of a 50 A one — and that capacitor must carry the full load current, at high \(di/dt\), every cycle.

!Common mistake

"If the commutation is marginal, just fit a bigger capacitor."

A larger \(C\) does buy more turn-off time — and costs you in four other places at once:

It must recharge between commutations. That recharge time sets a ceiling on the switching frequency, so a bigger capacitor means a slower chopper — and therefore bulkier filter magnetics elsewhere.
Commutation loss rises. Roughly \(\tfrac12 CV^2\) is dissipated per commutation, so loss scales directly with \(C\) and with \(f_s\).
Peak currents rise. The auxiliary devices and the capacitor itself must be rated for them.
Size and weight rise. A pulse-rated commutating capacitor carrying hundreds of amperes is a physically large object.

Diagnose before enlarging. If commutation is marginal, the right questions are: is the device the correct grade (converter grade in a force-commutated circuit is a classic error), and is \(t_q\) being met at the highest junction temperature rather than at 25 °C? \(t_q\) worsens significantly when hot, which is why these circuits fail after warming up.

Section recap. Commutation means forcing \(i_A\) below \(I_H\) and holding the device reverse-biased for \(t_c \ge t_q\). AC supplies do it free; DC circuits need auxiliary hardware sized by \(C = I_ot_c/V_s\) — growing with load current, and limiting switching frequency through its recharge time.

Section 4-6

The Commutation Classes

The standard taxonomy runs from A to F. The lettering is historical rather than logical, but it is universal in Indian syllabi and in the classic texts, so it is worth knowing in order.

→How to remember six classes without memorising six classes

Apply the question from the last section — who provides the reverse bias? — and the letters sort themselves:

Class	Who provides it	Extra hardware needed
A	The load itself — it happens to be resonant, so the current rings back through zero	None. You got lucky with the load
B	A dedicated LC tank that you ring on purpose	L and C
C	The other main thyristor — each turns its partner off	One capacitor, shared
D	An auxiliary thyristor that connects a charged capacitor across the main one	Extra thyristor, capacitor, usually a diode and inductor
E	A separate external source, often a pulse transformer	A whole extra supply
F	The AC line	None whatsoever

Read the last column downward. The hardware cost falls to zero at both ends — Class A because the load did the work by accident, Class F because the supply does it by nature.

Keep this in proportion: Class F is not one class among six. It is what essentially every thyristor converter in service actually uses — all of Part 2 of this book. Classes A–E existed to make DC thyristor circuits possible before self-commutating devices arrived, and they are now largely of historical and examination interest.

Class	Name	How turn-off is achieved	Typical use
A	Load (self) commutation	The load itself is underdamped \(LCR\); the resonant current rings back through zero on its own	Series inverters, induction heating
B	Resonant-pulse commutation	A parallel \(LC\) circuit is triggered to inject a resonant current pulse opposing the load current	Chopper circuits, early inverters
C	Complementary commutation	Firing the second thyristor applies the charged capacitor in reverse across the first — each device turns the other off	Two-thyristor choppers, flip-flop circuits
D	Impulse (auxiliary) commutation	An auxiliary thyristor connects a pre-charged capacitor directly across the main device	Voltage-commutated choppers, Jones chopper
E	External pulse commutation	A separate pulse source (often a transformer) supplies the reverse bias	Special-purpose and high-power circuits
F	Line (natural) commutation	The AC supply reverses of its own accord at every current zero	All phase-controlled rectifiers, AC controllers, cycloconverters

Class C — each thyristor commutates its partner

Class C is worth tracing because it shows the whole principle in four components. Suppose \(T_1\) is conducting; the capacitor charges through \(R_2\) with its right plate positive. Fire \(T_2\), and the capacitor is connected directly across \(T_1\) with that polarity — instantly reverse-biasing it. \(T_1\) turns off, the capacitor reverses through \(R_1\), and the circuit is armed to commutate \(T_2\) the next time \(T_1\) is fired. Each device turns the other off; hence complementary. The turn-off time available is set by how long the capacitor holds the reverse bias, and for the RC discharge in this configuration it works out to \(t_c = 0.693\,R C\).

Quick check Sections 4-5 and 4-6

In Class B resonant-pulse commutation, why must the peak resonant current exceed the load current?

Because the commutating pulse and the load current subtract, and the device only turns off when the net current through it reaches zero.

The thyristor is carrying \(I_o\) forward. The \(LC\) tank injects a current \(-i_c(t)\) opposing it, so the device current is \(I_o - i_c(t)\). If the peak of \(i_c\) is less than \(I_o\), that difference never reaches zero — the device keeps conducting and commutation simply fails.

In Worked Example 5, \(I_p = V_s\sqrt{C/L} = 200\) A against a 150 A load, so the net current is driven negative for a comfortable interval.

The design consequence: the auxiliary \(L\), \(C\) and any auxiliary thyristor must be rated for that full 200 A peak, not for the 150 A load. Commutation hardware is rated above the load it serves — one more reason forced commutation is expensive.

Class C uses no auxiliary thyristor at all — each main device commutates the other. Why isn't every forced-commutated circuit built this way?

Because it requires two main thyristors that alternate, and that constrains the circuit heavily.

Class C only works if the topology naturally has two devices firing in turn — a two-thyristor chopper, a flip-flop, a parallel inverter. A single-switch chopper has no partner to commutate it.
The commutating capacitor must reverse its charge between operations, so the two devices cannot be fired in an arbitrary sequence — the timing is locked together.
The available turn-off time \(t_c = 0.693\,RC\) depends on resistors that are also carrying load-related current, so \(t_c\) varies with operating point. That is uncomfortable when \(t_q\) must be guaranteed at all loads.

Class D (impulse) is more expensive but decouples the commutation from the load: the auxiliary thyristor fires when you choose, independently of what the main circuit is doing. Paying for a component to buy independence is a recurring trade in engineering.

Section recap. Six classes, one question — who supplies the reverse bias. A: the resonant load. B: a dedicated \(LC\) pulse. C: the partner thyristor. D: an auxiliary thyristor and capacitor. E: an external source. F: the AC line, free, and the one that matters in practice.

Section 4-7

Series and Parallel Strings

The sharing problem of Chapter 2 returns here, with two additions: thyristors also differ in their turn-on delay and their recovered charge, so mismatch appears dynamically as well as statically. The quality of a string is measured by its string efficiency and the corresponding derating factor:

String efficiency and derating

\[ \text{String efficiency} = \frac{V_{string}}{n\,V_{rated}}, \qquad \text{DRF} = 1 - \text{string efficiency} \]

Every device in a series string carries both networks

Static equalisation handles the steady blocking state, exactly as for diodes: a resistor across each device swamps the spread \(\Delta I_b\) in blocking current. For \(n\) devices sharing a string voltage \(V_s\), with the worst device permitted to hold \(V_{bm}\), the resistor must satisfy

Static equalising resistor

\[ R \le \frac{n\,V_{bm} - V_s}{(n-1)\,\Delta I_b} \]

Dynamic equalisation handles the switching instants. Devices with different turn-on delays would briefly leave the slowest holding the entire string voltage, and devices with different recovered charge \(\Delta Q\) stop conducting at different instants during turn-off. A capacitor across each device absorbs that difference, with a small series resistor \(R_d\) to damp the resulting discharge when the device fires:

🔑

Dynamic equalising capacitor

\[ C \ge \frac{(n-1)\,\Delta Q}{n\,V_{bm} - V_s} \]

Both equalising formulas share the same denominator \(n V_{bm} - V_s\) — the total voltage headroom designed into the string. Reduce the derating and that headroom shrinks, so both the resistor gets smaller and the capacitor gets larger, and both dissipate more. String efficiency is bought with component cost, which is why 0.8–0.9 is the usual settling point.

!Common mistake

"String efficiency is an efficiency, so I should design it as high as possible."

The name is unfortunate. It is not an energy efficiency at all — it measures how hard you are working the devices, and pushing it up makes everything worse:

String efficiency \(= V_{string}/(nV_{rated})\). Raising it toward 1 means shrinking the headroom \(nV_{bm} - V_s\).
That headroom is the denominator of both equalising formulas. Shrink it and \(R\) must get smaller (more standing loss) while \(C\) must get larger (more discharge current at turn-on).
And you have less margin left for the transient imbalance the static calculation never modelled.

Worked Example 6 makes the arithmetic concrete: at 1200 V devices the headroom is 1500 V, giving \(R = 31\) kΩ and \(C = 0.08\) µF. Specify 1000 V devices instead — pushing string efficiency from 0.75 to 0.90 — and the headroom collapses to 500 V, forcing \(R\) to 10.4 kΩ (three times the standing loss) and \(C\) up to 0.24 µF.

Hence the conventional target of 0.8 to 0.9: high enough not to waste devices, low enough that the equalising network stays cheap and the string tolerates a bad day.

Parallel operation needs the mirror-image treatment: matched devices on a common heatsink so temperature equalises the characteristics, symmetric busbar layout so stray inductances match, and where necessary magnetic current-sharing reactors. All devices in a parallel group must also be fired simultaneously from the same drive, since a device that fires late finds the others already conducting and never turns on at all.

Section recap. A series string needs static equalisation (a resistor per device, sized against the blocking-current spread) and dynamic equalisation (a capacitor per device, sized against the recovered-charge spread). Both formulas divide by the same voltage headroom, so derating is what makes equalisation affordable.

Section 4-8

Worked Examples

1 Gate drive from the power hyperbola

Problem. The gate–cathode characteristic of an SCR is approximated by the straight line \(V_G = 130\,I_G\). The gate source is 15 V and the allowable gate power dissipation is 0.5 W. Find the operating point and the required series resistance.

Solution. Operate right on the power limit, so \(V_G I_G = 0.5\). Substituting the device relation:

Working

\[ 130\,I_G^2 = 0.5 \;\Rightarrow\; I_G = \sqrt{3.846\times10^{-3}} = 62\ \text{mA}, \qquad V_G = 130(0.062) = 8.06\ \text{V} \]

\[ R_s = \frac{E_s - V_G}{I_G} = \frac{15 - 8.06}{0.062} = 112\ \Omega \]

The load line from 15 V through 112 Ω now meets the characteristic exactly on the hyperbola. In practice one would back off slightly — say 130 Ω — to leave margin for the spread band and for temperature.

2 Pulse width from the mean-power limit

Problem. A device permits a peak gate power of 5 W and a mean gate power of 0.5 W. The firing frequency is 1 kHz. Find the maximum duty cycle and pulse width. If the load is 0.4 H on a 150 V supply and \(I_L = 60\) mA, check that the pulse is long enough.

Solution. From the mean-power constraint:

Working

\[ \delta \le \frac{P_{G(AV)}}{P_{GM}} = \frac{0.5}{5} = 0.1 \;\Rightarrow\; t_{pulse} \le \delta T = (0.1)(1\ \text{ms}) = 100\ \mu\text{s} \]

\[ t_{latch} = \frac{I_L L}{V} = \frac{(0.06)(0.4)}{150} = 160\ \mu\text{s} \]

The permissible pulse is 100 µs but the load needs 160 µs — the drive as specified cannot fire this circuit. The fix is a pulse train: a burst of short high-amplitude pulses lasting 160 µs or more keeps the mean power inside the limit while guaranteeing that some pulse is present when the anode current crosses \(I_L\). This is exactly why pulse trains are standard practice.

3 UJT oscillator design

Problem. A UJT has \(\eta = 0.72\), \(I_P = 50\ \mu\text{A}\), \(I_V = 6\) mA and \(V_V = 2\) V, supplied from \(V_{BB} = 20\) V with \(V_D = 0.7\) V. With \(C = 0.1\ \mu\text{F}\) and \(R = 50\) kΩ, find \(V_P\), the firing frequency, and verify \(R\) is in range.

Solution.

Working

\[ V_P = \eta V_{BB} + V_D = (0.72)(20) + 0.7 = 15.1\ \text{V} \]

\[ T = RC\ln\!\left(\frac{1}{1-\eta}\right) = (5\times10^{4})(10^{-7})\ln(3.571) = (5\ \text{ms})(1.273) = 6.36\ \text{ms} \]

\[ f = \frac{1}{T} = 157\ \text{Hz} \]

Checking the bounds: \(R_{max} = (20-15.1)/50\ \mu\text{A} = 98\) kΩ and \(R_{min} = (20-2)/6\ \text{mA} = 3\) kΩ. At 50 kΩ the design sits comfortably between them. Note that varying \(R\) between these limits sweeps the firing frequency — and hence the firing angle — over the full control range.

4 Fuse coordination on I²t

Problem. A thyristor is rated \(I_{TSM} = 3000\) A as a half-sine of 10 ms. Find its withstand \(I^2t\), and state the requirement on the protecting fuse.

Solution. For a half-sine the mean square is half the peak squared:

Working

\[ I^2t = \frac{I_{TSM}^2}{2}\,t = \frac{3000^2}{2}(0.01) = 45{,}000\ \text{A}^2\text{s} \]

The fuse's total let-through (melting plus arcing) must be below 45,000 A²s at the prospective fault current and system voltage — and it must be a semiconductor-grade fuse, since an ordinary HRC fuse of the same current rating typically lets through several times this energy before clearing.

5 Resonant-pulse commutation

Problem. A Class B commutation circuit uses \(L = 20\ \mu\text{H}\) and \(C = 20\ \mu\text{F}\) charged to \(V_s = 200\) V. Find the peak commutating current and the duration of the resonant pulse. The main device carries 150 A and has \(t_q = 25\ \mu\text{s}\); comment.

Solution. The \(LC\) loop rings with a characteristic impedance \(\sqrt{L/C}\):

Working

\[ I_p = V_s\sqrt{\frac{C}{L}} = 200\sqrt{\frac{20\times10^{-6}}{20\times10^{-6}}} = 200\ \text{A} \]

\[ t_{pulse} = \pi\sqrt{LC} = \pi\sqrt{(20\times10^{-6})(20\times10^{-6})} = \pi(20\ \mu\text{s}) = 62.8\ \mu\text{s} \]

The 200 A resonant peak exceeds the 150 A load current, which is the necessary condition for the net device current to be driven through zero — a commutating pulse smaller than the load current simply fails to turn the device off. The interval for which the current stays reversed comfortably exceeds the 25 µs turn-off time, so the design works, though the auxiliary components must be rated for the full 200 A peak.

6 Designing a series string

Problem. Five thyristors, each rated 1200 V, form a string across 4500 V. The spread in blocking current is 12 mA and in recovered charge 30 µC. Find the string efficiency and derating factor, and size the static and dynamic equalising components.

Solution. With \(n = 5\), \(V_{bm} = 1200\) V and \(V_s = 4500\) V, the headroom is \(nV_{bm} - V_s = 6000 - 4500 = 1500\) V.

Working

\[ \text{String efficiency} = \frac{4500}{5 \times 1200} = 0.75, \qquad \text{DRF} = 25\% \]

\[ R \le \frac{1500}{(4)(0.012)} = 31.25\ \text{k}\Omega \]

\[ C \ge \frac{(4)(30\times10^{-6})}{1500} = 0.08\ \mu\text{F} \]

Each of the five devices carries a 31 kΩ resistor and a 0.08 µF capacitor with its damping resistor — thirty components to make five devices behave like one. Had the designer specified 1000 V devices instead, the headroom would fall to 500 V, forcing \(R\) down to 10.4 kΩ (three times the standing loss) and \(C\) up to 0.24 µF. This is the arithmetic behind the usual advice to design for a string efficiency no higher than about 0.85.

Review

Summary & Formula Sheet

✓ Gate plane

Spread band, minimum trigger limits, maximum limits, power hyperbola. The load line \(E_s = V_G + I_GR_s\) must cross inside all four.

✓ Pulses, not DC

\(\delta P_{GM} \le P_{G(AV)}\) fixes the width; the width must still outlast the time to reach \(I_L\). Pulse trains resolve the conflict.

✓ Firing circuits

R (0–90°), RC (0–180°), UJT with \(V_P = \eta V_{BB} + V_D\) and \(T = RC\ln[1/(1-\eta)]\), ramp-and-pedestal, digital. All isolated.

✓ Five threats

Overvoltage, overcurrent, \(di/dt\), \(dv/dt\), heat — snubber, \(I^2t\)-coordinated fast fuse, series inductor, snubber, heatsink.

✓ Commutation

Natural (Class F) is free in AC. Forced needs \(t_c \ge t_q\), typically via \(t_c = CV_s/I_o\). Classes A–F.

✓ Strings

String efficiency \(V_s/(nV_{rated})\); static \(R \le (nV_{bm}-V_s)/[(n-1)\Delta I_b]\); dynamic \(C \ge (n-1)\Delta Q/(nV_{bm}-V_s)\).

Formula sheet · Chapter 4

Gate load linesource \(E_s\) through \(R_s\)

\( E_s = V_G + I_G R_s \)

Gate power limitsinstantaneous, then thermal

\( V_G I_G \le P_{GM}, \qquad \delta\,P_{GM} \le P_{G(AV)} \)

Minimum pulse widthmust outlast the climb to \(I_L\)

\( t_{latch} = \dfrac{I_L L}{V} \)

UJT peak-point voltage\(\eta\) = intrinsic standoff ratio

\( V_P = \eta V_{BB} + V_D \)

UJT period and frequencyrelaxation oscillator

\( T = RC\ln\!\left(\dfrac{1}{1-\eta}\right), \qquad f = 1/T \)

UJT resistor boundscheck BOTH ends

\( \dfrac{V_{BB}-V_V}{I_V} \lt R \lt \dfrac{V_{BB}-V_P}{I_P} \)

Withstand energyhalf-sine surge of duration \(t\)

\( I^2t = \dfrac{I_{TSM}^{2}}{2}\,t \)

Commutation requirementdesign at \(t_c \approx 1.5\,t_q\)

\( t_c \ge t_q, \qquad t_c = \dfrac{C V_s}{I_o} \)

Class C turn-off timeRC discharge

\( t_c = 0.693\,RC \)

Resonant-pulse commutationClass B; need \(I_p > I_o\)

\( I_p = V_s\sqrt{\dfrac{C}{L}}, \qquad t_{pulse} = \pi\sqrt{LC} \)

String efficiency and deratingaim for 0.8–0.9

\( \eta_{string} = \dfrac{V_{string}}{n V_{rated}}, \qquad \mathrm{DRF} = 1-\eta_{string} \)

Static equalising resistor\(\Delta I_b\) = blocking-current spread

\( R \le \dfrac{n V_{bm} - V_s}{(n-1)\,\Delta I_b} \)

Dynamic equalising capacitor\(\Delta Q\) = recovered-charge spread

\( C \ge \dfrac{(n-1)\,\Delta Q}{n V_{bm} - V_s} \)

Key terms

Spread band: The region of the gate plane between the weakest and strongest devices of one part number. Design against its worst edge, cold.
Power hyperbola: The curve \(V_GI_G = P_{GM}\) bounding instantaneous gate power. The load line must stay under it.
Pulse train: A burst of short high-amplitude gate pulses lasting the whole conduction interval. Low mean power, guaranteed firing.
Intrinsic standoff ratio, \(\eta\): The UJT's internal potential divider, typically 0.5–0.8. Sets both \(V_P\) and the oscillation period.
\(I^2t\) coordination: Matching a fuse's total let-through energy to the device's withstand energy. Current ratings alone are not protection.
Crowbar: A sacrificial thyristor fired deliberately across a supply on overvoltage, converting a fault into a short the fuse can clear.
Natural (line) commutation: Class F. The AC supply reverses and turns the device off unaided. Free, and what every converter in Part 2 relies on.
Forced commutation: Classes A–E. Auxiliary hardware reverses the current or voltage in a DC circuit. Expensive, lossy, largely superseded.
Static equalisation: A parallel resistor per device that swamps the spread in blocking current, so the string shares voltage in the steady state.
Dynamic equalisation: A series-RC network per device that absorbs differences in turn-on delay and recovered charge during switching.

Self-assessment

Test Yourself

These test diagnosis rather than substitution — the skill a converter actually demands of you.

Chapter 4 · six questions answers hidden until you ask

A thyristor drive fires reliably in a warm workshop but fails to start on a cold morning. Diagnose it.

Two temperature effects both point the same way, and either can be the culprit:

\(I_{GT}\) rises as temperature falls. A cold device needs substantially more gate current. If the load line was placed only just past \(I_{GT(min)}\) at room temperature, it falls short when cold.
\(I_L\) also rises as temperature falls. So the anode current must climb higher before the latch takes, and a marginal pulse width becomes an inadequate one.

Fixes, cheapest first: increase the gate drive amplitude (reduce \(R_s\)) so the load line crosses the band at 2–3× \(I_{GT(min)}\) — checking it stays under the hyperbola; and switch to a pulse train if a single pulse is being used.

The general lesson: semiconductor parameters are quoted at 25 °C, but equipment must work from −20 °C to +125 °C. Always ask which end of that range is the worst case for the parameter you are relying on — and it is not always the hot end.

Why can a pulse transformer not pass a 10 ms gate pulse, and why is that limitation actually convenient?

Why it cannot: a transformer works on changing flux, \(v = N\,d\phi/dt\). Applying a constant voltage for 10 ms drives the flux steadily upward until the core saturates; after that the winding is just a piece of wire, the secondary voltage collapses, and the primary current runs away. The volt-second product a core can absorb before saturating is a fixed design limit — the same volt-second thinking as Chapter 1, applied to a magnetic core.

Why it is convenient: you should never trigger a thyristor with a long DC pulse anyway — it wastes mean gate power, heats the gate junction and shifts the trigger characteristic, and leaves the device primed to re-fire. So the component physically prevents a practice that is bad engineering.

The standard resolution is the pulse train: each individual pulse is short enough for the core, and the train covers the whole conduction interval. If you genuinely need long pulses — as IGBT gate drives do — you use an optocoupler with an isolated supply instead.

A force-commutated chopper works at light load but fails to commutate at full load. What is happening?

Look at \(t_c = CV_s/I_o\). The available turn-off time is inversely proportional to the load current.

The capacitor holds the device reverse-biased only while it is discharging; a bigger load current drains it faster, so \(t_c\) shrinks exactly when you need it most. Double the load and you halve the turn-off time. At some current \(t_c\) falls below \(t_q\), the device fails to turn off, and the chopper goes into a permanent short across the supply — usually taking the fuse with it.

It is worse than the algebra suggests, because full load also means a hotter junction, and \(t_q\) increases with temperature. The two effects converge: \(t_c\) falling while \(t_q\) rises.

Design rule: size the commutating capacitor at the maximum load current and the maximum junction temperature, then apply the 1.5 margin on top. A design verified at nominal conditions is not verified.

Five 1200 V devices in series across 4500 V give a string efficiency of 0.75. Your manager asks you to use four devices instead, to save cost. Advise.

Four 1200 V devices give \(nV_{bm} = 4800\) V against a 4500 V string — a headroom of only 300 V, and a string efficiency of 0.94.

Both equalising formulas divide by that headroom, so compared with the five-device design (1500 V headroom):

\(R \le 300/(3 \times 0.012) = 8.3\) kΩ instead of 31 kΩ — nearly four times the standing loss in the resistors, continuously, for the life of the equipment.
\(C \ge (3)(30\times10^{-6})/300 = 0.3\) µF instead of 0.08 µF — nearly four times the capacitance, and therefore a much larger discharge current into each device at every turn-on.

Advice: the saving of one device is illusory. You pay it back in bigger, lossier equalising components, in continuous energy cost, in extra \(di/dt\) stress, and in a string with 300 V of margin against transients that routinely exceed that. Recommend keeping five devices — or, if four is mandatory, specifying 1600 V devices, which restores the headroom to 1900 V and gives a better design than the original.

Why does a phase-controlled rectifier need no commutation circuit at all, while a DC chopper using the same thyristor needs a capacitor, an inductor and often an extra thyristor?

Because the rectifier is connected to something that reverses on its own, and the chopper is not.

In the rectifier the supply is AC. At the end of each half cycle the current falls naturally to zero and the supply then holds the device reverse-biased for the whole of the next half cycle — 10 ms against a \(t_q\) requirement of perhaps 50 µs, a margin of 200:1, at zero cost. This is Class F.

In the chopper the supply is DC. Nothing ever reverses. Every microsecond of reverse bias must be manufactured by hardware you buy, install, and rate for the full load current.

The deeper point: this is why Part 2 (rectifiers, AC controllers, cycloconverters) is built on thyristors and works beautifully, while Parts 3 and 4 (choppers and inverters) are built on IGBTs. The device did not change because IGBTs are "better" in the abstract — it changed because in a DC circuit, self-commutation is worth more than the thyristor's superior on-state drop.

A thyristor is rated \(I_{TSM} = 4000\) A for a 10 ms half-sine. A fuse is offered with a total let-through of 90,000 A²s. Is it suitable?

Compute the device's withstand: \(I^2t = I_{TSM}^2 t/2 = (4000)^2(0.01)/2 = \) 80,000 A²s.

The fuse lets through 90,000 A²s — more than the device can withstand. It is not suitable. The thyristor would be destroyed before the fuse cleared, which is precisely the failure the fuse was bought to prevent.

Three things to check before rejecting it outright:

Is 90,000 the total let-through (melt + arc), or only the melting integral? If only melting, the real figure is worse still.
Is it quoted at your actual system voltage and prospective fault current? Let-through rises with both.
Does the circuit have inductance that limits the fault current below the prospective value? If so the real let-through may be lower — but this must be calculated, not assumed.

The safe conclusion is to specify a fuse with total let-through comfortably below 80,000 A²s — conventionally with a margin of about 20%.

Practice

Problems

Place each question in one of three domains before reaching for a formula — they share almost no relations:

Gate circuit — load line, power hyperbola, duty ratio, pulse width, UJT timing.
Protection — \(I^2t\), snubber, series inductor, crowbar, heatsink.
Commutation — \(t_c\) versus \(t_q\), capacitor sizing, class identification.

Problems 1–7 are direct application; 8–11 need judgement; the remainder are design questions worth discussing in a tutorial.

Sketch the gate characteristic plane and mark the four bounding constraints. State what happens if the load line passes below the minimum trigger point.
Explain why a cold thyristor is harder to fire than a hot one, and what that implies for the design margin.
A gate characteristic follows \(V_G = 100\,I_G\). With a 12 V source and a 0.4 W gate power limit, find the operating point and \(R_s\).
A device allows 4 W peak and 0.4 W mean gate power. At 500 Hz firing, find the maximum pulse width.
For the device of Problem 4, the load is 0.6 H on 200 V with \(I_L = 50\) mA. Determine whether a single pulse suffices, and if not, propose a scheme.
A UJT with \(\eta = 0.65\) runs from 24 V with \(V_D = 0.7\) V, \(C = 0.22\ \mu\text{F}\), \(R = 22\) kΩ. Find \(V_P\), \(T\) and \(f\).
For the UJT of Problem 6 with \(I_P = 40\ \mu\text{A}\), \(I_V = 5\) mA and \(V_V = 1.8\) V, find the permissible range of \(R\) and comment on whether 22 kΩ is a sound choice.
A thyristor rated \(I_{TSM} = 5000\) A for a 10 ms half-sine protects a 415 V circuit. Find the withstand \(I^2t\) and state two properties the fuse must have.
A Class C circuit uses \(R = 50\ \Omega\) and \(C = 5\ \mu\text{F}\). Find the available turn-off time and state the maximum \(t_q\) of a device it could commutate with a 1.5 margin.
An impulse-commutated chopper runs at 220 V and 80 A with a device of \(t_q = 30\ \mu\text{s}\). Size the commutating capacitor for a 1.5 margin, and find how the answer changes if the load current doubles.
Four thyristors rated 1600 V form a string across 5000 V. With \(\Delta I_b = 10\) mA and \(\Delta Q = 25\ \mu\text{C}\), find the string efficiency, derating factor, \(R\) and \(C\).
A designer proposes replacing the forced-commutation circuit of a 100 kW DC chopper with a single IGBT. List everything that is removed from the circuit, estimate qualitatively what happens to the switching frequency, the size and the efficiency, and identify the one application area where the thyristor version would still be preferred.

Tip: the three topics of this chapter map onto three characteristic quantities in a problem statement. If you are given a gate voltage or power, it is a drive question — use the load line and the two power limits. If you are given a surge current or fault level, it is a protection question — use \(I^2t\). If you are given a capacitance and a load current, it is a commutation question — use \(t_c = CV_s/I_o\) and compare with \(t_q\). Almost every examination problem announces its category in its data.