Solved GATE Paper

GATE 2025 Analog Electronics Questions and Solutions

Instructor: Prof. Mithun Mondal Institution: BITS Pilani Subject: Analog Electronics
Question 01

Question 1

The diode in the circuit below is ideal. The input voltage in volts is given by \( V_i = 10 \sin(100\pi t) \) where time \( t \) is in seconds. The time duration in ms, rounded off to two decimal places, for which the diode is forward biased during one period of the input is ___.

GATE 2025 Analog Electronics Q1 diode circuit diagram
GATE 2025 Analog Electronics Q1 diode circuit diagram

Solution

While the diode is off no current flows, so there is no drop across \( R \) and the anode sits at \( V_i \). The 5 V source is connected with its positive terminal at the bottom rail, so the cathode is held at \( -5\,V \). The diode is therefore forward biased whenever

Equation
\[V_i > -5\,V \implies 10\sin(100\pi t) > -5 \implies \sin(100\pi t) > -\frac{1}{2}\]

The period of the input is

Equation
\[T = \frac{2\pi}{100\pi} = 0.02\,s = 20\,ms\]

Writing \( \theta = 100\pi t \), the condition \( \sin\theta > -\frac{1}{2} \) holds over \( -\frac{\pi}{6} < \theta < \frac{7\pi}{6} \), an interval of \( \frac{4\pi}{3} \) out of every \( 2\pi \). Hence

Equation
\[t_{ON} = \frac{4\pi/3}{2\pi}\,T = \frac{2}{3} \times 20\,ms = 13.33\,ms\]
Final Answer
Answer: 13.33 ms.
Question 02

Question 2

All the diodes in the circuit are ideal. Which of the following plots is/are correct when \( V_i \) is swept from \(-M\) to \(+M\)?

  1. [Plot A]
  2. [Plot B]
  3. [Plot C]
  4. [Plot D]
GATE 2025 Analog Electronics Q2 diode circuit diagram
GATE 2025 Analog Electronics Q2 diode circuit diagram

Solution

D
Final Answer
Correct options: A and D.
Question 03

Question 3

In the circuit shown, the identical transistors Q1 and Q2 are biased in the active region with \(\beta = 120\). The Zener diode is in breakdown with \( V_Z = 5\,V \) and \( I_Z = 25\,mA \). If \( I_L = 12\,mA \) and \( V_{EB2} = V_{EB1} = 0.7\,V \), then the values of \( R_1 \) and \( R_2 \) in k\(\Omega\), rounded to one decimal place, are ___ and ___, respectively.

  1. 0.6 and 0.4
  2. 1.4 and 2.5
  3. 14.0 and 25.0
  4. 6.0 and 4.0
GATE 2025 Analog Electronics Q3 Zener circuit diagram
GATE 2025 Analog Electronics Q3 Zener circuit diagram

Solution

Given \( \beta = 120 \), \( I_{C1} = 12\,mA \):

Equation
\[I_{B1} = \frac{I_{C1}}{\beta} = \frac{12\,mA}{120} = 0.1\,mA\]
Equation
\[I_{E1} = I_{C1} + I_{B1} = 12.1\,mA\]

Current through \( R_1 \): \( I_{R1} = I_Z + I_{B1} = 25 + 0.1 = 25.1\,mA \)

Node \( V_{B1} \) (Zener-base junction):

Equation
\[V_{B1} = V_{CC} - V_{EB2} - V_Z = 20 - 0.7 - 5 = 14.3\,V\]
Equation
\[R_1 = \frac{V_{B1}}{I_{R1}} = \frac{14.3}{25.1} = 0.569\,k\Omega \approx 0.6\,k\Omega\]

Q1 is a PNP transistor, so its emitter sits one \( V_{EB} \) above its base: \( V_{E1} = V_{B1} + V_{EB1} = 14.3 + 0.7 = 15.0\,V \)

Equation
\[R_2 = \frac{V_{CC} - V_{E1}}{I_{E1}} = \frac{20 - 15}{12.1} = 0.413\,k\Omega \approx 0.4\,k\Omega\]

Final: \( R_1 = 0.6\,k\Omega,~ R_2 = 0.4\,k\Omega \), option A.

Question 04

Question 4

A simplified small-signal equivalent circuit of a BJT-based amplifier is shown below. The small-signal voltage gain \( \frac{v_o}{v_s} \) in V/V is ___.

  1. \( \frac{-\beta R_L}{R_S + r_\pi} \)
  2. \( \frac{+\beta R_L}{R_S} \)
  3. \( \frac{-\beta R_L}{R_S} \)
  4. \( \frac{+\beta R_L}{R_S + r_\pi} \)
GATE 2025 Analog Electronics Q4 BJT circuit diagram
GATE 2025 Analog Electronics Q4 BJT circuit diagram

Solution

The input loop is \( R_S \) in series with \( r_\pi \), so

Equation
\[i_b = \frac{v_s}{R_S + r_\pi}\]

The controlled source \( \beta i_b \) draws its current downward out of the output node, so that same current flows up through \( R_L \) from ground into the node:

Equation
\[v_o = -\beta i_b R_L = \frac{-\beta R_L}{R_S + r_\pi}\, v_s\]
Equation
\[\frac{v_o}{v_s} = \frac{-\beta R_L}{R_S + r_\pi}\]
A
Final Answer
Correct option: A.
Question 05

Question 5

Identical MOSFETs M1 and M2 in the circuit are ideal and biased in saturation. Both have transconductance \( g_m = 5\,mS \). The input signals are \( V_1 = 2.5 + 0.01\sin t \), \( V_2 = 2.5 - 0.01 \sin t \). The output signal \( V_3 \) in volts is ___.

  1. \( 3 + 0.05\sin t \)
  2. \( 3 - 0.10\sin t \)
  3. \( 4 + 0.10\sin t \)
  4. \( 4 - 0.05\sin t \)
GATE 2025 Analog Electronics Q5 MOSFET circuit diagram
GATE 2025 Analog Electronics Q5 MOSFET circuit diagram

Solution

DC analysis: set the signal components to zero. The 2 mA tail current splits equally, so \( I_{D1} = I_{D2} = 1\,mA \). With \( R_D = 1\,k\Omega \) and \( V_{DD} = 5\,V \):

Equation
\[V_{3,DC} = V_{DD} - I_{D1}R_D = 5 - 1 \times 1 = 4\,V\]

AC analysis: the drive is purely differential, so the common source node is an AC ground and each half-circuit sees half of the differential input:

Equation
\[v_{id} = V_1 - V_2 = 0.02\sin t, \qquad v_{gs1} = \frac{v_{id}}{2} = 0.01\sin t\]

\( V_3 \) is the drain of \( M_1 \), so it is inverted with respect to \( V_1 \):

Equation
\[v_{3} = -g_m R_D\, v_{gs1} = -(5 \times 10^{-3})(1 \times 10^{3})(0.01\sin t) = -0.05\sin t\]
Equation
\[V_3 = 4 - 0.05\sin t \;\text{V}\]
D
Final Answer
Correct option: D.
Question 06

Question 6

Which of the following statements is/are TRUE regarding ideal MOSFET-based DC-coupled single-stage amplifiers with finite load resistors?

  1. The common-gate amplifier has an infinite input resistance.
  2. The common-source amplifier has an infinite input resistance.
  3. The input and output voltages of the common-source amplifier are in phase.
  4. The input and output voltages of the common-drain amplifier are in phase.

Solution

A - Common-gate input resistance infinite? FALSE. Input is at source (low, \( 1/g_m \)). B - Common-source input resistance infinite? TRUE. Gate (no current): input resistance infinite. C - Common-source amplifier input/output in phase? FALSE. 180° phase shift. D - Common-drain amplifier input/output in phase? TRUE. Source follower—no phase inversion.

Correct statements: B and D.

Question 07

Question 7

All components in the band-pass filter below are ideal. The lower 3 dB frequency of the filter is 1 MHz. The upper 3 dB frequency in MHz, rounded to the nearest integer, is ___.

GATE 2025 Analog Electronics Q7 filter circuit diagram
GATE 2025 Analog Electronics Q7 filter circuit diagram

Solution

The input branch, \( R \) in series with \( 10C \), sets the lower (high-pass) corner; the feedback network, \( 2R \) in parallel with \( 0.1C \), sets the upper (low-pass) corner:

Equation
\[f_L = \frac{1}{2\pi R (10C)} = \frac{1}{20\pi RC}, \qquad f_H = \frac{1}{2\pi (2R)(0.1C)} = \frac{1}{0.4\pi RC}\]

The unknown product \( RC \) cancels in the ratio:

Equation
\[\frac{f_H}{f_L} = \frac{20\pi RC}{0.4\pi RC} = 50 \implies f_H = 50 \times 1\,\text{MHz} = 50\,\text{MHz}\]
Final Answer
Answer: 50 MHz.
Question 08

Question 8

Which of the following statements is/are TRUE with respect to an ideal op-amp?

  1. It has an infinite input resistance.
  2. It has an infinite output resistance.
  3. It has an infinite open-loop differential gain.
  4. It has an infinite open-loop common-mode gain.

Solution

A - TRUE (no current into inputs). B - FALSE (ideal output resistance is zero). C - TRUE (ideal open-loop differential gain infinite). D - FALSE (ideal open-loop common-mode gain is zero: perfect CMRR).

Correct statements: A and C.

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GATE Analog Electronics