By the end of this chapter you should be able to:
- Define conduction angle and classify amplifiers as A, AB, B or C from the fraction of the cycle each conducts.
- Derive the 25 per cent maximum efficiency of a series-fed class A stage and the 50 per cent of a transformer-coupled one.
- Derive the 78.5 per cent maximum efficiency of a class B push-pull stage and locate the worst-case device dissipation.
- Explain crossover distortion and design the class AB bias that removes it.
- Describe complementary-symmetry and quasi-complementary output stages and say why each exists.
- Analyse a class C stage and explain why its high efficiency is confined to tuned, narrow-band service.
- Carry out a heat-sink calculation from junction to ambient and compute total harmonic distortion by the three-point method.
The amplifier of Chapter 19 delivered a voltage gain of 126 into a 10 kΩ load, and it was a complete success by the standards of that chapter. Ask it to drive a loudspeaker and it fails immediately: an 8 Ω load would collapse its gain to under one, and even if it managed a volt across that load it would deliver 60 mW while dissipating 12 mW in the transistor and 24 mW from the supply. Scale the requirement to the 25 W a domestic amplifier is expected to produce and the arithmetic becomes untenable. A power stage is a different design problem from a small-signal stage, and it is judged by different numbers.
The number that matters is efficiency: the fraction of the power drawn from the supply that arrives at the load. Everything the supply provides and the load does not receive is dissipated inside the transistor, so a stage that is 25 per cent efficient at 25 W of output is asking three transistors' worth of heat — 75 W — to leave one package. Efficiency therefore determines the size of the supply, the size of the heat sink, the size of the transistor and, in the end, whether the amplifier is buildable at all. This chapter derives the efficiency of each class of operation from first principles, shows why the most efficient linear arrangement introduces a distortion of its own and how that is cured, and finishes with the thermal calculation that decides whether a design survives its own success.
1 Efficiency, Dissipation and the Classes
Three powers describe a power stage. \(P_{dc}\) is drawn from the supply, \(P_{ac}\) is delivered to the load, and the difference is dissipated, almost all of it in the transistors. The collector-circuit efficiency is
Note what \(P_D\) implies. At 25 per cent efficiency the transistors dissipate three times the output power; at 78.5 per cent they dissipate 0.27 times it. For a 25 W output that is the difference between 75 W and 6.8 W of heat, which is the difference between a large finned casting and a modest bracket.
The classes are distinguished by the conduction angle: the fraction of each input cycle for which the transistor carries current.
| Class | Conduction angle | Bias point | Maximum \(\eta\) | Distortion |
|---|---|---|---|---|
| A | 360° | Middle of the load line | 25 % series-fed, 50 % transformer-coupled | Lowest; one device handles the whole waveform |
| AB | Slightly over 180° | Just into conduction, \(I_{CQ}\) of a few mA | 60–70 % | Low; crossover suppressed |
| B | 180° | Exactly at cut-off | 78.5 % | Severe crossover distortion |
| C | Well under 180°, typically 90–150° | Beyond cut-off, base reverse-biased | Over 90 % | Enormous; usable only with a tuned load |
Reading the figure left to right is reading a trade. Class A conducts throughout, so the collector current is a faithful copy of the input and the distortion is low, but a large standing current flows at all times and is dissipated whether or not there is a signal. Class B conducts for half the cycle, so it draws current only in proportion to the signal, but half the waveform is missing and a second transistor must supply it. Class C conducts for a fraction of the cycle and produces a train of pulses that bears no resemblance to the input at all — which is acceptable only if a tuned circuit is available to reconstruct the fundamental.
2 Class A, Series-Fed: Why 25 Per Cent Is the Ceiling
The simplest power stage puts the load in the collector, in series with the supply, and biases the transistor at the middle of the resulting load line. Take \(V_{CC} = 20\) V and a load \(R_C = 100\ \Omega\) driven directly.
Mid-point bias means \(V_{CEQ} = V_{CC}/2 = 10\) V and therefore
The supply delivers a constant current \(I_{CQ}\), because the average of a sine wave superposed on it is zero, so
Independent of the signal. That is the defining property of class A, and the root of its inefficiency: the supply is asked for the same 2 W in silence as at full output.
The largest undistorted collector swing is \(V_p = V_{CEQ} = 10\) V, at which point \(V_{CE}\) just reaches zero on one peak and \(V_{CC}\) on the other. The a.c. power in the load is then
and the efficiency follows immediately:
Every quantity has cancelled: the ceiling is 25 per cent whatever the supply, the load and the transistor. It is reached only at full drive, and it falls as the square of the signal amplitude — at half drive the efficiency is 6.25 per cent.
Follow the heat. At zero signal the transistor dissipates \(V_{CEQ}I_{CQ} = 10 \times 0.1 = 1.000\) W and the load resistor dissipates \(I_{CQ}^2R_C = 1.000\) W, accounting for the whole 2 W. At full drive the transistor dissipates \(1.000 - 0.500 = 0.500\) W. The transistor is hottest with no signal applied, which is the reverse of the intuition most students bring, and it means a class A stage must be specified for its quiescent dissipation and not for its output power.
Two further faults make the series-fed arrangement unattractive for real loads. Half the supply power goes into the load resistor as heat even in silence, which is impossible if the load is a loudspeaker — 100 mA of direct current through a voice coil would displace the cone and probably burn it out. And the load must be the right value: an 8 Ω speaker in this position would demand \(I_{CQ} = 1.25\) A from a 20 V rail, or 25 W of supply power for a maximum output of 6.25 W. Both problems are solved by the same component.
3 Transformer Coupling: Doubling the Ceiling to 50 Per Cent
Replace the collector resistor by the primary of a transformer whose secondary feeds the load. The transformer does two things at once. Its primary has almost no d.c. resistance, so no supply voltage is wasted across it; and it presents the load as \(R_L' = n^2R_L\), where \(n\) is the primary-to-secondary turns ratio, so any load can be matched to any desired collector load line.
The consequence for the load lines is worth stating carefully, because it is the one genuinely new idea in this section. The d.c. load line is set by the primary's winding resistance, which is nearly zero, so it is almost vertical: the collector sits at \(V_{CEQ} = V_{CC}\) regardless of current. The a.c. load line is set by the reflected load \(R_L'\) and has slope \(-1/R_L'\), passing through the same Q-point. Because the collector can swing symmetrically about \(V_{CC}\), it reaches \(2V_{CC}\) on the positive peak — a fact that shocks the unprepared and destroys transistors chosen on the assumption that \(V_{CE}\) can never exceed the supply.
Drive an 8 Ω loudspeaker from a 20 V supply through a transformer, choosing the turns ratio for a 200 Ω collector load.
Turns ratio. \(n = \sqrt{R_L'/R_L} = \sqrt{200/8} = 5.00\), so a 5:1 step-down transformer.
Bias. With no d.c. drop in the primary, \(V_{CEQ} = V_{CC} = 20\) V, and the Q-point is set at the middle of the a.c. load line, \(I_{CQ} = V_{CC}/R_L' = 20/200 = 100\) mA.
Supply power. \(P_{dc} = V_{CC}I_{CQ} = 20 \times 0.100 = 2.000\) W — the same 2 W as before, and again independent of signal.
Maximum output. \(V_{CE}\) swings from 0 to \(2V_{CC} = 40\) V, so \(V_p = 20\) V and \(I_p = V_p/R_L' = 100\) mA. Hence
Twice the series-fed figure, from the same supply and the same quiescent current, because the transformer no longer wastes half the supply power in the load's own d.c. resistance and because the collector can swing over \(2V_{CC}\) instead of \(V_{CC}\).
Checking the load. 1 W into 8 Ω means 2.83 V r.m.s. and 354 mA r.m.s. at the secondary — consistent with 20 V peak and 100 mA peak at the primary after a 5:1 transformation, since \(20/5 = 4\) V peak is 2.83 V r.m.s.
The effect of saturation voltage. The 50 per cent figure assumes \(V_{CE}\) can reach zero. With a realistic \(V_{CE(min)} = 2\) V the swing runs from 2 V to 38 V and the general formula gives
Worst-case dissipation. At zero signal the transistor takes the whole 2 W, since none of it reaches the load and none is lost in the primary. A transformer-coupled class A stage delivering 1 W therefore needs a transistor rated for 2 W — twice its own output.
Fifty per cent is the ceiling for any class A stage, however cleverly coupled, and the reason is structural. The device conducts for the whole cycle, so it must carry a standing current at least equal to the peak signal current, and it must stand off a standing voltage at least equal to the peak signal voltage. The product of those two is the quiescent dissipation, and it can never be less than twice the peak output power divided by two. Getting past 50 per cent requires a device that stops conducting for part of the cycle, and that is class B.
4 Class B Push-Pull and the 78.5 Per Cent Derivation
Bias two transistors exactly at cut-off and arrange for one to handle the positive half of the waveform and the other the negative half. Each conducts for 180°, neither draws any current in silence, and the two halves are recombined in the load.
The derivation of the efficiency needs one integral. If the load current is a full sine of peak \(I_p\), each transistor carries a half-sine, whose average value is \(I_p/\pi\). Two transistors drawing that average from a supply of \(V_{CC}\) give
Now the supply power is proportional to the signal amplitude, not constant. That single change is the whole of the class B advantage.
The load receives
so the efficiency at any drive level is
Linear in the output amplitude, unlike class A where it went as the square. At full drive, \(V_p = V_{CC}\), and
A pure number, with no supply, load or device parameter in it. It arises because the ratio of the r.m.s. value of a sine to its mean over a half cycle is \(\pi/(2\sqrt2)\), and squaring the appropriate combination gives \(\pi/4\). Real stages reach 60 to 70 per cent, the shortfall being saturation voltage, emitter resistors and the standby current of class AB.
Take \(V_{CC} = 20\) V and \(R_L = 8\ \Omega\) in a complementary push-pull stage.
At full drive. \(V_p = 20\) V, so \(I_p = 20/8 = 2.500\) A and
giving \(\eta = 25.00/31.83 = 78.54\) per cent and a total device dissipation of \(31.83 - 25.00 = 6.83\) W, or 3.42 W each.
The worst case is not full drive. Write the total dissipation as a function of \(V_p\):
and set \(dP_D/dV_p = 0\) to find the maximum at \(V_p = 2V_{CC}/\pi = 12.73\) V. Substituting back,
At that point the load receives 10.13 W and the efficiency is exactly 50 per cent. Tabulating the whole range:
| \(V_p\) | \(P_{ac}\) | \(P_{dc}\) | \(P_D\) per device | \(\eta\) |
|---|---|---|---|---|
| 0 V (silence) | 0 | 0 | 0 | — |
| 4 V | 1.00 W | 6.37 W | 2.68 W | 15.7 % |
| 8 V | 4.00 W | 12.73 W | 4.37 W | 31.4 % |
| 12.73 V | 10.13 W | 20.26 W | 5.07 W | 50.0 % |
| 16 V | 16.00 W | 25.46 W | 4.73 W | 62.8 % |
| 20 V | 25.00 W | 31.83 W | 3.42 W | 78.5 % |
The design rule. The ratio of worst-case device dissipation to maximum output power is
so each transistor need only be rated at about a fifth of the amplifier's output power. Compare class A, where a 25 W output would demand two 25 W transistors or one 50 W device. That factor is why every audio power amplifier built since about 1960 is class B or AB.
Voltage rating. When one transistor is conducting and holding its collector near the opposite rail, the other stands off nearly the whole supply span. In a single-supply design the off transistor sees close to \(2V_{CC}\) — 40 V here — so \(BV_{CEO}\) must exceed that with a margin, and Chapter 17's warning about \(BV_{CEO}\) being far below \(BV_{CBO}\) applies with force.
5 Crossover Distortion, Class AB and Complementary Symmetry
Class B as described does not work, and the reason is the 0.7 V that Chapter 16 spent so long establishing. A transistor biased exactly at cut-off does not begin to conduct until its base-emitter voltage reaches about 0.6 V, so for inputs between \(-0.7\) V and \(+0.7\) V neither device conducts and the output is zero. The transfer characteristic has a flat dead band through the origin, and every waveform that passes through zero is mangled there.
Crossover distortion is worse than it looks, for two reasons. It is a fixed absolute error rather than a proportional one, so it grows as a fraction of the signal as the signal gets smaller: at a 10 V peak the dead band spans 8.0° of each cycle and at 1 V peak it spans 88.9°, and at 0.5 V peak the output is silence. And because the error is a sharp-cornered notch, its harmonic content is concentrated at high order — seventh, ninth, eleventh — where the ear is most sensitive and where feedback is least able to reduce it.
The cure is to bias each transistor just into conduction, so that a small quiescent current flows in both and neither ever fully turns off near the crossing. This is class AB. The conduction angle is a little over 180°, the transfer characteristic passes smoothly through the origin, and the efficiency falls only slightly: a standby current of 10 mA per device on a 20 V supply costs 0.4 W, reducing the full-power efficiency of the 25 W stage from 78.54 to 77.57 per cent.
Choosing the standby current is a real design decision. Too little and crossover distortion reappears; too much and the stage drifts towards class A, dissipating heat in silence. Ten to fifty milliamperes is typical for an audio output pair, and the value must be held stable as the output devices warm up — which is exactly the thermal-runaway problem of Chapter 18, now with the added difficulty that the bias must track the output transistors' falling \(V_{BE}\).
The standard solution is the \(V_{BE}\) multiplier: a transistor with a resistive divider from its collector to its base, which holds the voltage across itself at \(V_{BE}(1 + R_1/R_2)\). Placed between the two output bases and mounted physically on the same heat sink as the output devices, it produces a bias voltage that falls at the same 2 mV/°C per junction as the voltage it must supply, so the standby current stays put. Two diodes in series will do the same job more crudely, and small emitter resistors of 0.22 to 0.47 Ω in each output device add the local feedback that finally guarantees stability.
Complementary symmetry. The classical push-pull stage used a centre-tapped input transformer to produce two antiphase drives and a centre-tapped output transformer to recombine them. Transformers are heavy, expensive and poor at high frequencies, and the availability of matched npn and pnp devices made them unnecessary. In a complementary-symmetry stage an npn handles the positive half and a pnp the negative half, both driven from the same node, with the load taken from the junction of the two emitters. Each device is an emitter follower, so the stage has a voltage gain just under one and an output impedance of a fraction of an ohm — exactly what a loudspeaker needs, and exactly what Chapter 19 showed a follower provides.
Quasi-complementary. Power pnp devices were for many years markedly worse than their npn counterparts, and matching them was harder still. The quasi-complementary stage sidesteps the problem: both output devices are npn, and the pnp character of the lower half is supplied by a small pnp driver in a Darlington-like arrangement (a Sziklai pair) whose composite behaviour is that of a pnp with the current gain of the pair. The upper half uses a conventional npn Darlington. The two halves are then well matched because both output devices come from the same production line. Modern complementary power devices are good enough that the arrangement is no longer necessary, but it remains common in high-power designs where the very best npn devices have no pnp equal.
6 Class C and the Tuned Load
Class C abandons linearity altogether. The base is biased beyond cut-off, so the transistor conducts only near the peaks of the drive, delivering a narrow pulse of collector current once per cycle. The collector current is then nothing like the input, and the stage would be useless were it not for one thing: a pulse train at the signal frequency contains a component at that frequency, and a resonant circuit can select it.
The efficiency follows from the Fourier content of a truncated cosine pulse of half-angle \(\theta\). The direct and fundamental components are
and, for a collector swing that just reaches the supply rails, \(\eta_{\max} = \tfrac{1}{2}I_1/I_{dc}\). Evaluating:
| Conduction angle \(2\theta\) | \(I_{dc}/I_{\max}\) | \(I_1/I_{\max}\) | \(\eta_{\max}\) | Class |
|---|---|---|---|---|
| 180° | 0.3183 | 0.5000 | 78.5 % | B |
| 150° | 0.2693 | 0.4548 | 84.4 % | C |
| 120° | 0.2180 | 0.3910 | 89.7 % | C |
| 90° | 0.1649 | 0.3102 | 94.0 % | C |
The table also shows the cost. As the conduction angle narrows the efficiency rises towards 100 per cent, but \(I_1/I_{\max}\) falls, so a given output power requires an ever larger peak current from the device. A 90° stage delivering the same fundamental as a class B stage must handle 1.61 times the peak current, which is why very narrow angles are not used even where the efficiency would be welcome.
The load must be a parallel LC circuit tuned to the signal frequency. Its impedance is high at resonance and low at every harmonic, so the fundamental component of the pulse develops a large voltage while the harmonics are shorted to ground; the flywheel action of the resonant circuit fills in the missing part of each cycle. The output is a clean sine wave provided the loaded \(Q\) is high enough — a value of 10 or more is usual.
The consequence is that class C is confined to what it is good at. It cannot amplify an amplitude-modulated signal, because its output amplitude does not follow its input amplitude; it cannot handle audio, because a tuned circuit at 1 kHz with useful \(Q\) is impractical and because the band is three decades wide. What it can do is amplify a constant-amplitude carrier at high efficiency, and that is exactly what a frequency-modulated transmitter, a radar magnetron driver or an induction heater requires. Class C is the standard output stage of an FM broadcast transmitter and appears again in Chapter 30 as the amplitude-limiting element of an oscillator.
7 Heat Sinking and Harmonic Distortion
Two calculations remain, and both decide whether a design that looks right on paper works on the bench.
The thermal chain. Heat flows from the junction, through the device's own package to its case, through the mounting interface to the heat sink, and from the sink to the surrounding air. Each stage has a thermal resistance in °C/W, and because the heat flows through all of them in series they add:
The exact analogue of a series resistive circuit driven by a current source: \(P_D\) is the current, temperature difference is the voltage, and \(\theta\) is the resistance. \(\theta_{JC}\) is fixed by the device, \(\theta_{CS}\) by how it is mounted, and \(\theta_{SA}\) is the only one the designer buys.
Each transistor of Worked Example 20.2 dissipates a worst case of 5.066 W. The device is rated \(T_{J(max)} = 150\) °C with \(\theta_{JC} = 1.5\) °C/W; a mica washer and grease give \(\theta_{CS} = 0.5\) °C/W; the ambient inside the case reaches 45 °C.
The largest permissible total.
so \(\theta_{SA} \le 20.73 - 1.5 - 0.5 = 18.73\) °C/W. Designing to a junction temperature of 125 °C instead, to leave a margin for a hot day and a dusty sink, tightens this to \((125-45)/5.066 - 2.0 = 13.79\) °C/W.
With a real sink. Fit a 5 °C/W extrusion. Then \(\theta_{JA} = 1.5+0.5+5.0 = 7.0\) °C/W and
a margin of 69.5 °C. The same sink would allow a dissipation of \((150-45)/7.0 = 15.0\) W before the limit is reached.
Without a sink. A TO-220 in free air has \(\theta_{JA} \approx 62.5\) °C/W, giving \(T_J = 45 + 5.066(62.5) = 362\) °C. The device fails in seconds. The often-quoted "maximum power dissipation" of such a package — here \((150-25)/1.5 = 83.3\) W — is quoted at a case temperature of 25 °C, which requires an infinite heat sink and does not exist. The useful figure is the derating slope, \(1/\theta_{JC} = 0.667\) W/°C of case temperature.
Harmonic distortion. The non-linearity of the transfer characteristic converts a sine input into an output containing harmonics. Writing the output current as
the individual distortion factors are \(D_n = |B_n/B_1|\), and the total harmonic distortion is their root-sum-square, \(\text{THD} = \sqrt{D_2^2+D_3^2+\cdots}\). The three-point method extracts the second-harmonic term from three readings taken off the transfer characteristic or the load line — the maximum, minimum and quiescent collector currents:
The equality \(B_2 = B_0\) is a useful check on the arithmetic and a real physical statement: second-harmonic distortion shifts the average collector current, so a stage that draws more supply current when a signal is applied than when it is not is telling you it is distorting.
For the transformer-coupled stage of Worked Example 20.1, suppose the collector current swings between \(I_{\max} = 185\) mA and \(I_{\min} = 30\) mA about \(I_{CQ} = 100\) mA. Then \(B_1 = (185-30)/2 = 77.5\) mA and \(B_2 = (185+30-200)/4 = 3.75\) mA, so \(D_2 = 3.75/77.5 = 4.84\) per cent, and the quiescent current has risen by 3.75 mA under drive. With a measured third harmonic of 2 per cent, \(\text{THD} = \sqrt{0.0484^2+0.02^2} = 5.24\) per cent. The fundamental power into the 200 Ω reflected load is \(B_1^2R_L'/2 = (0.0775)^2(200)/2 = 0.601\) W, and the total including harmonics is \((1+\text{THD}^2)\) times that, or 0.602 W — a rise of 0.27 per cent. Distortion is audible long before it is energetically significant, which is why it is specified as a percentage of amplitude and not as a power.
Push-pull operation offers one elegant bonus here. Because the two halves of a push-pull stage produce output currents of opposite sign but the same even-harmonic content, all even harmonics cancel in the load. A push-pull pair therefore removes \(D_2\), \(D_4\) and the d.c. shift entirely, leaving only the odd harmonics — which is one more reason, beyond efficiency, that the arrangement dominates power amplifier design.
8 Summary and Key Results
| Quantity | Expression | Value |
|---|---|---|
| Efficiency | \(\eta = P_{ac}/P_{dc}\); \(P_D = P_{dc}-P_{ac}\) | At 25 % the devices dissipate 3× the output; at 78.5 %, 0.27× |
| Class A series-fed | \(P_{dc} = V_{CC}^2/2R_C\), \(P_{ac} = V_{CC}^2/8R_C\) | 2.00 W in, 0.50 W out, \(\eta_{\max} = 25\) %; worst dissipation at zero signal |
| Class A transformer | \(R_L' = n^2R_L\); \(V_{CE}\) swings to \(2V_{CC}\) | \(n = 5\) for 8 Ω → 200 Ω; 2.00 W in, 1.00 W out, \(\eta_{\max} = 50\) % |
| Effect of \(V_{CE(min)}\) | \(\eta = 50[(V_{\max}-V_{\min})/(V_{\max}+V_{\min})]^2\) | 40.5 % for \(V_{\min} = 2\) V |
| Class B supply power | \(P_{dc} = 2V_{CC}I_p/\pi\) | 31.83 W at \(I_p = 2.5\) A; zero in silence |
| Class B efficiency | \(\eta = (\pi/4)(V_p/V_{CC})\) | 78.54 % at full drive; linear in amplitude |
| Worst-case dissipation | \(P_{D(\max)} = 2V_{CC}^2/\pi^2R_L\) total, at \(V_p = 2V_{CC}/\pi\) | 10.13 W total, 5.07 W each, at \(V_p = 12.73\) V where \(\eta = 50\) % |
| Device rating rule | \(P_{D(\max)}\)/device \(= 0.2026\,P_{ac(\max)}\) | A 25 W amplifier needs two 5 W transistors, not two 25 W ones |
| Off-device voltage | \(\approx 2V_{CC}\) | 40 V, so \(BV_{CEO}\) must exceed it with margin |
| Crossover distortion | Dead band \(\pm V_{BE} \approx \pm 0.7\) V | 8.0° of the cycle at 10 V peak, 88.9° at 1 V peak |
| Class AB standby | \(P = 2V_{CC}I_{CQ}\) | 10 mA each costs 0.4 W and 1 point of efficiency (78.54 → 77.57 %) |
| Class C | \(\eta_{\max} = \tfrac12 I_1/I_{dc}\) | 84.4 % at 150°, 89.7 % at 120°, 94.0 % at 90°; needs a tuned load |
| Thermal chain | \(T_J = T_A + P_D(\theta_{JC}+\theta_{CS}+\theta_{SA})\) | \(T_J = 80.5\) °C with a 5 °C/W sink; 362 °C without one |
| Sink selection | \(\theta_{SA} \le (T_{J(max)}-T_A)/P_D - \theta_{JC} - \theta_{CS}\) | 18.73 °C/W for \(T_J = 150\); 13.79 °C/W for a 125 °C design |
| Harmonic distortion | \(B_1 = (I_{\max}-I_{\min})/2\), \(B_2 = (I_{\max}+I_{\min}-2I_{CQ})/4\) | \(D_2 = 4.84\) %, THD = 5.24 % with \(D_3 = 2\) %; push-pull cancels all even harmonics |
9 Common Mistakes
A transformer-coupled class A stage delivering 1 W draws 2 W from the supply at all times, and in silence every watt of it is dissipated in the transistor. The worst case is no signal at all, which is the opposite of the intuition carried over from class B. Choose the device from \(P_{dc} = V_{CC}I_{CQ}\), not from \(P_{ac}\), and remember that the ratio is exactly two for a transformer-coupled stage and four for a series-fed one. The same reasoning applies to the heat sink, which must be sized for a machine that is switched on and left alone.
At full drive the 25 W stage worked here dissipates only 3.42 W per device, and a designer who stops there will fit a 5 W transistor and a small sink. The dissipation is not monotonic in the drive level: differentiating \(P_D = 2V_{CC}V_p/\pi R_L - V_p^2/2R_L\) puts the maximum at \(V_p = 2V_{CC}/\pi = 12.73\) V, where each device dissipates 5.07 W — 48 per cent more. Real programme material spends most of its time near that level rather than at full output, so the worst case is also the common case. Always evaluate \(2V_{CC}^2/\pi^2R_L\) and design to it.
An inductive collector load stores energy, and when the collector current falls the inductor drives the collector above the supply rail by as much as the signal took it below. In a properly driven class A stage that means a peak \(V_{CE}\) of \(2V_{CC}\), or 40 V on a 20 V supply. Choosing a transistor whose \(BV_{CEO}\) is 30 V because "the supply is only 20 V" produces a stage that works at low levels and fails at high ones. The same trap catches switching circuits with relay or motor loads, where the flyback excursion is limited only by the breakdown of whatever it reaches first — which is why such loads always carry a catch diode.
10 Chapter Review
1. A series-fed class A stage runs from \(V_{CC} = 24\) V into a 150 Ω collector load, biased at mid-point. Find \(I_{CQ}\), \(P_{dc}\), the maximum \(P_{ac}\), the efficiency, and the transistor dissipation with and without signal.
Mid-point bias gives \(V_{CEQ} = 12\) V and \(I_{CQ} = V_{CC}/2R_C = 24/300 = 80.0\) mA. The supply delivers \(P_{dc} = V_{CC}I_{CQ} = 24 \times 0.080 = 1.920\) W, independent of signal. The maximum undistorted swing is \(V_p = 12\) V, so \(P_{ac} = V_p^2/2R_C = 144/300 = 0.480\) W and \(\eta = 0.480/1.920 = 25.0\) per cent, as it must be. With no signal the transistor dissipates \(V_{CEQ}I_{CQ} = 12 \times 0.080 = 0.960\) W and the load resistor dissipates the other \(I_{CQ}^2R_C = (0.08)^2(150) = 0.960\) W. At full drive the transistor dissipation falls to \(0.960 - 0.480 = 0.480\) W, since half of what it was dissipating now goes to the load as signal. Two design consequences follow. The transistor must be rated for 0.96 W, twice the amplifier's output, and it must be heat-sunk for the idle condition. And half the supply power is permanently wasted heating the load resistor, which is why this topology is used only where the load is genuinely a resistor and the power is small.
2. Derive the maximum efficiency of a class B push-pull stage, stating each assumption, and explain why the answer contains no circuit parameter.
Assume each transistor conducts for exactly half the cycle, that the collector can swing to zero volts, and that the load current is a full sine of peak \(I_p\). The load power is the r.m.s. current squared times the load: \(P_{ac} = (I_p/\sqrt2)^2R_L = I_p^2R_L/2 = V_pI_p/2\). The supply power is the supply voltage times the average current drawn, and the average of a half-sine of peak \(I_p\) taken over a full cycle is \(I_p/\pi\); with two supplies, or one supply feeding two devices, the total is \(P_{dc} = 2V_{CC}I_p/\pi\). Hence \(\eta = (V_pI_p/2)/(2V_{CC}I_p/\pi) = (\pi/4)(V_p/V_{CC})\), and the peak current cancels because both powers are proportional to it. Setting \(V_p = V_{CC}\), its largest possible value, gives \(\eta_{\max} = \pi/4 = 78.54\) per cent. The result contains no circuit parameter because both the numerator and the denominator scale with \(V_{CC}\), with \(I_p\) and with \(1/R_L\) in the same way; what is left is a purely geometric ratio between the r.m.s. and the mean of a half sine. Real stages fall short of it by 10 to 18 points because the collector cannot reach zero (a saturation voltage of 1 V on a 20 V rail costs 5 per cent directly), because emitter resistors drop further voltage, and because class AB biasing adds a standby current that the derivation assumed to be zero.
3. A class B stage is to deliver 40 W into 4 Ω. Find the required supply voltage, the peak current, the worst-case dissipation per device, and the minimum \(BV_{CEO}\).
From \(P_{ac} = V_p^2/2R_L\), the required peak output voltage is \(V_p = \sqrt{2P_{ac}R_L} = \sqrt{2(40)(4)} = \sqrt{320} = 17.89\) V. Allowing about 2 V of saturation and emitter-resistor drop, the supply must be at least 19.9 V, so \(V_{CC} = \pm 20\) V would be chosen (or a single 40 V rail with the load capacitively coupled to the mid-point). The peak load current is \(I_p = V_p/R_L = 17.89/4 = 4.47\) A, and the r.m.s. is 3.16 A. The worst-case dissipation is \(P_{D(\max)} = V_{CC}^2/\pi^2R_L\) per device \(= 400/(9.8696 \times 4) = 10.13\) W, occurring at \(V_p = 2V_{CC}/\pi = 12.73\) V; equivalently it is \(0.2026 \times 50\) W, where 50 W is the output the 20 V rail could deliver into 4 Ω at full swing. Each transistor must therefore be rated for at least 10.13 W at the case temperature it will actually reach, which after the derating of Worked Example 20.3 typically means a device rated 50 W or more at 25 °C. The off transistor stands off close to the full rail-to-rail span, \(2V_{CC} = 40\) V, so \(BV_{CEO}\) should be at least 60 V to leave margin for supply tolerance and for the inductive kick of a loudspeaker, which is not a pure resistance.
4. Explain crossover distortion, why it is worse at low signal levels, and how a \(V_{BE}\) multiplier cures it.
In a pure class B stage both transistors are biased exactly at cut-off, and neither begins to conduct until its base-emitter voltage reaches about 0.6 to 0.7 V. For inputs inside that band no current flows in either device and the output is zero, so the transfer characteristic has a flat dead zone through the origin and every waveform is notched as it crosses zero. The error is worse at low levels because it is an absolute error of fixed width, not a proportional one: with a 10 V peak input the dead band occupies \(2\arcsin(0.7/10) = 8.0\) degrees of the cycle, with a 2 V peak it occupies 41.0 degrees, and with a 0.5 V peak the output is silence. The notch is also sharp-cornered, so its energy lies in high-order odd harmonics where the ear is most sensitive and where an overall feedback loop has least gain to correct it. The cure is class AB biasing: hold a small forward voltage, about 1.2 to 1.4 V, between the two bases so that each device idles at 10 to 50 mA and neither ever fully turns off near the crossing. A \(V_{BE}\) multiplier does this actively. It is a transistor with a divider \(R_1\) from collector to base and \(R_2\) from base to emitter, which forces the collector-emitter voltage to \(V_{BE}(1+R_1/R_2)\); making \(R_1/R_2\) adjustable makes the standby current adjustable. Critically, it is bolted to the same heat sink as the output devices, so its own \(V_{BE}\) falls at 2 mV/°C in step with theirs and the standby current does not drift upward as the amplifier warms — which is the thermal-runaway criterion of Chapter 18 applied to a bias network rather than to a single stage.
5. A power transistor dissipating 12 W has \(\theta_{JC} = 1.0\) °C/W and is mounted with a mica washer (\(\theta_{CS} = 0.8\) °C/W) in an enclosure at 55 °C. If \(T_{J(max)} = 175\) °C, what heat sink is needed, and what changes if the washer is replaced by a thermally conductive pad with \(\theta_{CS} = 0.3\) °C/W?
The total permissible thermal resistance is \(\theta_{JA} = (T_{J(max)}-T_A)/P_D = (175-55)/12 = 10.00\) °C/W, so \(\theta_{SA} \le 10.00 - 1.0 - 0.8 = 8.20\) °C/W. Designing to a junction temperature of 150 °C instead, to leave margin, gives \(\theta_{JA} \le (150-55)/12 = 7.92\) and \(\theta_{SA} \le 6.12\) °C/W, which is the figure a prudent designer would specify. With the better pad, \(\theta_{CS}\) falls by 0.5 °C/W, so the permissible sink rises to \(8.70\) °C/W for the 175 °C limit or \(6.62\) °C/W for the 150 °C one — about a 6 to 8 per cent relaxation, which in practice may allow a smaller extrusion. Working the temperatures for an 8 °C/W sink and the mica washer: \(T_S = 55 + 12(8.0) = 151\) °C, \(T_C = 55+12(8.8) = 161\) °C, \(T_J = 55+12(9.8) = 173\) °C — only 2 °C of margin, which is not a design but a hope. The lesson is that the interface resistance, which costs nothing to improve, is worth attending to before the sink, which costs money and space; but that neither can rescue a stage whose dissipation was underestimated in the first place.