By the end of this chapter you should be able to:
- Draw the common-base, common-emitter and common-collector connections and state the current gain of each.
- Interpret the input and output characteristics of the common-base and common-emitter connections, with axes and regions labelled.
- Identify the active, cut-off, saturation and reverse regions on a set of output curves and say what each is used for.
- Explain base-width modulation, define the Early voltage, and compute the output resistance \(r_o\) from it.
- Distinguish \(BV_{CBO}\), \(BV_{CEO}\) and \(BV_{EBO}\) and estimate \(BV_{CEO}\) from \(BV_{CBO}\) and \(\beta\).
- Construct a d.c. load line, locate the Q-point on it, and find \(V_{CE}\) and \(I_C\) graphically.
- Plot the maximum power dissipation hyperbola and test whether a proposed load line stays inside it.
Chapter 16 described one device in one mode. A transistor, however, has three terminals and a circuit has two ports, so one terminal must be shared between the input and the output. There are three ways to make that choice, and although the silicon does not know or care which one you have made, the three connections behave so differently — one has a current gain of 167 and an input resistance of two kilohms, another has a current gain below unity and an input resistance of thirteen ohms — that they are treated as three separate circuits with three separate names.
This chapter is about measurement rather than mechanism. For each connection there is an input characteristic, relating the input current to the input voltage, and an output characteristic, relating the output current to the output voltage with the input held at a series of fixed values. Those curves are what a curve tracer draws, what a data sheet reproduces, and what every graphical design method operates on. Read properly they contain everything: the four operating regions and the boundaries between them, the output resistance and the Early voltage that sets it, the breakdown voltages that bound the usable area, and — once the load line and the power hyperbola are drawn on top — the exact operating point the circuit will settle at and whether the device will survive there.
1 Three Ways to Connect the Same Device
A two-port network has four terminals; a transistor has three. One terminal must therefore serve as the common return for both the input and the output, and it lends its name to the configuration. In each case the input is driven between one terminal and the common one, and the output is taken between the third terminal and the common one.
The current gains follow directly from Chapter 16 and need no new physics. In common base the input current is \(I_E\) and the output current is \(I_C\), so the gain is \(\alpha = I_C/I_E = 0.994\) — less than one, always. In common emitter the input is \(I_B\) and the output is \(I_C\), giving \(\beta = 166\) for the same device. In common collector the input is \(I_B\) and the output is \(I_E\), giving \(1+\beta = 167\). Three numbers spanning two and a half orders of magnitude, all describing one transistor at one operating point.
A configuration with a current gain below unity sounds useless, and common base was in fact the first connection to be studied only because it was the first to be built. It survives because current gain is not the only figure of merit: common base has a very low input resistance, an excellent high-frequency response because it suffers no Miller multiplication, and a voltage gain equal in magnitude to the common-emitter value. Chapter 19 derives all three. For now the point is that the configuration determines what the characteristics look like, and each set of characteristics is measured and drawn differently.
Two conventions govern every curve in this chapter. First, all voltages are written with a double subscript, \(V_{CE}\) meaning the potential of the collector with respect to the emitter, so that \(V_{CE} = -V_{EC}\) and \(V_{CE} = V_{CB} + V_{BE}\) always. Second, the characteristics are drawn for an npn with positive supplies; for a pnp every axis reverses and the curves appear in the third quadrant, which is why data sheets for pnp devices often plot magnitudes and add a note.
2 Common-Base Characteristics
To measure the common-base characteristics, drive a controlled current \(I_E\) into the emitter, sweep \(V_{CB}\), and record \(I_C\). Repeat for several values of \(I_E\). What comes out is the most nearly ideal set of curves the device produces, and the reason is Chapter 16's transport picture: \(I_C = \alpha I_E + I_{CBO}\), and neither \(\alpha\) nor \(I_{CBO}\) cares much about \(V_{CB}\).
Three features of the output characteristic deserve comment. The curves are flat: raising \(V_{CB}\) from 1 V to 8 V changes \(I_C\) by well under one per cent, because every electron delivered to the collector edge of the base is collected whatever the field there, and there are no more to be had. The curves are also almost evenly spaced, at \(\alpha\) times the emitter-current step, so the device is highly linear in this connection. And the flat region extends right down to \(V_{CB} = 0\) and even a little way negative: the collector junction is still collecting at zero applied bias, because its built-in field is still there. Only when \(V_{CB}\) reaches about \(-0.5\) V is the collector junction genuinely forward biased, at which point it starts injecting backwards and \(I_C\) collapses. That narrow strip on the left is the saturation region.
The input characteristic is simply the forward characteristic of the emitter-base diode, plotted as \(I_E\) against \(V_{BE}\), and it looks exactly like the diode curve of Chapter 6 — negligible below 0.5 V, rising steeply past 0.6 V, about 60 mV per decade of current. Its slope defines the common-base input resistance
At \(I_E = 2\) mA and \(V_T = 26\) mV this is 13.0 Ω; at 0.5 mA it is 52 Ω. This tiny, current-dependent resistance is the defining nuisance and the defining virtue of the common-base connection, and it reappears as \(r_e\) in every small-signal model in Chapter 19.
The one non-ideality visible in the input curves is that they shift slightly to the left as \(V_{CB}\) is raised — a given \(I_E\) needs a few millivolts less drive. That is the same base-width modulation that Section 5 develops as the Early effect, seen from the input side.
3 Common-Emitter Characteristics
The common-emitter connection is the workhorse, and its characteristics are the ones drawn on every data sheet. Drive a controlled \(I_B\), sweep \(V_{CE}\), record \(I_C\), and repeat for a family of base currents.
The differences from the common-base family are worth spelling out, because they all follow from one substitution. Writing \(I_E = I_C + I_B\) in \(I_C = \alpha I_E + I_{CBO}\) gives \(I_C = \beta I_B + (1+\beta)I_{CBO}\), and every awkward feature of these curves comes from that factor \((1+\beta)\).
- The curves are not flat. They rise visibly with \(V_{CE}\). \(\alpha\) changes by only a fraction of a per cent across the sweep, but Chapter 16 showed that a fractional change in \(\alpha\) becomes roughly \(\beta\) times that fractional change in \(\beta\), so the same physics that was invisible in Figure 17.2 is plainly visible here.
- Cut-off is not zero current. With \(I_B = 0\) the collector current is \(I_{CEO} = (1+\beta)I_{CBO}\), which is a hundred times the common-base leakage.
- The saturation region is a strip, not a line. The knee sits near \(V_{CE} = 0.2\) to 0.3 V rather than at zero, because saturation now begins when \(V_{CB}\) falls to zero, which happens while \(V_{CE}\) is still equal to \(V_{BE} \approx 0.7\) V. Below the knee the collector junction is forward biased and the device stops obeying \(I_C = \beta I_B\).
The common-emitter input characteristic plots \(I_B\) against \(V_{BE}\), and it is again a forward diode curve — the same junction, after all — but scaled down by \((1+\beta)\) on the current axis, so it runs in microamperes rather than milliamperes. Its slope gives the common-emitter input resistance
For \(I_E = 2\) mA and \(\beta = 100\), \(h_{ie} = 101 \times 13.0 = 1.31\ \text{k}\Omega\) — a hundred times the common-base figure, from the same junction at the same current. This is the impedance-transforming action of the emitter follower seen in miniature, and it is why common emitter is easy to drive and common base is not.
The common-collector characteristics need no separate figure. Since \(I_E = I_C + I_B\) and \(I_B\) is a hundredth of \(I_C\), a plot of \(I_E\) against \(V_{CE}\) for constant \(I_B\) is the common-emitter family redrawn about one per cent higher. What is genuinely different about common collector is its input characteristic, which is not a diode curve at all: because the emitter sits at \(V_{in} - 0.7\) V and drives a load, the input current depends on the load, and the useful statement is the impedance relation \(Z_{in} = (1+\beta)(r_e + R_E)\) that Chapter 19 derives.
4 The Four Regions and What Each Is For
Figure 17.3 divides into four areas, and the boundaries are set by the bias on the two junctions exactly as tabulated in Chapter 16. Knowing which region a transistor is in is the first step of every analysis, and getting it wrong is the commonest single error in transistor circuit work.
| Region | Where on the plot | Governing relation | Used for |
|---|---|---|---|
| Active | \(V_{CE} > 0.3\) V, \(I_B > 0\) | \(I_C = \beta I_B\), nearly independent of \(V_{CE}\) | Amplification. The device is a current-controlled current source. |
| Saturation | \(V_{CE} < 0.2\)–0.3 V | \(V_{CE(sat)} \approx 0.2\) V; \(I_C\) set by the external circuit, not by \(I_B\) | The closed contact of a switch, and the "low" output of a logic gate. |
| Cut-off | Along the horizontal axis, \(I_B \le 0\) | \(I_C = I_{CEO}\), microamperes | The open contact of a switch, and the "high" output of a logic gate. |
| Reverse active | \(V_{CE} < 0\) (third quadrant, not drawn) | \(I_C = \beta_R I_B\) with \(\beta_R \approx 0.5\)–5 | Almost nothing deliberate; it is what happens when a device is fitted backwards. |
The distinction between active and saturated operation is quantitative, and the useful tool is the forced beta. Suppose a transistor with \(\beta = 100\) is used as a switch with \(V_{CC} = 12\) V and \(R_C = 2.2\) kΩ. If it saturates, \(V_{CE} = V_{CE(sat)} = 0.2\) V and the collector current is fixed by the resistor:
The base current needed just to reach that point is \(I_{C(sat)}/\beta = 53.6\ \mu\)A. A designer who wants the switch to stay closed for the worst-case device and the worst-case temperature supplies rather more — commonly twice, an overdrive factor of two, so \(I_B = 107\ \mu\)A. If instead \(I_B\) is driven to 100 µA, the ratio \(I_C/I_B = 5.364/0.100 = 53.6\) is the forced beta. Whenever the forced beta comes out well below the device's true \(\beta\), the transistor is saturated; whenever the calculation of \(\beta I_B\) predicts a collector current larger than the circuit can supply, the transistor is saturated and the prediction is wrong.
Assume the active region. Compute \(I_B\) from the base loop, then \(I_C = \beta I_B\), then \(V_{CE}\) from the collector loop. If \(V_{CE}\) comes out greater than about 0.3 V, the assumption was right and you are finished. If it comes out below that — or worse, negative, which is a common and alarming result — the transistor is saturated: discard \(I_C = \beta I_B\), set \(V_{CE} = 0.2\) V instead, and recompute \(I_C\) from the collector loop. A negative \(V_{CE}\) is never a real answer; it is the arithmetic telling you which region you are in.
Saturation carries a penalty that matters in switching circuits. Driving the collector junction into forward bias fills the base with stored minority charge, and that charge must be removed before the device can turn off. The resulting storage time dominates the turn-off delay of a saturated switch and is the reason Schottky-clamped logic families deliberately prevent full saturation, and the reason the field-effect switches of Chapter 24 turn off faster.
5 The Early Effect and Output Resistance
The upward slope of the active-region curves is not a measurement imperfection; it is a real and important property with a mechanism, a parameter and a circuit consequence.
The mechanism is base-width modulation. Increasing \(V_{CE}\) with \(V_{BE}\) fixed increases the reverse bias on the collector junction, and Chapter 5 showed that a wider reverse bias means a wider depletion region. That depletion region eats into the base from the collector side, so the neutral base width \(W_B\) shrinks. Chapter 16 showed that the collector current varies as \(1/W_B\) and the base transport factor as \(1 - (W_B/L_{nB})^2/2\); a narrower base therefore means a steeper minority-carrier gradient, more current, and a higher \(\beta\). James Early identified the effect in 1952 and it carries his name.
The parameter is the Early voltage \(V_A\). Extrapolate the active-region curves backwards to the left, as the dashed line in Figure 17.3 does, and they all converge on the horizontal axis at \(V_{CE} = -V_A\). Typical values are 50 to 150 V for small-signal devices and rather less for high-frequency parts with very thin bases. Empirically,
where \(I_{C0}\) is the current the ideal theory predicts. The straight-line convergence is not exact but is accurate enough to be the standard model, and it is what SPICE implements.
The consequence is a finite output resistance. Differentiating,
The approximation is good whenever \(V_{CE} \ll V_A\), which is usually true. \(r_o\) is the \(1/h_{oe}\) of the h-parameter model in Chapter 19, and it appears in parallel with the collector load in every gain expression.
A curve tracer shows that for \(I_B = 20\ \mu\)A the collector current is 2.10 mA at \(V_{CE} = 5\) V and 2.30 mA at \(V_{CE} = 15\) V. Find the output resistance, the Early voltage, and the change in \(\beta\) across the sweep.
Output resistance. Directly from the definition,
Early voltage. The line through the two points reaches \(I_C = 0\) at \(V_{CE} = 5 - I_C r_o = 5 - (2.10\times10^{-3})(50\,000) = 5 - 105 = -100\) V, so \(V_A = 100\) V. Equivalently \(V_A = r_o I_C - V_{CE} = 105 - 5 = 100\) V.
Current gain. At 5 V, \(\beta = 2.10\ \text{mA}/20\ \mu\text{A} = 105\); at 15 V, \(\beta = 2.30/0.020 = 115\). The current gain has risen by 9.5 per cent for a 10 V change in collector voltage — one more reason not to design around \(\beta\).
Sanity check on \(r_o\). The rule \(r_o \approx V_A/I_C\) gives \(100/2.2\ \text{mA} = 45.5\ \text{k}\Omega\) using the mid-sweep current, against the exact \((V_A + V_{CE})/I_C = 105/2.10\ \text{mA} = 50.0\ \text{k}\Omega\) at the 5 V point. The two agree to about ten per cent, which is the accuracy the parameter deserves.
Why it usually does not matter. In the amplifier of Chapter 19 this 50 kΩ sits in parallel with a collector load of 2 kΩ, reducing it to 1.92 kΩ and the voltage gain by 3.9 per cent. In a circuit whose load is a current source of comparable resistance — the differential pairs inside an operational amplifier — \(r_o\) is the load, and it sets the gain entirely.
6 Breakdown: Three Voltages, Three Mechanisms
The characteristics of Figure 17.3 end at the right-hand edge of the plot for a reason: beyond some voltage the collector current turns upwards and the device fails. Three breakdown voltages are quoted, and confusing them is expensive.
\(BV_{CBO}\) — collector to base, emitter open — is the avalanche breakdown of the collector junction on its own, exactly as in Chapter 6. Because the collector is lightly doped, the depletion region is wide, the peak field for a given voltage is low, and \(BV_{CBO}\) is comfortably large: 40 to 100 V for ordinary small-signal parts.
\(BV_{CEO}\) — collector to emitter, base open — is always considerably lower, and the reason is the \((1+\beta)\) multiplication again. With the base floating, any avalanche-generated carriers in the collector junction act as base current and are amplified by \(\beta\), which produces more collector current, which produces more avalanche. Breakdown therefore begins at a multiplication factor of only \(1/\beta\) rather than the very large factor needed for true avalanche. The standard empirical relation is
With \(BV_{CBO} = 60\) V and \(\beta = 100\), \(BV_{CEO} = 60/100^{1/4} = 60/3.162 = 19.0\) V. A high-gain sample with \(\beta = 200\) from the same batch gives \(60/3.761 = 16.0\) V, so the higher-gain device is the more fragile — a trade-off that runs right through transistor design.
\(BV_{EBO}\) — emitter to base, collector open — is the reverse breakdown of the emitter junction, and it is the smallest of the three by far, typically 5 to 7 V. Both sides of that junction are heavily doped, the depletion region is very narrow, and the mechanism is Zener tunnelling rather than avalanche. This is the limit that gets exceeded by accident. Applying a few volts of reverse \(V_{BE}\) — by driving the base of an npn negative to turn it off quickly, for instance — puts the junction into breakdown, and although the device survives if the current is limited, each excursion damages the emitter periphery and \(\beta\) falls permanently, particularly at low currents.
It is the one abuse that leaves no visible trace: the transistor still works, still shows roughly the right \(V_{BE}\), and has quietly lost half its low-current gain. If a circuit needs a fast turn-off, clamp the base with a diode or drive it from a source that cannot go more than a diode drop negative.
Two further limits bound the usable area. Punch-through occurs if the collector depletion region widens until it meets the emitter depletion region: the neutral base disappears entirely, the emitter and collector are connected by a depletion region, and current rises without limit. Devices with very thin bases — the ones with the highest \(\beta\) and \(f_T\) — punch through before they avalanche. Second breakdown is a thermal instability rather than an electrical one: current crowds into a hot spot, that spot's local \(V_{BE}\) requirement falls with temperature, so it takes still more of the current, and the device fails locally within microseconds at a voltage and current each individually within rating. It is the reason a power transistor's safe operating area diagram has a second, steeper boundary at high voltage that lies below the constant-power hyperbola.
7 The Load Line and the Power Hyperbola
The characteristics describe the device; a circuit adds a constraint of its own, and the operating point is where the two agree. Consider a transistor with a collector resistor \(R_C\) returned to a supply \(V_{CC}\). Kirchhoff's voltage law round the output loop gives
A straight line on the same axes as the output characteristics, of slope \(-1/R_C\). It is called the d.c. load line, and it contains no information about the transistor whatever — only about the supply and the resistor.
Drawing it takes two points. Setting \(V_{CE} = 0\) gives the saturation end, \(I_C = V_{CC}/R_C\); setting \(I_C = 0\) gives the cut-off end, \(V_{CE} = V_{CC}\). Join them. The transistor must simultaneously satisfy its own characteristic and this line, so the operating point — the Q-point, for quiescent — is the intersection of the load line with the curve for whatever base current the bias circuit supplies.
The second constraint is thermal. The transistor dissipates \(P_D = V_{CE}I_C\), and its data sheet quotes a maximum. The locus of constant \(P_D\) is a rectangular hyperbola, \(I_C = P_{D(max)}/V_{CE}\), and everything above and to the right of it is forbidden. A design is safe if the entire load line, not merely the Q-point, lies below the hyperbola — because a signal drives the operating point up and down the line, and a fault or a transient can put it anywhere on it.
A transistor rated at \(P_{D(max)} = 80\) mW is used with \(V_{CC} = 20\) V and \(R_C = 1\) kΩ. Is the design safe?
The load line runs from \((0\ \text{V},\ 20\ \text{mA})\) to \((20\ \text{V},\ 0)\). Dissipation along it is \(P = V_{CE}(V_{CC}-V_{CE})/R_C\), which is a downward parabola peaking at \(V_{CE} = V_{CC}/2 = 10\) V, where
That exceeds the 80 mW rating, so the design is not safe as it stands. Find where the line crosses the hyperbola by setting \(V_{CE}(20-V_{CE})/1000 = 0.080\):
The whole span from 5.53 V to 14.47 V is forbidden, which unfortunately includes the mid-point where a linear amplifier would naturally be biased. Two fixes are available. Bias outside the span — at \(V_{CE} = 16\) V, \(I_C = 4\) mA, dissipation 64 mW — at the cost of an asymmetric and much smaller output swing. Or change the load line: with \(R_C = 2\) kΩ the peak becomes \(V_{CC}^2/4R_C = 50\) mW, and the entire line is safe with room to spare, though the maximum current is halved.
The general design rule. A common-emitter stage biased at mid-supply on a resistive load dissipates \(V_{CC}^2/4R_C\) at zero signal, and that is its worst case, because applying a signal moves it away from the peak of the parabola in both directions. Chapter 20 shows this is exactly the 25 per cent efficiency limit of a series-fed class A amplifier, seen from the thermal side.
8 Summary and Key Results
| Item | Relation | Value or comment |
|---|---|---|
| Common-base gain | \(A_i = \alpha = I_C/I_E\) | 0.99–0.998; input resistance \(r_e = V_T/I_E = 13\ \Omega\) at 2 mA |
| Common-emitter gain | \(A_i = \beta = I_C/I_B\) | 100–300; input resistance \(h_{ie} = (1+\beta)r_e = 1.31\ \text{k}\Omega\) at 2 mA |
| Common-collector gain | \(A_i = 1+\beta = I_E/I_B\) | 101–301; voltage gain just below unity |
| CB output curves | \(I_C = \alpha I_E + I_{CBO}\) | Flat and evenly spaced; active right down to \(V_{CB} = 0\) |
| CE output curves | \(I_C = \beta I_B + (1+\beta)I_{CBO}\) | Visibly sloped; knee at \(V_{CE} \approx 0.3\) V |
| Active region | \(J_E\) forward, \(J_C\) reverse | \(I_C = \beta I_B\); the only region for linear amplification |
| Saturation | both junctions forward | \(V_{CE(sat)} = 0.2\) V; \(I_C\) set by the load; stored charge slows turn-off |
| Cut-off | both junctions reverse | \(I_C = I_{CEO} = (1+\beta)I_{CBO}\) |
| Early effect | \(I_C = I_{C0}(1+V_{CE}/V_A)\) | \(V_A = 100\) V from a 2.10 mA / 2.30 mA pair at 5 V and 15 V |
| Output resistance | \(r_o = (V_A+V_{CE})/I_C \approx V_A/I_C\) | 50.0 kΩ at \(I_C = 2.1\) mA |
| Breakdown | \(BV_{CEO} = BV_{CBO}/\beta^{1/4}\) | 60 V → 19.0 V at \(\beta = 100\); \(BV_{EBO}\) only 5–7 V |
| D.C. load line | \(I_C = (V_{CC}-V_{CE})/R_C\) | Ends at \(V_{CC}/R_C\) and \(V_{CC}\); Q is its intersection with the \(I_B\) curve |
| Power hyperbola | \(I_C = P_{D(max)}/V_{CE}\) | Peak load-line dissipation \(V_{CC}^2/4R_C\); 100 mW for 20 V into 1 kΩ |
9 Common Mistakes
The relation holds only in the active region. If a base drive of 100 µA is applied to a device with \(\beta = 100\) and \(R_C = 2.2\) kΩ on a 12 V supply, the formula predicts \(I_C = 10\) mA, which would need \(22\) V across a 2.2 kΩ resistor fed from 12 V. The transistor cannot do it; it saturates, \(V_{CE}\) sits at 0.2 V and \(I_C = 5.36\) mA. The tell-tale is a computed \(V_{CE}\) that is very small or negative. Always finish an active-region calculation by checking \(V_{CE}\), and switch to \(V_{CE} = V_{CE(sat)}\) if the check fails.
A data sheet that says "\(V_{CBO} = 60\) V" is not promising 60 V between collector and emitter. With the base free, avalanche carriers are multiplied by the transistor's own gain, and breakdown starts at roughly \(BV_{CBO}/\beta^{1/4}\), which for \(\beta = 100\) is 19 V. Designing a 24 V circuit around the 60 V figure gives a stage that works on the bench and fails in the field on the first inductive transient. And the smallest of the three ratings, \(BV_{EBO}\) at 5 to 7 V, is the one most often exceeded — usually by driving the base negative to speed up turn-off. Reverse breakdown of the emitter junction does not destroy the device outright; it quietly and permanently reduces \(\beta\).
The Q-point is where the device sits with no signal, but a signal sweeps the operating point along the whole load line, and a fault can leave it anywhere. The correct test is whether the entire load line stays below the \(P_{D(max)}\) hyperbola, which for a resistive collector load means checking the peak value \(V_{CC}^2/4R_C\) at \(V_{CE} = V_{CC}/2\). A stage biased at 16 V and 4 mA dissipates a comfortable 64 mW, yet the same load line passes through a point dissipating 100 mW; if anything drives the device there, an 80 mW part is destroyed. For power stages there is a second boundary as well: the second-breakdown limit cuts the corner of the safe operating area at high voltage, below the constant-power line.
10 Chapter Review
1. A transistor with \(\beta = 120\) is connected with \(V_{CC} = 15\) V and \(R_C = 3.3\) kΩ. Sketch the load line and find the Q-point for \(I_B = 25\ \mu\)A. What base current would just saturate it?
The load line runs between \(I_C = V_{CC}/R_C = 15/3300 = 4.545\) mA at \(V_{CE} = 0\), and \(V_{CE} = 15\) V at \(I_C = 0\). Assume the active region: \(I_C = \beta I_B = 120 \times 25\ \mu\text{A} = 3.000\) mA, so \(V_{CE} = 15 - (3.000\times10^{-3})(3300) = 15 - 9.90 = 5.10\) V. Since 5.10 V is comfortably above 0.3 V the assumption was right, and the Q-point is (5.10 V, 3.00 mA) with a dissipation of 15.3 mW. To saturate, the collector current must reach \(I_{C(sat)} = (15-0.2)/3300 = 4.485\) mA, which needs \(I_B = 4.485/120 = 37.4\ \mu\)A; a designer would supply about twice that, say 75 µA, so that the device stays saturated for a low-\(\beta\) sample. Note that the Q-point at 5.10 V is not at the middle of the load line — mid-point would be 7.5 V, needing \(I_B = 18.9\ \mu\)A — so the available negative-going output swing is 5.10 V while the positive-going swing is 9.90 V, and the stage will clip on the negative half first.
2. Explain why the common-emitter output curves slope upwards while the common-base curves are flat, given that both describe the same transistor.
Both slopes have the same cause, base-width modulation, but the two connections amplify it differently. In common base the measured quantity is \(I_C = \alpha I_E\) with \(I_E\) held constant, so the fractional rise in \(I_C\) equals the fractional rise in \(\alpha\). Since \(\alpha\) is around 0.994 and can only move within the 0.6 per cent of headroom below unity, a large change in \(V_{CB}\) produces a change in \(I_C\) of a fraction of a per cent, which is invisible at the scale of the plot. In common emitter the measured quantity is \(I_C = \beta I_B\) with \(I_B\) held constant, and \(\beta = \alpha/(1-\alpha)\) magnifies the same fractional change in \(\alpha\) by roughly \((1+\beta)\). A rise of 0.06 per cent in \(\alpha\) becomes a rise of about 10 per cent in \(\beta\), which is plainly visible. Quantitatively, the curve for \(I_B = 20\ \mu\)A rises from 2.10 mA to 2.30 mA between \(V_{CE} = 5\) V and 15 V, a slope corresponding to \(r_o = 50\) kΩ and \(V_A = 100\) V, while the equivalent common-base output resistance is of the order of megohms. The physics is identical; only the bookkeeping differs.
3. A device has \(BV_{CBO} = 80\) V. Two samples are measured, one with \(\beta = 60\) and one with \(\beta = 250\). Estimate \(BV_{CEO}\) for each, taking \(n = 4\), and comment on what this implies for a circuit running from a 30 V rail.
For the low-gain sample, \(\beta^{1/4} = 60^{0.25} = 2.783\), so \(BV_{CEO} = 80/2.783 = 28.7\) V. For the high-gain sample, \(250^{0.25} = 3.976\), giving \(BV_{CEO} = 80/3.976 = 20.1\) V. Both are far below the 80 V collector-base figure, and the two differ by 30 per cent purely because of the \(\beta\) spread within one part number. A circuit whose collector can swing to a 30 V rail with the base open or driven from a high impedance is unsafe for either sample and disastrously unsafe for the high-gain one. Three fixes are standard, and all of them work by denying the avalanche carriers their \(\beta\)-fold amplification: provide a low-resistance path from base to emitter, in which case the relevant rating becomes \(BV_{CER}\) or, with a short, \(BV_{CES}\), both of which approach \(BV_{CBO}\); choose a part with a higher \(BV_{CBO}\); or clamp the collector excursion with a diode, which is the usual answer when the load is inductive.
4. From a set of output characteristics, the curve for \(I_B = 40\ \mu\)A passes through (4 V, 4.16 mA) and (12 V, 4.48 mA). Find \(r_o\), \(V_A\), \(\beta\) at each point, and the effect of \(r_o\) on a stage with a 2.7 kΩ collector load.
The output resistance is \(r_o = \Delta V_{CE}/\Delta I_C = (12-4)/(4.48-4.16)\times10^{-3} = 8/(3.2\times10^{-4}) = 25.0\ \text{k}\Omega\). The Early voltage follows from \(V_A = r_o I_C - V_{CE}\) evaluated at either point: at the first, \((25\,000)(4.16\times10^{-3}) - 4 = 104 - 4 = 100\) V; at the second, \((25\,000)(4.48\times10^{-3}) - 12 = 112 - 12 = 100\) V. The two agree, which confirms the straight-line model. The current gain is \(4.16/0.040 = 104\) at 4 V and \(4.48/0.040 = 112\) at 12 V, a rise of 7.7 per cent. For the amplifier, \(r_o\) appears in parallel with the collector load: \(2.7\ \text{k}\Omega \parallel 25\ \text{k}\Omega = (2.7\times25)/27.7 = 2.437\ \text{k}\Omega\), so the effective load and hence the voltage gain fall by 9.7 per cent. That is large enough to notice in a careful calculation and small enough to ignore in a first-pass design; it becomes the dominant term only when the collector load is itself a high-resistance current source.
5. A transistor rated at 250 mW is to be used with \(V_{CC} = 24\) V. What is the smallest collector resistor for which the entire load line stays inside the rating, and what Q-point does that give at mid-supply?
The worst point on a resistive load line is mid-supply, where \(V_{CE} = V_{CC}/2 = 12\) V, \(I_C = V_{CC}/2R_C\) and the dissipation is \(P_{\max} = V_{CC}^2/4R_C\). Setting that equal to the 250 mW rating, \(R_C = V_{CC}^2/(4P_{D(max)}) = 576/(4 \times 0.250) = 576\ \Omega\). Any smaller resistor makes the load line steeper and pushes its peak above the hyperbola; any larger one is safe. Taking the nearest larger preferred value, \(R_C = 620\ \Omega\), gives a mid-supply Q-point of \(V_{CE} = 12\) V and \(I_C = 12/620 = 19.35\) mA, dissipating \(12 \times 0.01935 = 232\) mW — inside the rating with a margin of 7 per cent. Two cautions attach to that answer. The 250 mW figure is quoted at 25 °C ambient and must be derated above it, typically by about 2 mW/°C for a small plastic package, so at 50 °C the real limit is nearer 200 mW and \(R_C\) should be 720 Ω or more. And the load line is tangent to the hyperbola at exactly one point when \(R_C = 576\ \Omega\), which leaves no margin at all for supply tolerance; a design that aims for the tangency condition is a design that fails half the time.