By the end of this chapter you should be able to:
- State what a Q-point is and explain the three constraints — swing, linearity and dissipation — that fix where it should sit.
- Analyse and design fixed-bias, emitter-bias, collector-feedback and voltage-divider circuits, computing \(I_B\), \(I_C\) and \(V_{CE}\) for each.
- Derive the stability factor \(S(I_{CO}) = \partial I_C/\partial I_{CO}\) from the general bias equation and evaluate it for all four circuits.
- Quantify the effect of \(\beta\) spread by recomputing a Q-point for \(\beta = 50\), 100 and 150.
- Apply the exact and approximate analyses of the voltage divider and state when the approximation is safe.
- Compute \(S(V_{BE})\) and combine leakage drift with \(V_{BE}\) drift to predict the total Q-point shift over a temperature range.
- State the thermal-runaway criterion and use it to size an emitter resistor in a power stage.
A transistor amplifies only in the active region, and it reaches the active region only if something holds it there. Left to itself a transistor does nothing: with no bias the base-emitter junction is unbiased, no carriers are injected, and the device sits in cut-off, where a signal applied to the base does not even get past the 0.7 V it needs to turn the junction on. Biasing is the business of establishing a steady operating point — a quiescent base current, collector current and collector-emitter voltage — on which the signal can ride.
Placing that operating point is a matter of arithmetic and takes ten minutes. Keeping it there is the hard part, and it is what this chapter is really about. Chapter 16 showed that \(\beta\) varies by a factor of three between samples of one part number, that leakage doubles every 10 °C, and that \(V_{BE}\) falls at about 2 mV/°C. A bias circuit that works beautifully for the transistor on the bench at 25 °C can drive the next one out of the box into saturation, or into cut-off, or into a thermal runaway that destroys it. The four circuits examined here span the whole range from useless to good, and the number that separates them — the stability factor \(S\) — is derived once and then evaluated for each. The chapter ends with the condition a power stage must satisfy if the heat it generates is not to generate more heat still.
1 Placing the Q-Point, and Why It Moves
The quiescent point is the set of d.c. currents and voltages that exist with no signal applied. On the output characteristics of Chapter 17 it is a single point, the intersection of the d.c. load line with the curve for whatever base current the bias network supplies. Three separate considerations decide where it should be.
- Output swing. The signal moves the operating point up and down the load line. Move it too far towards cut-off and the negative-going half of the output clips against the horizontal axis; too far towards saturation and the positive-going half clips against the knee. Placing the Q-point at the middle of the load line, \(V_{CE} \approx V_{CC}/2\), maximises the undistorted swing and is the usual starting choice for a linear amplifier.
- Linearity. The characteristics are not evenly spaced everywhere: they crowd together at low \(I_C\), where \(\beta\) is falling, and again at very high \(I_C\), where high-level injection sets in. A Q-point in the middle of the flat plateau of the \(\beta\)-versus-\(I_C\) curve gives the least distortion.
- Dissipation. The device dissipates \(V_{CE}I_C\) at the Q-point, and for a resistive load the mid-point bias is precisely the worst case, at \(V_{CC}^2/4R_C\). Worked Example 17.2 showed a mid-point bias that violated an 80 mW rating on a 20 V supply.
A switch is biased quite differently: it is designed to sit at one end of the load line or the other and to spend as little time as possible in between, because the middle of the line is where all the heat is made.
Having chosen a point, the problem is that the transistor will not stay at it. Three drifts act, and all three push the collector current in the same direction — upwards.
| Source of drift | Magnitude | Effect on \(I_C\) |
|---|---|---|
| \(\beta\) spread between samples | Data-sheet range of 3:1 is normal (e.g. 100–300) | Direct: if the circuit fixes \(I_B\), then \(I_C = \beta I_B\) varies 3:1 too |
| Leakage \(I_{CBO}\) | Doubles every 10 °C; 10 nA at 25 °C becomes 1.81 µA at 100 °C | Enters as \((1+\beta)I_{CBO}\), so 183 µA at 100 °C for \(\beta = 100\) |
| \(V_{BE}\) falling with temperature | \(-2\) mV/°C, so \(-0.15\) V over a 75 °C rise | A lower turn-on voltage means more base drive for the same supply |
To these must be added that \(\beta\) itself rises with temperature, by roughly 0.5 per cent per degree. The purpose of a bias circuit is to make the operating point as nearly independent of all four as the component count allows.
2 Fixed Bias, and Exactly How It Fails
The simplest possible arrangement takes a single resistor from the supply to the base. Because \(V_{CC}\) is much larger than \(V_{BE}\), the base current is essentially constant, which is where the name comes from.
Design for \(I_C = 2\) mA and \(V_{CE} = 6\) V from \(V_{CC} = 12\) V with a nominal \(\beta = 100\). Take \(V_{BE} = 0.7\) V throughout.
Collector resistor. The collector loop gives \(R_C = (V_{CC} - V_{CE})/I_C = (12-6)/2\ \text{mA} = 3.0\ \text{k}\Omega\).
Base resistor. The base loop is \(V_{CC} = I_BR_B + V_{BE}\), and \(I_B = I_C/\beta = 20\ \mu\)A, so
The nearest preferred value is 560 kΩ, which gives \(I_B = 11.3/560\,000 = 20.179\ \mu\)A. At \(\beta = 100\) that is \(I_C = 2.018\) mA and \(V_{CE} = 12 - 6.054 = 5.946\) V. The design meets its target.
Now change the transistor. \(R_B\) fixes \(I_B\) and nothing else does, so \(I_B\) stays at 20.179 µA whatever the device:
| \(\beta\) | \(I_B\) | \(I_C = \beta I_B\) | \(V_{CE} = 12 - 3000I_C\) | State |
|---|---|---|---|---|
| 50 | 20.179 µA | 1.009 mA | 8.973 V | near cut-off; positive swing only 3.0 V |
| 100 | 20.179 µA | 2.018 mA | 5.946 V | as designed |
| 150 | 20.179 µA | 3.027 mA | 2.920 V | near saturation; negative swing only 2.7 V |
The collector current tracks \(\beta\) exactly, so a three-to-one \(\beta\) range gives a three-to-one \(I_C\) range: from 1.009 mA to 3.027 mA, a spread of 100 per cent about the design value. The Q-point walks the length of the load line, and with a \(\beta\) of 190 or more the stage would saturate and stop amplifying altogether.
Fixed bias is nonetheless worth studying, for two reasons beyond its use as a cautionary tale. It is the correct circuit for a saturated switch, where the whole point is to drive \(I_B\) hard enough that the worst-case device still saturates, and where a \(\beta\) of 300 instead of 100 does no harm at all. And its stability factor, derived next, comes out as \(S = 1 + \beta\), which is the worst value any circuit can have and therefore the benchmark against which the others are measured.
3 Deriving the Stability Factor
A single number is wanted that says how strongly the collector current responds to the things that drift. There are three such numbers, one for each drift, and all three are partial derivatives of \(I_C\).
Here \(I_{CO}\) is written for \(I_{CBO}\), following the usual convention. The total drift is \(\Delta I_C = S(I_{CO})\Delta I_{CO} + S(V_{BE})\Delta V_{BE} + S(\beta)\Delta\beta\). Unqualified, "the stability factor" means the first of the three.
To derive it in general, start from the exact common-emitter relation of Chapter 16,
and differentiate with respect to \(I_{CO}\), holding \(\beta\) and \(V_{BE}\) constant. The base current is not constant — that is the whole point — because the bias network makes \(I_B\) depend on \(I_C\):
The master formula. Everything about the bias network enters through the single quantity \(\partial I_B/\partial I_C\), which is a property of the resistors alone.
Read that expression before using it. If the network fixes the base current, \(\partial I_B/\partial I_C = 0\) and \(S = 1+\beta\) — the largest value the formula can give, and the fixed-bias answer. If instead the network makes \(I_B\) fall when \(I_C\) rises, then \(\partial I_B/\partial I_C\) is negative, the denominator exceeds one, and \(S\) is reduced. That negative derivative is exactly what negative feedback means in this context, and every improvement in the rest of the chapter comes from arranging it.
Applying the formula to each circuit is then a matter of writing one loop equation. For emitter bias, the base loop is \(V_{CC} = I_BR_B + V_{BE} + (I_B+I_C)R_E\), which rearranges to
and substituting into the master formula and tidying gives the standard result
Check the limits: \(R_B/R_E \to \infty\) recovers \(1+\beta\), the fixed-bias case with no emitter resistor to help; \(R_B/R_E \to 0\) gives \(S \to 1\), the ideal. The same expression serves the voltage divider with \(R_B\) replaced by the Thévenin resistance \(R_{th}\).
For collector-feedback bias the base resistor returns to the collector rather than to the supply, so the base loop is \(V_{CC} = (I_C+I_B)R_C + I_BR_B + V_{BE}\), giving \(\partial I_B/\partial I_C = -R_C/(R_B+R_C)\) and
The other two sensitivities follow from the same loop equations. Differentiating the emitter-bias relation with respect to \(V_{BE}\) at constant \(I_{CO}\) and \(\beta\) gives
Negative, because \(V_{BE}\) falling with temperature drives \(I_C\) up. Note that a large \(R_E\) reduces its magnitude — but so does a large \(R_B\), which is why the comparison in Section 6 does not favour the divider quite as decisively on this count as on the others.
4 Emitter Bias and Collector-Feedback Bias
The two intermediate circuits both introduce feedback, and both are instructive precisely because neither is very good.
Emitter bias adds a resistor between emitter and ground. The feedback mechanism is easy to see: a rise in \(I_C\) raises \(I_ER_E\), which raises the emitter voltage, which reduces \(V_{BE}\) since the base is held by \(R_B\), which reduces \(I_B\) and hence \(I_C\). Analysis begins with the base loop:
The term \((1+\beta)R_E\) is the emitter resistor reflected into the base circuit: seen from the base, a resistor in the emitter looks \((1+\beta)\) times larger, because the emitter carries \((1+\beta)\) times the base current. This reflection rule is used constantly in Chapter 19.
Emitter bias. Take \(R_E = 1\) kΩ. For \(I_B = 20\ \mu\)A at \(\beta = 100\) the base loop needs \(R_B + 101(1000) = 11.3/20\ \mu\text{A} = 565\ \text{k}\Omega\), so \(R_B = 464\) kΩ; use 470 kΩ. Then \(R_C\) follows from \(V_{CE} = V_{CC} - I_CR_C - I_ER_E = 6\) V, giving \(R_C = (12-6-2)/2\ \text{mA} = 2.0\ \text{k}\Omega\). Recomputing exactly:
| \(\beta\) | \(I_B\) | \(I_C\) | \(V_{CE}\) |
|---|---|---|---|
| 50 | 21.689 µA | 1.084 mA | 8.725 V |
| 100 | 19.790 µA | 1.979 mA | 6.043 V |
| 150 | 18.196 µA | 2.729 mA | 3.793 V |
The spread has fallen from 100 per cent to 83 per cent — an improvement, and a disappointing one. The stability factor confirms it: \(R_B/R_E = 470\), so \(S = 101(471)/(101+470) = 83.3\) against 101 for fixed bias. The trouble is that \(R_B\) had to be made large in order to set a 20 µA base current from a 12 V rail, and the feedback is only as strong as the ratio \(R_E/R_B\) allows. Reducing \(R_B\) to 47 kΩ would give \(S = 32.8\), but then \(I_B\) would be ten times too large. The circuit cannot set the current and stabilise it with the same resistor.
Collector feedback. Returning \(R_B\) to the collector instead of the supply gives feedback of a different kind: if \(I_C\) rises, the collector voltage falls, and since \(R_B\) is fed from the collector, \(I_B\) falls with it. The base loop gives
For \(R_C = 3\) kΩ and \(I_B = 20\ \mu\)A at \(\beta = 100\), \(R_B = 565 - 101(3) = 262\) kΩ; use 270 kΩ. The results are \(I_C = 1.336\) mA at \(\beta = 50\), 1.972 mA at 100 and 2.344 mA at 150 — a spread of 51 per cent, and \(S = 101/(1 + 100 \times 3/273) = 101/2.0989 = 48.1\).
Why collector feedback beats emitter bias here. The feedback resistor \(R_C\) sits in the denominator multiplied by \((1+\beta)\) and is not required to be small, whereas the emitter-bias circuit had to keep \(R_E\) small to avoid wasting supply voltage across it. Collector feedback also has a self-protecting property that recommends it for single-transistor stages: the transistor can never saturate, because as \(V_{CE}\) falls the base drive falls with it. The price is that the same feedback path attenuates the signal, reducing the a.c. voltage gain and the input impedance.
5 Voltage-Divider Bias
The circuit that solves the problem does so by separating the two jobs. A resistive divider sets the base voltage, and an emitter resistor converts that voltage into a current. Neither operation involves the transistor, so to a first approximation neither does the answer.
Replace the divider by its Thévenin equivalent, a source \(V_{th}\) behind a resistance \(R_{th}\):
The base loop is then identical to the emitter-bias loop with \(V_{CC}\) replaced by \(V_{th}\) and \(R_B\) by \(R_{th}\):
The algebra is the same but the numbers are entirely different, because \(V_{th}\) can be made small — a couple of volts rather than twelve — and that allows \(R_{th}\) to be small too while still delivering the required base current.
If \(R_{th} \ll (1+\beta)R_E\), the base current term disappears from the emitter loop altogether and the circuit reduces to a result with no transistor parameter in it:
The approximate analysis. Its fractional error is exactly \(R_{th}/[(1+\beta)R_E]\), so the design rule is to keep \(R_{th} \le 0.1(1+\beta_{\min})R_E\), which bounds the error at ten per cent.
Design for \(I_C = 2\) mA and \(V_{CE} = 6\) V from \(V_{CC} = 12\) V. Choose \(R_E = 1\) kΩ, giving \(V_E = 2\) V and requiring \(V_B \approx 2.7\) V. Then \(R_C = (12 - 6 - 2)/2\ \text{mA} = 2.0\ \text{k}\Omega\).
Choosing the divider. Standard practice is to let the divider carry roughly ten times the base current, so the base loading does not shift \(V_B\). With \(I_B \approx 20\ \mu\)A that means about 0.2 to 0.4 mA. Taking \(R_1 = 22\) kΩ and \(R_2 = 6.8\) kΩ gives a divider current of \(12/28.8\ \text{k}\Omega = 0.417\) mA, twenty-one times \(I_B\), and
Approximate analysis. \(I_E \approx (2.8333-0.7)/1000 = 2.133\) mA, \(V_E = 2.133\) V, \(V_C = 12 - 2.133\times2 = 7.733\) V, \(V_{CE} = 5.600\) V.
Exact analysis at \(\beta = 100\).
giving \(I_C = 2.009\) mA, \(I_E = 2.029\) mA and \(V_{CE} = 12 - 2.009(2) - 2.029(1) = 5.953\) V. The approximation overestimates \(I_E\) by 5.14 per cent, which is precisely \(R_{th}/[(1+\beta)R_E] = 5194/101\,000\), as predicted. The stiffness test is satisfied: \(R_{th} = 5.19\ \text{k}\Omega\) against the limit \(0.1(101)(1000) = 10.1\ \text{k}\Omega\).
The \(\beta\) test.
| \(\beta\) | \(I_B\) | \(I_C\) | \(V_{CE}\) | Change in \(I_C\) |
|---|---|---|---|---|
| 50 | 37.963 µA | 1.898 mA | 6.268 V | \(-5.5\) % |
| 100 | 20.089 µA | 2.009 mA | 5.953 V | — |
| 150 | 13.658 µA | 2.049 mA | 5.840 V | \(+2.0\) % |
A three-to-one change in \(\beta\) has moved the collector current by 7.5 per cent and \(V_{CE}\) by less than half a volt. Notice how it works: the base current changes by a factor of 2.8, almost exactly compensating the change in \(\beta\), because the divider supplies whatever base current the transistor asks for at a nearly fixed base voltage. Compare the fixed-bias table, in which \(I_B\) could not change at all and \(I_C\) therefore had to.
Stability factor. \(R_{th}/R_E = 5.194\), so
seventeen times better than fixed bias.
6 Comparing the Four Circuits
All four designs of Figure 18.1 were made to sit at the same nominal operating point, \(I_C \approx 2\) mA and \(V_{CE} \approx 6\) V at \(\beta = 100\), so the comparison is a fair one.
| Circuit | \(S(I_{CO})\) | \(I_C\) at \(\beta = 50/100/150\) (mA) | Spread | \(\Delta I_C\) from leakage at 100 °C |
|---|---|---|---|---|
| Fixed bias | 101.0 | 1.009 / 2.018 / 3.027 | 100 % | 0.183 mA (9.1 %) |
| Emitter bias | 83.3 | 1.084 / 1.979 / 2.729 | 83 % | 0.151 mA (7.6 %) |
| Collector feedback | 48.1 | 1.336 / 1.972 / 2.344 | 51 % | 0.087 mA (4.4 %) |
| Voltage divider | 5.89 | 1.898 / 2.009 / 2.049 | 7.5 % | 0.011 mA (0.5 %) |
The leakage column takes \(I_{CBO} = 10\) nA at 25 °C, which becomes 1.810 µA at 100 °C after 7.5 doublings, and multiplies by \(S\). The two columns tell the same story, which is not a coincidence: \(S(I_{CO})\) and the sensitivity to \(\beta\) both measure how much freedom the base current has, and a circuit that lets \(I_B\) adjust itself is insensitive to everything at once.
One honest qualification belongs here, because textbooks often omit it. The divider is not better on every count. Its sensitivity to \(V_{BE}\) is actually worse in absolute terms: \(S(V_{BE}) = -\beta/[R_{th}+(1+\beta)R_E] = -100/106\,194 = -0.942\) mA/V for the divider, against \(-100/560\,000 = -0.179\) mA/V for fixed bias. Over a 75 °C rise, \(V_{BE}\) falls by 0.15 V and the divider's collector current therefore rises by 0.141 mA against the fixed-bias circuit's 0.027 mA. Adding both drifts at 100 °C gives a total shift of 7.6 per cent for the divider and 10.4 per cent for fixed bias — a real but modest advantage. The divider's decisive win is over \(\beta\) spread, which is by far the largest of the three effects and which it reduces from 100 per cent to 7.5 per cent.
The remedy for the \(V_{BE}\) drift is to raise \(V_{th} - V_{BE}\), since the fractional drift is \(\Delta V_{BE}/(V_{th}-V_{BE})\). Here that quantity is 2.133 V, giving \(0.15/2.133 = 7.0\) per cent; doubling the emitter voltage to about 4.3 V and doubling \(R_E\) to keep the same current would halve it to 3.5 per cent. The cost is 2 V of supply headroom that can no longer be used for output swing, and the usual compromise is to put a tenth of \(V_{CC}\) across \(R_E\) in a low-voltage stage and rather more where the supply can spare it.
7 Thermal Runaway and the Stability Criterion
Everything so far has treated temperature as an external variable. In a power stage it is not: the transistor's own dissipation heats its own junction, and if the resulting rise in current raises the dissipation faster than the heat sink can carry the heat away, the process runs away and the device is destroyed in seconds.
Set the condition out properly. The junction temperature is
where \(\theta_{JA}\) is the total thermal resistance from junction to ambient in °C/W. Now suppose a small disturbance raises \(T_J\) by \(dT_J\). The dissipation changes by \((\partial P_D/\partial T_J)\,dT_J\), and that change raises the junction temperature by a further \(\theta_{JA}(\partial P_D/\partial T_J)\,dT_J\). The loop gain of this process is \(\theta_{JA}\,\partial P_D/\partial T_J\), and stability requires it to be less than unity:
The left-hand side is what the circuit does; the right-hand side is what the heat sink allows. Meeting the criterion is a matter of reducing \(\partial P_D/\partial T_J\) by biasing well, or of reducing \(\theta_{JA}\) by heat-sinking well, and a good design does both.
A power transistor in a class A stage runs at \(V_{CE} = 10\) V and \(I_C = 0.5\) A, dissipating 5 W, on a heat sink giving \(\theta_{JA} = 4\) °C/W with an ambient of 40 °C. Its bias is a voltage divider with an emitter resistor \(R_E\). What is the smallest safe \(R_E\)?
Junction temperature at the design point. \(T_J = 40 + 4(5) = 60\) °C — comfortable, but that is not the question.
How the current drifts. With a stiff divider, \(I_C \approx (V_{th}-V_{BE})/R_E\), so the only temperature-dependent term is \(V_{BE}\), which falls at 2 mV/°C:
How the dissipation drifts. Taking \(V_{CE}\) as roughly fixed by the supply and the load, \(\partial P_D/\partial T_J = V_{CE}\,\partial I_C/\partial T_J = 10(2\times10^{-3})/R_E = 0.02/R_E\) W/°C.
Apply the criterion. Stability needs \(4(0.02/R_E) < 1\), that is \(R_E > 0.08\ \Omega\). Tabulating:
| \(R_E\) | \(\partial I_C/\partial T_J\) | \(\partial P_D/\partial T_J\) | \(\theta_{JA}\,\partial P_D/\partial T_J\) | Verdict |
|---|---|---|---|---|
| 0.05 Ω | 40 mA/°C | 0.400 W/°C | 1.60 | runaway |
| 0.10 Ω | 20 mA/°C | 0.200 W/°C | 0.80 | marginally stable |
| 0.50 Ω | 4 mA/°C | 0.040 W/°C | 0.16 | safe |
| 1.00 Ω | 2 mA/°C | 0.020 W/°C | 0.08 | safe |
Choose \(R_E = 0.5\ \Omega\), which costs \(I_C^2R_E = 0.125\) W and 0.25 V of headroom, and gives a loop gain of 0.16 — a factor of six of margin, which is what one wants when the sink may be dusty and the ambient may be higher than specified. This is why power output stages always have a fraction of an ohm in each emitter, a detail Chapter 20 returns to when it biases a complementary pair.
Three further points follow from the criterion. First, it is easier to satisfy at low \(V_{CE}\), because \(\partial P_D/\partial T_J\) is proportional to \(V_{CE}\); a switching stage that spends its time saturated or cut off is thermally almost unconditionally stable, which is one of the reasons switching amplifiers exist. Second, it is hardest to satisfy at the mid-point of the load line, which is exactly where a class A stage sits, and the worst case for a class A stage is the zero-signal condition. Third, the criterion assumes the current is set by a bias network; in a device with no emitter degeneration at all, \(\partial I_C/\partial T_J\) is set by the exponential \(I_C\)–\(V_{BE}\) law and is enormous, which is why two power transistors must never simply be connected in parallel — the hotter one takes all the current. Small emitter resistors, again, are the standard cure.
8 Summary and Key Results
| Circuit | Base-loop equation | \(S(I_{CO})\) | Result |
|---|---|---|---|
| Fixed bias | \(I_B = (V_{CC}-V_{BE})/R_B\) | \(1+\beta = 101\) | \(R_B = 560\) kΩ, \(R_C = 3\) kΩ; \(I_C\) spread 1.01–3.03 mA |
| Emitter bias | \(I_B = (V_{CC}-V_{BE})/[R_B+(1+\beta)R_E]\) | \(\dfrac{(1+\beta)(1+R_B/R_E)}{1+\beta+R_B/R_E} = 83.3\) | \(R_B = 470\) kΩ, \(R_E = 1\) kΩ; spread 1.08–2.73 mA |
| Collector feedback | \(I_B = (V_{CC}-V_{BE})/[R_B+(1+\beta)R_C]\) | \(\dfrac{1+\beta}{1+\beta R_C/(R_C+R_B)} = 48.1\) | \(R_B = 270\) kΩ, \(R_C = 3\) kΩ; spread 1.34–2.34 mA; cannot saturate |
| Voltage divider | \(I_B = (V_{th}-V_{BE})/[R_{th}+(1+\beta)R_E]\) | \(\dfrac{(1+\beta)(1+R_{th}/R_E)}{1+\beta+R_{th}/R_E} = 5.89\) | \(R_1 = 22\) kΩ, \(R_2 = 6.8\) kΩ; spread 1.90–2.05 mA |
| Thévenin equivalent | \(V_{th} = V_{CC}R_2/(R_1+R_2)\), \(R_{th} = R_1\|R_2\) | — | 2.8333 V behind 5.194 kΩ |
| Approximate analysis | \(I_E \approx (V_{th}-V_{BE})/R_E\) | — | 2.133 mA against 2.029 mA exact; error \(= R_{th}/[(1+\beta)R_E] = 5.14\) % |
| Stiff-divider rule | \(R_{th} \le 0.1(1+\beta)R_E\) | — | 5.19 kΩ against a 10.1 kΩ limit — satisfied |
| \(V_{BE}\) sensitivity | \(S(V_{BE}) = -\beta/[R_B+(1+\beta)R_E]\) | — | \(-0.942\) mA/V for the divider; \(+0.141\) mA for \(\Delta T = 75\) °C |
| Leakage drift | \(\Delta I_C = S(I_{CO})\,\Delta I_{CBO}\) | — | At 100 °C: 0.183 mA (fixed) against 0.011 mA (divider) |
| Thermal runaway | \(\theta_{JA}\,\partial P_D/\partial T_J < 1\) | — | 5 W at \(\theta_{JA} = 4\) °C/W needs \(R_E > 0.08\ \Omega\); use 0.5 Ω |
9 Common Mistakes
The result \(I_E \approx (V_{th}-V_{BE})/R_E\) is only as good as the assumption \(R_{th} \ll (1+\beta)R_E\), and its fractional error is exactly \(R_{th}/[(1+\beta)R_E]\). For the design in Worked Example 18.3 that is 5.1 per cent, which is acceptable. Make the divider ten times higher in resistance to save supply current — \(R_1 = 220\) kΩ, \(R_2 = 68\) kΩ — and \(R_{th}\) becomes 51.9 kΩ, the error becomes 51 per cent, and the circuit has quietly turned back into something close to fixed bias. Always compute \(R_{th}\) and compare it with \(0.1(1+\beta_{\min})R_E\), using the smallest \(\beta\) in the data-sheet range, before trusting the short calculation.
\(S(I_{CO})\) measures the response to leakage only. A divider-biased stage has \(S = 5.89\) against 101 for fixed bias, yet its sensitivity to \(V_{BE}\) is five times worse in absolute terms, because \(I_E\) is set by the difference \(V_{th}-V_{BE}\) and that difference is only about 2 V. Over a 75 °C rise the divider's collector current moves by 0.141 mA from \(V_{BE}\) drift and only 0.011 mA from leakage, so the drift it was designed to suppress is no longer the dominant one. The total is still smaller than fixed bias, and the \(\beta\)-spread advantage is decisive, but a designer who quotes \(S\) alone has answered only a third of the question.
Two devices sharing a load look symmetric on paper, and they are not: their \(V_{BE}\) values differ by tens of millivolts at the same current, and the exponential law turns 20 mV into a current ratio of \(e^{20/26} = 2.2\). The device carrying more current gets hotter, its \(V_{BE}\) falls another 2 mV per degree, and it takes still more of the current until it fails. The cure is a small resistor in each emitter — a fraction of an ohm, sized so that the \(I R\) drop at the working current comfortably exceeds the \(V_{BE}\) mismatch — which forces sharing and simultaneously satisfies the thermal-runaway criterion for each device. The same reasoning explains why a power stage without emitter degeneration will run away even on a generous heat sink.
10 Chapter Review
1. A fixed-bias stage has \(V_{CC} = 15\) V, \(R_B = 470\) kΩ and \(R_C = 3.9\) kΩ. Find the Q-point for \(\beta = 80\) and for \(\beta = 200\), and state \(S(I_{CO})\) in each case.
The base current is fixed by \(R_B\) alone: \(I_B = (15-0.7)/470\,000 = 14.3/470\,000 = 30.43\ \mu\text{A}\). For \(\beta = 80\), \(I_C = 80 \times 30.43\ \mu\text{A} = 2.434\) mA and \(V_{CE} = 15 - (2.434\times10^{-3})(3900) = 15 - 9.494 = 5.506\) V — a workable Q-point. For \(\beta = 200\), \(I_C = 200 \times 30.43\ \mu\text{A} = 6.085\) mA, which would need \(23.7\) V across the collector resistor. The supply cannot provide it, so the transistor saturates instead: \(V_{CE} = 0.2\) V and \(I_C = (15-0.2)/3900 = 3.795\) mA. The stage has stopped being an amplifier altogether, and the forced beta is \(3.795/0.03043 = 125\), well below the device's 200. The stability factors are \(S = 1+\beta = 81\) and \(201\) respectively; the higher-gain device is both further from its design point and more sensitive to leakage. To make the circuit work for both samples one would need to design for the geometric mean of the \(\beta\) range and accept a much reduced swing, which is precisely the compromise that voltage-divider bias makes unnecessary.
2. Design a voltage-divider stage for \(I_C = 1\) mA and \(V_{CE} = 5\) V from \(V_{CC} = 10\) V, with \(V_E = 1\) V. Verify the stiffness rule and compute \(S(I_{CO})\) for \(\beta = 100\).
Since \(V_E = 1\) V and \(I_E \approx I_C = 1\) mA, \(R_E = 1\ \text{V}/1\ \text{mA} = 1\ \text{k}\Omega\). The collector resistor follows from \(V_{CC} = I_CR_C + V_{CE} + V_E\): \(R_C = (10-5-1)/1\ \text{mA} = 4\ \text{k}\Omega\), so use 3.9 kΩ. The base must sit at \(V_B = V_E + V_{BE} = 1.7\) V. Choosing a divider current of about ten times \(I_B = 10\ \mu\text{A}\), say 0.15 mA, gives \(R_2 = 1.7/0.15\ \text{mA} = 11.3\ \text{k}\Omega\) and \(R_1 = 8.3/0.15\ \text{mA} = 55.3\ \text{k}\Omega\); the nearest preferred values are \(R_2 = 12\ \text{k}\Omega\) and \(R_1 = 56\ \text{k}\Omega\). Then \(V_{th} = 10(12/68) = 1.765\) V and \(R_{th} = (56 \times 12)/68 = 9.882\ \text{k}\Omega\). Exactly, \(I_B = (1.765-0.7)/(9882 + 101\,000) = 1.065/110\,882 = 9.602\ \mu\text{A}\), so \(I_C = 0.960\) mA, \(I_E = 0.970\) mA and \(V_{CE} = 10 - 0.960(3.9) - 0.970(1) = 10 - 3.744 - 0.970 = 5.29\) V — close enough to target. The stiffness rule asks whether \(R_{th} \le 0.1(101)(1000) = 10.1\ \text{k}\Omega\); at 9.88 kΩ it is satisfied, but only just, so the approximate analysis would be about 9.8 per cent out. The stability factor is \(S = 101(1+9.882)/(101+9.882) = 1099.1/110.88 = 9.91\).
3. Derive \(S(I_{CO})\) for collector-feedback bias from the master formula, and evaluate it for \(R_B = 100\) kΩ, \(R_C = 4.7\) kΩ, \(\beta = 150\). Compare with fixed bias using the same \(\beta\).
The base loop is \(V_{CC} = (I_C+I_B)R_C + I_BR_B + V_{BE}\). Solving for \(I_B\) gives \(I_B = (V_{CC}-V_{BE}-I_CR_C)/(R_B+R_C)\), so \(\partial I_B/\partial I_C = -R_C/(R_B+R_C)\). Substituting into \(S = (1+\beta)/[1-\beta\,\partial I_B/\partial I_C]\) gives \(S = (1+\beta)/[1+\beta R_C/(R_B+R_C)]\). With the numbers, \(R_C/(R_B+R_C) = 4700/104\,700 = 0.044891\), so the denominator is \(1 + 150(0.044891) = 1 + 6.7337 = 7.7337\) and \(S = 151/7.7337 = 19.53\). Fixed bias with the same transistor would give \(S = 1+\beta = 151\), so collector feedback is 7.7 times better here — a much larger improvement than in Worked Example 18.2, where \(R_B\) was 270 kΩ against a 3 kΩ collector resistor. The reason is visible in the formula: the improvement factor is \(1 + \beta R_C/(R_B+R_C)\), which grows as \(R_C\) is made larger relative to \(R_B\). The design lever is therefore to use as large a collector resistor as the required current and swing permit. The penalty is unchanged: the same feedback that stabilises the bias also reduces the a.c. gain and lowers the input impedance to roughly \(R_B/(1+|A_v|)\) by the Miller effect of Chapter 25.
4. A silicon transistor is biased by a divider with \(V_{th} = 3.0\) V, \(R_{th} = 6\) kΩ, \(R_E = 1.2\) kΩ, \(\beta = 120\), and has \(I_{CBO} = 20\) nA at 25 °C. Find the total shift in \(I_C\) when the temperature rises to 95 °C.
First the nominal point: \(I_B = (3.0-0.7)/(6000 + 121 \times 1200) = 2.3/151\,200 = 15.212\ \mu\text{A}\), so \(I_C = 120 \times 15.212\ \mu\text{A} = 1.825\) mA. Now the three contributions to a 70 °C rise. Leakage: \(S(I_{CO}) = 121(1+5)/(121+5) = 726/126 = 5.762\), and \(I_{CBO}\) grows by \(2^{7} = 128\) to 2.560 µA, an increase of 2.540 µA, so \(\Delta I_C = 5.762 \times 2.540\ \mu\text{A} = 14.6\ \mu\text{A}\). Base-emitter voltage: \(\Delta V_{BE} = -2\ \text{mV/}^\circ\text{C} \times 70 = -0.140\) V, and \(S(V_{BE}) = -120/151\,200 = -0.7937\) mA/V, so \(\Delta I_C = (-0.7937)(-0.140) = +0.1111\) mA. Current gain: taking the usual 0.5 per cent per degree, \(\beta\) rises by 35 per cent to about 162; recomputing exactly gives \(I_B = 2.3/(6000+163\times1200) = 11.41\ \mu\text{A}\) and \(I_C = 1.848\) mA, an increase of 0.023 mA. The total is \(0.0146 + 0.111 + 0.023 = 0.149\) mA, or 8.1 per cent of the 1.825 mA design value. Notice the ranking: the \(V_{BE}\) drift contributes 75 per cent of the total, \(\beta\) 15 per cent and leakage 10 per cent. In a well-stabilised silicon circuit the classical stability factor is no longer the dominant term, which is exactly what a good bias design is meant to achieve.
5. A class A power stage dissipates 8 W with \(V_{CE} = 12\) V. The device has \(\theta_{JC} = 1.2\) °C/W, the insulating washer and grease add \(\theta_{CS} = 0.6\) °C/W, and the heat sink is 2.0 °C/W. The ambient is 45 °C. Find \(T_J\), and find the smallest emitter resistor that satisfies the runaway criterion.
The three thermal resistances are in series, so \(\theta_{JA} = 1.2+0.6+2.0 = 3.8\) °C/W and \(T_J = T_A + \theta_{JA}P_D = 45 + 3.8(8) = 45 + 30.4 = 75.4\) °C. Intermediate temperatures follow from the same chain: the sink runs at \(45 + 8(2.0) = 61.0\) °C and the case at \(45 + 8(2.6) = 65.8\) °C. If the device is rated at \(T_{J(max)} = 150\) °C there is 74.6 °C of margin, which is ample. For the runaway criterion, the current drift is \(\partial I_C/\partial T_J = 2\ \text{mV}/R_E\) per degree and hence \(\partial P_D/\partial T_J = V_{CE}(2\times10^{-3})/R_E = 0.024/R_E\) W/°C. Stability requires \(\theta_{JA}\,\partial P_D/\partial T_J < 1\), that is \(3.8(0.024)/R_E < 1\), giving \(R_E > 0.0912\ \Omega\). That is the absolute boundary, at which the loop gain is exactly one and any disturbance grows without limit; a practical design takes a factor of five or more of margin, so \(R_E = 0.47\ \Omega\) would be chosen, giving a loop gain of \(3.8(0.024)/0.47 = 0.194\). At the working current of \(8\ \text{W}/12\ \text{V} = 0.667\) A that resistor drops 0.31 V and dissipates 0.21 W, which is a small price. Note that the criterion tightens if the heat sink degrades: at \(\theta_{SA} = 6\) °C/W instead of 2, \(\theta_{JA}\) becomes 7.8 and the minimum \(R_E\) rises to 0.187 Ω, so a design with only a factor of two of margin would fail in a blocked enclosure.