Power Electronics: A Complete Course

Prof. Mithun Mondal · Department of Electrical & Electronics Engineering, BITS Pilani – Hyderabad Campus · Revision Notes for University Examinations & GATE

Power electronics is the art of shaping electrical energy using solid-state switches. Every converter discussed here is built around the same insight: an ideal switch in the ON state has zero voltage across it; in the OFF state it carries zero current. Either way, the instantaneous power dissipation \( P = vi \approx 0 \). Losses arise only during the brief transitions between states. Understanding this single principle – and the three canonical equations of volt-second balance, charge balance, and energy conservation – is sufficient to derive the behaviour of any converter topology.

Key Idea: Every converter = switches + inductors + capacitors, driven by a control law. Understand the pattern once — it recurs everywhere.

1. Introduction and Power Semiconductor Devices

What is Power Electronics?

Power electronics is the conversion, control, and conditioning of electric power using solid-state switches driven by low-power control signals. A power converter sits between an electrical source and an electrical load; a control and sensing subsystem closes the loop around the converter to regulate output.

Block diagram showing an electrical source feeding into a power converter with a feedback control and sensing block, delivering conditioned power to the electrical load. — Generic power-electronics system: the converter processes energy from the source and delivers regulated power to the load, while the control block continuously monitors both input and output to adjust the switching pattern.

The four fundamental converter classes are:

AC → DC: Rectifiers — used in SMPS, battery chargers, HVDC.
DC → DC: Choppers / Switched-mode converters — used in VRMs, MPPT stages, LED drivers.
DC → AC: Inverters — used in motor drives, UPS, solar grid-tie.
AC → AC: Cycloconverters / AC voltage controllers — used in soft-starters, heating control, cement-mill drives.

Key Idea: An ideal switch has zero ON-state voltage drop, zero OFF-state leakage, and zero switching time. Real devices approach this ideal. Losses come from the finite transition times and non-zero on-state drops.

Why Switch? The Efficiency Argument

Consider regulating a 12 V supply down to 5 V at 1 A load. A linear (series-pass) regulator must dissipate \( (V_s - V_o) I_o = 7 \) W as heat, giving an efficiency of only \( 5/12 \approx 42\% \). A switching regulator achieves the same conversion with losses well below 0.5 W, yielding efficiencies above 90 %. The gain comes entirely from the switching principle: the switch is never simultaneously stressed by both high voltage and high current.

\[ P_{\text{cond}} = V_{\text{on}} I_{\text{avg}}, \qquad P_{\text{sw}} = \tfrac{1}{2} V_s I_o (t_{\text{on}} + t_{\text{off}}) f_s \]

GATE Tip: High efficiency pushes every design towards higher switching frequency \(f_s\) (smaller magnetics, faster transient response) — until switching losses catch up. Modern wide-bandgap devices (SiC/GaN) push \(f_s\) higher without the loss penalty.

Classification of Power Semiconductor Devices

Power semiconductor devices are classified by the degree of external gate (control) authority over both turn-on and turn-off:

Uncontrolled: Power Diode — conducts whenever forward-biased; no gate.
Semi-controlled: SCR / Thyristor — gate triggers turn-on, but turn-off requires external commutation.
Fully controlled: BJT, MOSFET, IGBT, GTO, IGCT — gate controls both turn-on and turn-off.

GATE Tip: Remember control capability: Diode — none; SCR — turn-on only (needs commutation for turn-off); BJT/MOSFET/IGBT/GTO — full turn-on and turn-off via gate signal.

Device Comparison

Device	Control	Voltage	Current	Max Frequency	Drive Type	On-state Drop
Diode	None	Up to 10 kV	Up to 5 kA	Low	—	Low
SCR	Latching (gate ON)	Up to 6 kV	Up to 5 kA	< 1 kHz	Pulse current	Low
GTO	Gate ON/OFF	Up to 6 kV	Up to 4 kA	< 2 kHz	Large current	Medium
BJT	Current controlled	Up to 1 kV	Up to 500 A	5 kHz	Current	Low
MOSFET	Voltage controlled	Up to 500 V	Up to 100 A	1 MHz+	Voltage	\(\propto V\)
IGBT	Voltage controlled	Up to 6.5 kV	Up to 2 kA	50 kHz	Voltage	Medium
SiC MOSFET	Voltage controlled	Up to 15 kV	100 A	100 kHz+	Voltage	Low
GaN HEMT	Voltage controlled	Up to 900 V	100 A	MHz range	Voltage	Very low

Key Idea: MOSFET dominates low-voltage, high-frequency applications (SMPS). IGBT is the workhorse for medium-to-high voltage, medium-frequency applications (EV drives, industrial converters). SCR/GTO cover very high power at low frequency (HVDC, large traction systems).

A useful heuristic for device selection: \( V < 200 \) V and \( f > 100 \) kHz → MOSFET; \( V > 600 \) V and \( f < 20 \) kHz → IGBT; ultra-high power → GTO/IGCT/thyristor.

Power Diode: V–I Characteristics and Reverse Recovery

The power diode has three regions of operation: forward conduction (above the knee voltage \( V_\gamma \approx 0.7 \) V for silicon), reverse blocking (small leakage current), and reverse breakdown at \( V_{BR} \). The most important dynamic parameter is the reverse-recovery charge \( Q_{RR} \), which represents stored minority carriers that must be swept out after the diode switches from conducting to blocking.

Diode reverse-recovery current waveform showing forward current, reverse peak current I_RR, recovery intervals t_a and t_b, and total recovery time t_rr. — Reverse-recovery transient of a power diode. The current reverses after forward conduction ceases, reaches a peak \( I_{RR} \), then decays to zero after time \( t_{rr} = t_a + t_b \). The softness factor \( S = t_b / t_a \) characterises how abruptly the current snaps off.

\[ Q_{RR} = \tfrac{1}{2} I_{RR}\, t_{rr}, \qquad t_{rr} = t_a + t_b, \qquad S = \frac{t_b}{t_a} \]

GATE Tip: Reverse recovery causes switching losses and EMI. Soft recovery (\( S > 1 \)) is preferred; abrupt recovery (\( S < 1 \)) causes high \( di/dt \) ringing. SiC Schottky diodes have essentially zero \( Q_{RR} \) (majority-carrier device).

Diode Types and Selection

Type	\(V_F\)	\(t_{rr}\)	Max \(V_R\)	Application
General-purpose (Si)	0.7–1.5 V	25 µs	5 kV	Line-frequency rectifiers
Fast-recovery (FRD)	0.8–1.5 V	0.1–5 µs	3 kV	SMPS, choppers, inverters
Schottky (Si)	0.3–0.5 V	< 10 ns	100 V	Low-voltage SMPS output stage
SiC Schottky	~1.5 V	Zero (majority carrier)	1.7 kV	PFC, EV chargers
GaN (lateral)	—	Negligible	650 V	High-frequency converters

Thyristor (SCR): Structure, Operation and Characteristics

The silicon-controlled rectifier is a four-layer PNPN device with three terminals: Anode (A), Cathode (K) and Gate (G). It operates through positive feedback between two internally coupled BJTs (PNP and NPN). When a gate current pulse drives the NPN transistor into conduction, both transistors reinforce each other until the combined current gains satisfy \( \alpha_1 + \alpha_2 \to 1 \), at which point the device latches ON and the gate loses control.

\[ I_A = \frac{\alpha_2 I_G + I_{CBO1} + I_{CBO2}}{1 - (\alpha_1 + \alpha_2)} \]

Key threshold currents are the latching current \( I_L \) (minimum anode current needed to latch after the gate pulse ends) and the holding current \( I_H \) (minimum anode current to remain ON). Typically, \( I_L \approx 2\text{–}3 \times I_H \).

Methods to turn an SCR ON: gate current pulse (standard); forward breakover voltage \( V_{BO} \) (destructive); excessive \( dv/dt \) (unwanted); light (LASCR). To turn it OFF, the anode current must be reduced below \( I_H \) — this process is called commutation.

GATE Tip: Once the SCR is ON, the gate loses all control. The only way to turn it off is to reduce \( I_A < I_H \). This is why SCR circuits require explicit commutation circuits in DC applications.

SCR Protection: di/dt and dv/dt Limits

Excessive rate of rise of anode current causes localised heating near the gate–cathode junction. A series inductor \( L_s \) limits this:

\[ L_s \ge \frac{V_s}{(di/dt)_{\max}} \]

Excessive \( dv/dt \) across the junction capacitance \( C_j \) generates a displacement current \( i = C_j\, dv/dt \) that can trigger the device falsely. An RC snubber across the SCR suppresses this:

\[ R_s = 2\xi\sqrt{\tfrac{L_s}{C_s}}, \qquad C_s = \frac{V_s^2}{4\xi^2 L_s (dv/dt)_{\max}^2} \]

SCR Commutation Techniques

Natural (line) commutation occurs in AC circuits where the supply voltage naturally reverses polarity, reducing the anode current to zero. It requires no auxiliary circuitry and is used in phase-controlled rectifiers, AC voltage controllers, and cycloconverters.

Forced commutation is required in DC circuits where no natural voltage reversal is available. Six classes (A through F) exist based on the commutation mechanism (resonant pulse, complementary SCR, auxiliary SCR, external source, etc.). The circuit turn-off time \( t_c \) must exceed the device turn-off time \( t_q \); otherwise commutation fails.

\[ t_c \ge t_q \] For a resonant LC commutation circuit: \( t_c = \pi\sqrt{LC} \)

SCR Gate Triggering and UJT Oscillator

A reliable gate signal must have amplitude exceeding \( I_{GT} \) (typically 10–500 mA), pulse width exceeding the latching time, and galvanic isolation from the power circuit. The classical gate driver uses a UJT relaxation oscillator:

\[ T = RC \ln\!\left(\frac{1}{1-\eta}\right), \qquad \eta = \frac{R_{B1}}{R_{B1} + R_{B2}} \quad (\text{intrinsic stand-off ratio, 0.5–0.8}) \]

Modern implementations use dedicated gate-drive ICs such as the IR2110 or HCPL-3120 with built-in desaturation protection. The cosine firing scheme linearises the control characteristic: \( \alpha = \cos^{-1}(V_c / V_m) \), making output \( V_{dc} \propto V_c \).

Series and Parallel Operation of SCRs

When the required voltage or current exceeds a single device rating, SCRs are connected in series (for voltage sharing) or parallel (for current sharing). Unequal leakage currents cause unequal voltage distribution in series strings; a shunt resistor \( R \) across each device provides static balancing. An RC snubber provides dynamic balancing during transitions.

Static balancing resistor: \( R \le \dfrac{n\,V_{BO} - V_s}{(n-1)\,\Delta I_{lk}} \)
String derating factor: \( \text{DF} = 1 - \dfrac{V_s}{n\,V_{BO}} \)

BJT, MOSFET, and IGBT

The three dominant fully-controlled devices differ fundamentally in their conduction and switching mechanisms:

Power BJT: current-controlled (\( I_C = \beta I_B \)). Susceptible to second breakdown; relatively slow; largely obsolete.
Power MOSFET: voltage-controlled (\( I_D \propto (V_{GS} - V_T)^2 \)); majority-carrier device; very fast (no minority-carrier storage); on-resistance \( R_{DS(on)} \) increases with voltage rating, limiting use below ~500 V for Si.
IGBT: MOS-controlled input with BJT-style conductivity modulation in the output — combines the best of both. Low \( V_{CE(sat)} \) even at high voltages; a tail current at turn-off due to minority-carrier recombination limits maximum switching frequency.

GATE Tip: Selection rule of thumb: \( V < 200 \) V, \( f > 100 \) kHz → MOSFET. \( V > 600 \) V, \( f < 20 \) kHz → IGBT. Ultra-high power → GTO/IGCT/thyristor.

Switching Losses

During turn-on and turn-off, both voltage and current are simultaneously non-zero for durations \( t_{\text{on}} \) and \( t_{\text{off}} \). The overlap of these waveforms creates a power dissipation pulse in the switch. For linear ramp approximations:

\[ P_{\text{sw}} = \tfrac{1}{2} V_s I_o (t_{\text{on}} + t_{\text{off}}) f_s, \qquad P_{\text{cond}} = V_{\text{on}} I_o D, \qquad P_{\text{total}} = P_{\text{cond}} + P_{\text{sw}} \]

GATE Tip: Switching loss is proportional to \( f_s \). High-frequency designs use soft switching (ZVS/ZCS) so that \( v = 0 \) or \( i = 0 \) at the switching instant, eliminating overlap losses.

Gate Drive Circuits

A gate driver converts low-power logic signals into high-current pulses needed to charge the gate capacitance rapidly. Key requirements include sufficient peak current \( I_G = Q_G f_s / V_{\text{drive}} \) (typically 1–10 A peak), propagation delay below 100 ns matched between high-side and low-side, and galvanic isolation for high-side switches (via pulse transformer, optocoupler, or digital isolator).

Bootstrap capacitor sizing: \( C_{\text{boot}} \ge Q_G / \Delta V_{\text{boot}} \)

DESAT protection monitors \( V_{CE} \) after turn-on; if it remains high beyond 2–5 µs, a short-circuit is detected and the device is shut down softly. Dead-time (typically 500 ns–2 µs for IGBT, 50–200 ns for MOSFET/SiC/GaN) is inserted between complementary switch signals to prevent shoot-through.

Wide-Bandgap Devices: SiC and GaN

Silicon has reached practical limits imposed by its bandgap (1.12 eV). Wide-bandgap semiconductors offer dramatically higher breakdown fields, enabling thinner drift regions and lower on-resistance for the same voltage rating.

Parameter	Si	SiC (4H)	GaN
Bandgap \(E_g\) (eV)	1.12	3.26	3.39
Breakdown field (MV/cm)	0.3	3.0	3.3
Electron mobility (cm²/V·s)	1400	900	2000 (2DEG)
Thermal conductivity (W/cm·K)	1.5	4.9	1.3
Max junction temperature (°C)	150	200+	150
Commercial voltage rating	≤ 6.5 kV	≤ 15 kV	≤ 900 V

Baliga's Figure of Merit: \( \text{BFOM} = \varepsilon\, \mu\, E_g^3 \), which gives SiC roughly 400× and GaN roughly 900× the performance potential of silicon. In practice: 10× faster switching, ~50% lower losses, and higher permissible junction temperature.

GATE Tip: SiC is replacing IGBTs in EV traction inverters (e.g., Tesla Model 3) and solar string inverters. GaN is replacing Si MOSFETs in laptop/phone chargers and 48 V data-centre DC–DC converters.

Thermal Design and Heat Sinking

The thermal equivalent circuit treats temperature as voltage and power dissipation as current. Junction temperature must remain below the device rating (\( T_{j,\max} = 150 \) °C for Si, 200+ °C for SiC):

\[ T_j - T_a = P_d \cdot (R_{\theta jc} + R_{\theta cs} + R_{\theta sa}) \] \[ P_{d,\max} = \frac{T_{j,\max} - T_a}{R_{\theta ja}} \]

Thermal resistance network chain from junction to case to heatsink to ambient, with power dissipation as the source and temperature nodes at each interface. — Thermal equivalent circuit of a power device and its heatsink assembly. Each thermal resistance (\( R_{\theta jc} \), \( R_{\theta cs} \), \( R_{\theta sa} \)) causes a temperature rise proportional to the dissipated power \( P_d \).

2. AC–DC Converters: Rectifiers

Rectifiers convert AC power to DC. Uncontrolled (diode) rectifiers provide a fixed DC output voltage. Controlled (thyristor) rectifiers provide a variable DC output through firing angle \( \alpha \) and can even operate as inverters when \( \alpha > 90^\circ \) into an active back-EMF load. Higher pulse number reduces ripple.

Performance Parameters

\[ V_{dc} = \frac{1}{T}\int_0^T v_o\, dt, \qquad V_{rms} = \sqrt{\tfrac{1}{T}\int_0^T v_o^2\, dt} \] \[ \text{Form Factor} \; FF = \frac{V_{rms}}{V_{dc}}, \qquad \text{Ripple Factor} \; RF = \sqrt{FF^2 - 1} \] \[ \text{Rectifier efficiency} \; \eta = \frac{P_{dc}}{P_{ac}} = \frac{V_{dc} I_{dc}}{V_{rms} I_{rms}}, \qquad \text{TUF} = \frac{P_{dc}}{V_{s,rms} I_{s,rms}} \]

GATE Tip: For ideal DC, \( FF = 1 \) and \( RF = 0 \). Any deviation from unity form factor means ripple content. Useful identity: \( RF^2 = (V_{rms}/V_{dc})^2 - 1 \).

Single-Phase Half-Wave Rectifier (R-Load)

The diode conducts only during positive half-cycles. This is the simplest rectifier but has poor performance: low DC output, high ripple, and a DC component in the source current that can saturate transformers.

Single-phase half-wave rectifier circuit with one diode and resistive load, alongside the output voltage waveform showing conduction only during positive half-cycles. — Single-phase half-wave rectifier with resistive load. The diode conducts from 0 to \(\pi\) radians per cycle, producing a pulsating output with ripple frequency equal to the supply frequency.

\[ V_{dc} = \frac{V_m}{\pi}, \quad I_{dc} = \frac{V_m}{\pi R}, \quad V_{rms} = \frac{V_m}{2}, \quad I_{rms} = \frac{V_m}{2R} \] \[ FF = \frac{\pi}{2} = 1.57, \quad RF = 1.21, \quad \eta = \tfrac{4}{\pi^2} \approx 40.6\%, \quad \text{TUF} \approx 0.287 \] PIV of diode \( = V_m \)

Caution: Half-wave rectification is used mainly as a teaching example. Its very poor performance metrics (low efficiency, TUF, and extreme ripple) make it impractical for most real applications.

Half-Wave Controlled Rectifier with RL Load

An SCR replaces the diode, firing at angle \( \alpha \). The inductor stores energy, causing conduction to extend beyond \( \pi \) to an extinction angle \( \beta > \pi \). The governing equation during conduction is:

\[ i(\omega t) = \frac{V_m}{Z} \left[\sin(\omega t - \phi) - \sin(\alpha - \phi)\, e^{-(\omega t - \alpha)/\tan\phi}\right] \] \[ Z = \sqrt{R^2 + (\omega L)^2}, \quad \phi = \tan^{-1}\!\left(\tfrac{\omega L}{R}\right), \quad V_{dc} = \frac{V_m}{2\pi}(\cos\alpha - \cos\beta) \]

A freewheeling diode placed across the load clamps \( v_o \ge 0 \), forces \( \beta = \pi \), improves \( V_{dc} \), and reduces input current distortion.

Single-Phase Full-Wave Bridge Rectifier

The Graetz bridge uses four diodes and requires no centre-tap transformer. Both half-cycles of the AC supply are rectified, doubling the ripple frequency to \( 2f \) and dramatically improving performance.

\[ V_{dc} = \frac{2V_m}{\pi} = 0.637\, V_m, \quad V_{rms} = \frac{V_m}{\sqrt{2}} = 0.707\, V_m \] \[ FF = 1.11, \quad RF = 0.48, \quad \eta \approx 81.2\% \] Bridge PIV \( = V_m \); Centre-tap PIV \( = 2V_m \)

Three-Phase Rectifiers

Three-phase rectifiers achieve far higher pulse numbers, dramatically reducing ripple:

3-phase half-wave (3-pulse): \[ V_{dc} = \frac{3\sqrt{3}\, V_m}{2\pi} = 0.827\, V_m, \quad RF = 0.183 \] 3-phase full-wave bridge (6-pulse): \[ V_{dc} = \frac{3\sqrt{3}\, V_m}{\pi} = 1.654\, V_m = 1.35\, V_{LL}, \quad RF = 0.042 \] General \(p\)-pulse rectifier: \[ V_{dc} = \frac{p}{\pi}\, V_m \sin\!\left(\frac{\pi}{p}\right) \]

The ripple frequency of a \( p \)-pulse rectifier is \( p \cdot f \). A 6-pulse rectifier on a 50 Hz supply produces 300 Hz ripple — far easier to filter than 50 Hz ripple. Twelve-pulse rectifiers (two bridges fed through Y–Y and Y–Δ transformers) are used in HVDC applications.

Single-Phase Full-Controlled Bridge (SCR Bridge)

Replacing all four diodes with SCRs fired at angle \( \alpha \) gives a fully controllable DC output. With a highly inductive (continuous current) load:

\[ V_{dc}(\alpha) = \frac{2V_m}{\pi}\cos\alpha \] Source-side performance (quasi-square current wave of amplitude \(I_o\)): \[ I_{s1} = \frac{2\sqrt{2}\, I_o}{\pi}, \quad \text{DPF} = \cos\alpha, \quad \text{PF} = \frac{2\sqrt{2}}{\pi}\cos\alpha \approx 0.9\cos\alpha \]

For \( 0 \le \alpha < 90^\circ \), the converter operates in rectification mode (\( V_{dc} > 0 \)). For \( 90^\circ < \alpha \le 180^\circ \), \( V_{dc} < 0 \) and the converter operates as a line-commutated inverter (requires a back-EMF load such as a DC motor in regenerative braking).

Semi-Controlled Bridge and Discontinuous Conduction

The half-controlled bridge uses 2 SCRs and 2 diodes. Output is always non-negative (no inversion capability), with inherent freewheeling action:

\[ V_{dc} = \frac{V_m}{\pi}(1 + \cos\alpha) \]

Discontinuous conduction mode (DCM) occurs at low inductance or high firing angle, when the current reaches zero within each half-cycle. The extinction angle \( \beta \) must be determined numerically, and \( V_{dc} \) becomes dependent on \( R \), \( L \) and \( \alpha \).

Source Inductance and Overlap Angle

Real AC sources have stray inductance \( L_s \). During commutation, current cannot switch instantaneously between outgoing and incoming devices, producing an overlap angle \( \mu \) during which both devices conduct simultaneously. This reduces the effective DC output and creates voltage notches in the source waveform:

\[ V_{dc} = \frac{2V_m}{\pi}\cos\alpha - \frac{2\omega L_s I_o}{\pi} \] \[ \cos\alpha - \cos(\alpha + \mu) = \frac{2\omega L_s I_o}{V_m} \]

Dual Converter: Four-Quadrant DC Drive

Two fully-controlled bridges connected in anti-parallel across a DC motor load provide four-quadrant operation. The ideal coordination condition is \( \alpha_P + \alpha_N = 180^\circ \), ensuring equal and opposite DC outputs. Two operating modes exist: non-circulating current (only one bridge active at a time) and circulating current (both bridges active with a reactor to limit ripple current between them).

3. DC–DC Converters: Choppers

DC–DC converters produce a regulated or variable DC output from a DC input by switching a power device at duty cycle \( D = T_{\text{on}} / T = T_{\text{on}} f_s \). The volt-second balance principle applied to the inductor (\( \langle v_L \rangle = 0 \) in steady state) yields the conversion ratio in closed form for any topology.

GATE Tip — Canonical gain forms: \( D \) (buck), \( \tfrac{1}{1-D} \) (boost), \( \tfrac{D}{1-D} \) (buck-boost). Every GATE DC–DC numerical reduces to one of these three.

Buck Converter (Step-Down)

The buck converter produces \( V_o < V_s \). Switch ON: the inductor charges from \( V_s - V_o \). Switch OFF: the diode freewheels and the inductor discharges into the load. In CCM:

Buck converter circuit showing switch S, freewheeling diode D, inductor L, output capacitor C, and resistive load R connected from input voltage Vs to output voltage Vo. — Buck (step-down) converter circuit. The switch S and freewheeling diode D alternate conduction to apply a pulsed voltage across inductor L, which averages to the output voltage.

\[ \frac{V_o}{V_s} = D, \qquad \Delta i_L = \frac{V_s D(1-D)}{L f_s}, \qquad \frac{\Delta v_o}{V_o} = \frac{1-D}{8LCf_s^2} \] CCM boundary inductance: \( L_c = \dfrac{(1-D)R}{2f_s} \)

GATE Tip: In CCM, the buck transfer ratio depends only on \(D\), not on load. In DCM, output rises and becomes load-dependent. Always check CCM/DCM boundary first!

Boost Converter (Step-Up)

Switch ON: \( V_s \) drives inductor current up; diode is reverse-biased; capacitor supplies the load. Switch OFF: inductor releases energy through the diode into the load and capacitor. The boost input current is continuous (good for PFC front-ends). As \( D \to 1 \), the ideal gain approaches infinity; parasitic resistance causes a practical maximum near \( D \approx 0.75 \).

\[ \frac{V_o}{V_s} = \frac{1}{1-D}, \qquad \Delta i_L = \frac{V_s D}{L f_s}, \qquad \frac{\Delta v_o}{V_o} = \frac{D}{RCf_s} \]

Buck-Boost, Ćuk, SEPIC, and Zeta Converters

The buck-boost inverts the output polarity with a gain of magnitude \( D/(1-D) \):

Buck-Boost: \( V_o/V_s = -D/(1-D) \) \quad (inverted output)
Ćuk: \( V_o/V_s = -D/(1-D) \) \quad (inverted, but both input and output currents are continuous)
SEPIC: \( V_o/V_s = +D/(1-D) \) \quad (non-inverting)

GATE Tip — Polarity cheat-sheet: Buck (+), Boost (+), Buck-Boost (−), Ćuk (−), SEPIC (+), Zeta (+). All non-isolated fundamental topologies derive from these.

Converter Comparison Table

Converter	\(V_o/V_s\)	Polarity	Input Current	Output Current
Buck	\(D\)	+	Pulsed	Continuous
Boost	\(\frac{1}{1-D}\)	+	Continuous	Pulsed
Buck-Boost	\(-\frac{D}{1-D}\)	−	Pulsed	Pulsed
Ćuk	\(-\frac{D}{1-D}\)	−	Continuous	Continuous
SEPIC	\(\frac{D}{1-D}\)	+	Continuous	Pulsed
Zeta	\(\frac{D}{1-D}\)	+	Pulsed	Continuous

Isolated DC–DC Converters

Isolated topologies incorporate a high-frequency transformer for galvanic isolation:

Flyback: buck-boost derived; \( V_o = (N_2/N_1) \cdot D/(1-D) \cdot V_s \); low cost; below ~150 W.
Forward: buck-derived; needs a reset winding or active clamp; up to ~1 kW.
Push-pull, Half-bridge, Full-bridge: higher power; up to tens of kW.

Chopper Quadrant Classification

Class	Quadrant(s)	\(V_o\)	\(I_o\)	Typical Application
A	Q1	+	+	Simple buck, motoring
B	Q2	+	−	Regenerative braking
C	Q1+Q2	+	±	Two-quadrant motor drive
D	Q1+Q4	±	+	Field control
E	Q1–Q4	±	±	Full reversible drive (H-bridge)

4. DC–AC Converters: Inverters

Inverters convert DC to AC. Classification axes include the DC source type (VSI: voltage-source inverter; CSI: current-source inverter), number of phases, and the modulation strategy (square-wave, PWM, multilevel).

Performance Metrics

\[ \text{THD} = \frac{1}{V_{o1}}\sqrt{\sum_{n \ne 1} V_{on}^2} = \sqrt{\!\left(\frac{V_{rms}}{V_{o1}}\right)^{\!2} - 1} \]

Single-Phase Inverter Configurations

The half-bridge uses two switches and two DC-link capacitors providing \( V_s/2 \) each; the output peak is \( V_s/2 \). The full-bridge (H-bridge) uses four switches and can apply \( \pm V_s \) to the load; the output peak is \( V_s \).

Half-bridge square-wave: \( V_{o1,rms} = \dfrac{\sqrt{2} V_s}{\pi} \), \( V_{rms} = \dfrac{V_s}{2} \)
Full-bridge square-wave: \( V_{o1,rms} = \dfrac{2\sqrt{2} V_s}{\pi} \approx 0.9\, V_s \), \( V_{rms} = V_s \)
Harmonic spectrum: \( V_{on} = \dfrac{4V_s}{n\pi} \), \( n = 1, 3, 5, \ldots \)
Square-wave THD \( \approx 48.43\% \)

Three-Phase Six-Step (180° Conduction) Inverter

Six switches operate with each device ON for 180°, always three switches conducting simultaneously. The line-to-line voltage is a six-step quasi-square waveform. Triplen harmonics (multiples of 3) are absent in the line-to-line voltage (but present in phase-to-neutral voltage) due to the 120° symmetry of the three-phase system.

\[ V_{LL,rms} = \sqrt{\tfrac{2}{3}}\, V_s = 0.816\, V_s \] \[ V_{LL1,rms} = \frac{\sqrt{6}}{\pi}\, V_s = 0.780\, V_s \] Harmonics present: \( n = 6k \pm 1 \) (i.e., 1, 5, 7, 11, 13, …)
Line-to-line THD \( \approx 31\% \)

Voltage Control Methods

Three main strategies control the output voltage amplitude of an inverter:

Single-pulse modulation: \( V_{o,rms} = V_s\sqrt{d/\pi} \). Simple but large low-order harmonics.
Multiple-pulse modulation (MPM): \( p \) equal-width pulses per half-cycle; shifts harmonics to higher orders proportional to \( p \).
Sinusoidal PWM (SPWM): lowest THD; fundamental linearly controllable via modulation index \( m_a \).

Sinusoidal PWM (SPWM)

A sinusoidal reference waveform (frequency \( f_m \)) is compared to a triangular carrier (frequency \( f_c \)). The output switches whenever the reference crosses the carrier.

Amplitude modulation index: \( m_a = \hat{V}_r / \hat{V}_c \)
Frequency modulation index: \( m_f = f_c / f_m \)
Linear region (\( m_a \le 1 \)): \( \hat{V}_{o1} = m_a\, V_s/2 \) (leg voltage, half-bridge)
Overmodulation (\( 1 < m_a < 3.24 \)): non-linear; low-order harmonics re-emerge
Square-wave limit (\( m_a \to \infty \)): \( \hat{V}_{o1} = \tfrac{4}{\pi} \cdot \tfrac{V_s}{2} \)

GATE Tip: Harmonic frequencies cluster around \( m_f, 2m_f, 3m_f, \ldots \) Choose \( m_f \) odd and a multiple of 3 (for three-phase) to cancel triplens in the line-to-line voltage.

PWM Variants

Third-harmonic injection PWM (THIPWM): adding a \( \frac{1}{6} \)-amplitude third harmonic to the reference gives 15.5% higher fundamental without overmodulation.
Space Vector PWM (SVPWM): selects from 8 inverter states (6 active + 2 zero) to form the reference vector optimally. Produces ~15.5% more fundamental than SPWM. Maximum linear line-to-line RMS output: \( V_{LL,1} = V_s/\sqrt{2} \).
Selective Harmonic Elimination (SHE-PWM): solves transcendental equations to eliminate specific harmonics; used in high-power, low-switching-frequency inverters.
Hysteresis-band current control: tracks a reference current within a band; simple and fast but variable switching frequency.

Current Source Inverter (CSI)

The CSI is fed from a stiff DC current source (large series inductor). Output is a quasi-square current waveform; output voltage is determined by the load. Switches require reverse voltage blocking, and commutating capacitors are needed for SCR-based CSIs. CSIs are inherently short-circuit proof.

Output current fundamental RMS (3-phase, 120° conduction): \( I_{o1} = \dfrac{\sqrt{6}}{\pi}\, I_d \approx 0.78\, I_d \)

GATE Tip: VSI has low output impedance and needs anti-parallel diodes. CSI has high output impedance and switches that need reverse blocking. CSI is rugged but requires a bulky DC reactor.

Multilevel Inverters (MLI)

MLIs generate output with more than two voltage levels, improving waveform quality, reducing \( dv/dt \) stress, and enabling higher voltage ratings without series-connected devices. The three standard topologies are:

Diode-clamped (NPC): neutral-point capacitors and clamping diodes; voltage balance challenging at levels above 3.
Flying-capacitor: floating capacitors hold intermediate voltages; needs pre-charging.
Cascaded H-bridge (CHB): series-connected H-bridge cells each with an isolated DC source; most modular.

For an \(m\)-level MLI: step voltage \( V_{\text{step}} = V_{dc}/(m-1) \)
Switches per phase (NPC or FC): \( 2(m-1) \)

5. AC–AC Converters

AC Voltage Controller (Single-Phase)

An AC voltage controller (using a triac or two anti-parallel SCRs) controls AC power by delaying the firing angle \( \alpha \) within each half-cycle (phase control) or by switching full cycles on and off (integral-cycle control).

Phase control (R-load): \[ V_{o,rms} = V_s\sqrt{\tfrac{1}{\pi}\!\left[\pi - \alpha + \tfrac{\sin 2\alpha}{2}\right]} \] Integral-cycle control: \[ V_{o,rms} = V_s\sqrt{\tfrac{n}{n+m}}, \quad k = \frac{n}{n+m} \]

Applications include lamp dimmers, fan speed control, resistance heater control, induction heating, and motor soft-starters. Integral-cycle control is suited to thermal loads with long time constants; phase control generates more EMI but works for any load type.

Three-Phase AC Voltage Controller

Three pairs of anti-parallel SCRs control the per-phase voltages. The number of SCRs conducting simultaneously changes with firing angle \( \alpha \): three SCRs conduct for \( \alpha < 60° \); two or three alternate for \( 60° \le \alpha < 90° \); exactly two conduct for \( 90° \le \alpha < 150° \); and output drops to zero for \( \alpha \ge 150° \).

RMS output (per-phase, star R-load, \( \alpha \le 60° \)): \[ V_{o,rms} = V_s\sqrt{1 - \frac{3\alpha}{2\pi} + \frac{3}{4\pi}\sin 2\alpha} \]

GATE Tip: After a motor reaches speed in a soft-starter, the SCRs are bypassed by contactors to eliminate conduction losses. A solid-state relay (SSR) is essentially an AC voltage controller packaged as a single component.

Cycloconverters and Matrix Converters

A cycloconverter directly converts AC of one frequency to a lower AC frequency without a DC intermediate stage. Each output half-cycle is synthesised from segments of the input supply waveform using phase-controlled bridges. The maximum output frequency is limited to approximately one-third of the input frequency.

For a 3-phase to 1-phase bridge cycloconverter: \( V_{o,1}\,(\text{peak fundamental}) = r \cdot \dfrac{3\sqrt{3}}{\pi} V_m \), \quad \( 0 \le r \le 1 \)

Matrix converters generalise cycloconverters using bidirectional IGBT switches to achieve full AC-to-AC conversion with no DC link. The maximum output voltage is limited to 0.866 times the input voltage due to modulation constraints.

6. Electric Drives and Applications

Any electric drive system comprises four elements: a power converter, a motor, sensors, and a controller. Differences between drive systems lie in the converter topology, motor type, control strategy, and sensor requirements.

DC Motor Drives

The separately excited DC motor obeys:

\[ V_a = E_b + I_a R_a, \quad E_b = K\phi\, \omega, \quad T = K\phi\, I_a \] \[ V_a = \frac{2V_m}{\pi}\cos\alpha \;\Rightarrow\; \omega = \frac{V_a - I_a R_a}{K\phi} \]

Speed control below base speed uses armature voltage control (constant-torque region). Speed control above base speed uses field weakening (constant-power region). Four-quadrant operation requires either a dual converter or a class-E (H-bridge) chopper.

Induction Motor Drives

\[ n_s = \frac{120f}{P}, \quad s = \frac{n_s - n}{n_s}, \quad T \propto \frac{s\, V^2}{R_2^2 + (s X_2)^2} \] \[ \boxed{V/f = \text{constant}} \;\Rightarrow\; \text{constant air-gap flux} \]

Speed-control methods in order of performance sophistication:

Stator voltage control (AC controller): \( T \propto V^2 \); only for fan-type loads with inherent torque-speed characteristic.
V/f control (open-loop scalar): maintains constant flux below base speed; adequate for many pump and fan applications.
Rotor resistance control (slip-ring only): simple but lossy.
Slip-power recovery (Kramer/Scherbius): recovers rotor slip power back to the supply; efficient for large slip-ring machines.
Field-oriented control (FOC): decouples torque and flux; provides DC-motor-like dynamic performance.

GATE Tip: Above base speed, voltage is held at rated while frequency increases — flux weakens, and maximum torque drops as \( 1/f^2 \) (constant-power region).

BLDC, PMSM, and SRM Drives

Parameter	BLDC	PMSM	SRM
Back-EMF waveform	Trapezoidal	Sinusoidal	—
Control strategy	Six-step	Vector (FOC)	Hysteresis/PWM
Torque ripple	Medium	Low	High
Cost	Medium	High	Low
Position sensor	Hall sensor	Encoder/Resolver	Position or sensorless

7. Power Quality and Special Topics

Harmonics and Power Factor

For non-sinusoidal load current with sinusoidal supply voltage, only the fundamental current component contributes real power. True power factor is the product of displacement power factor (DPF) and distortion factor (DF):

\[ P = V_{rms} I_{1,rms} \cos\phi_1 \] \[ PF = \frac{P}{S} = \underbrace{\frac{I_{1,rms}}{I_{rms}}}_{\text{Distortion factor (DF)}} \cdot \underbrace{\cos\phi_1}_{\text{DPF}} \] \[ \text{THD}_i = \frac{1}{I_{1,rms}}\sqrt{\sum_{n \ge 2} I_{n,rms}^2} = \sqrt{\tfrac{1}{\text{DF}^2} - 1} \]

Caution: Pure displacement factor \( \cos\phi_1 \) is not the true power factor when harmonics are present. Always multiply displacement factor by the distortion factor to obtain true PF.

Power Factor Correction (PFC)

Passive PFC places an inductor in series with the diode-bridge input, partially smoothing the current waveform. It is simple but bulky and only partially effective.

Active boost PFC forces the input current to track the input voltage waveform, emulating a resistor at the AC input. This achieves PF > 0.99 and THD < 5%.

Target input current: \( i_s(t) = \dfrac{V_m}{R_e}\sin\omega t \)
DC-link ripple: \( \Delta v_o = \dfrac{P}{2\pi f C V_o} \) (at frequency \( 2f \))

EMI, Filters, and Design Practice

Switching converters generate wideband noise in two modes: differential-mode (DM) propagates through input lines; common-mode (CM) propagates through parasitic capacitances to earth. Standards (CISPR 11/22, FCC) set limits for conducted EMI from 150 kHz to 30 MHz and radiated EMI from 30 MHz to 1 GHz.

EMI filter cut-off: \( f_c = \dfrac{1}{2\pi\sqrt{L_f C_f}} \)
Place \( f_c \) one decade below the fundamental switching harmonic.
Attenuation: 40 dB/decade above \( f_c \) (second-order LC filter).

Renewable Energy and EV Power Electronics

A solar PV grid-tie system consists of a PV array followed by an MPPT boost stage, a grid inverter, an LCL filter, and the utility grid. An EV charging and drivetrain system passes through a PFC stage, an isolated LLC or DAB converter, a high-voltage battery pack, a traction inverter, and finally the PMSM motor.

Key specialised converters in these applications include: the Dual Active Bridge (DAB) for bidirectional isolated DC–DC conversion in EV onboard chargers; the LLC resonant converter for high-efficiency isolated conversion in server power supplies and DC fast chargers; the Modular Multilevel Converter (MMC) for HVDC and STATCOM; and the DFIG back-to-back converter for variable-speed wind generation.

Resonant and Soft-Switching Converters

Resonant converters exploit LC resonance to create natural zero-voltage or zero-current crossing instants, eliminating switching losses at high frequency:

\[ f_r = \frac{1}{2\pi\sqrt{LC}}, \qquad Z_o = \sqrt{\tfrac{L}{C}}, \qquad Q = \frac{\omega_r L}{R} \] \( f_s < f_r \): ZCS (below resonance) \quad \( f_s > f_r \): ZVS (above resonance, preferred for MOSFETs)

GATE Tip: LLC is the dominant topology for high-efficiency isolated DC–DC converters. It operates near resonance with ZVS on primary MOSFETs and ZCS on secondary diodes.

FACTS and Custom Power Devices

Grid-scale power electronics is divided into FACTS (Flexible AC Transmission Systems) at transmission level and Custom Power devices at distribution level:

FACTS devices: SVC (static VAR compensator = TCR + TSC); STATCOM (VSC-based shunt reactive power); TCSC (thyristor-controlled series capacitor); UPFC (unified power flow controller = STATCOM + SSSC).

Custom Power devices: DVR (dynamic voltage restorer, series voltage injection); D-STATCOM (distribution STATCOM, shunt reactive and harmonic compensation); UPQC (unified power quality conditioner = series + shunt combined).

GATE Tip: STATCOM delivers rated reactive current even at depressed system voltage (current-source characteristic). SVC output is proportional to \( V^2 \) and weakens exactly when reactive support is most needed during fault conditions.

8. GATE Strategy, Formula Sheets, and Worked Examples

Complete Formula Sheet: Rectifiers and Performance Indices

Single-phase rectifiers (\( V_m = \sqrt{2}\, V_s \)): \[ \text{HW uncontrolled: } V_{dc} = \frac{V_m}{\pi},\quad V_{rms} = \frac{V_m}{2} \] \[ \text{HW controlled (R): } V_{dc} = \frac{V_m}{2\pi}(1 + \cos\alpha) \] \[ \text{FW uncontrolled: } V_{dc} = \frac{2V_m}{\pi},\quad V_{rms} = \frac{V_m}{\sqrt{2}} \] \[ \text{FW controlled (R or RL cont.): } V_{dc} = \frac{2V_m}{\pi}\cos\alpha \] \[ \text{Semi-converter (RL): } V_{dc} = \frac{V_m}{\pi}(1 + \cos\alpha) \]

Three-phase rectifiers (\( V_{mL} = \sqrt{2}\, V_{LL} \)): \[ \text{3-phase HW (3-pulse): } V_{dc} = \frac{3\sqrt{3}\, V_m}{2\pi}\cos\alpha \] \[ \text{3-phase FW (6-pulse): } V_{dc} = \frac{3 V_{mL}}{\pi}\cos\alpha = \frac{3\sqrt{2}\, V_{LL}}{\pi}\cos\alpha \]

Key numbers to memorise:
1-phase FW bridge (R, \(\alpha=0\)): \(FF=1.11\), \(RF=0.482\), \(\eta=81.2\%\), TUF\(=0.812\)
3-phase FW bridge (R, \(\alpha=0\)): \(FF=1.0009\), \(RF=0.042\), \(\eta=99.8\%\), TUF\(=0.954\)
1-phase FW (RL, cont.): \(PF = \dfrac{2\sqrt{2}}{\pi}\cos\alpha \approx 0.9\cos\alpha\)

Complete Formula Sheet: Choppers and Inverters

DC–DC converters (CCM): \[ \text{Buck: } V_o = DV_s;\quad \Delta i_L = \frac{(V_s - V_o)D}{Lf_s};\quad \frac{\Delta v_o}{V_o} = \frac{1-D}{8LCf_s^2} \] \[ \text{Boost: } V_o = \frac{V_s}{1-D};\quad \Delta i_L = \frac{V_s D}{Lf_s};\quad \frac{\Delta v_o}{V_o} = \frac{D}{RCf_s} \] \[ \text{Buck-Boost: } V_o = -\frac{D}{1-D}V_s;\quad \text{Ćuk/SEPIC: } |V_o| = \frac{D}{1-D}V_s \] \[ \text{CCM/DCM boundary (Buck): } L_{\min} = \frac{(1-D)R}{2f_s} \] \[ \text{Switching loss (linear approx.): } P_{sw} = \frac{1}{2}V_{ds}I_d(t_{on}+t_{off})f_s \]

Inverters (1-phase): \[ \text{Half-bridge sq.wave: } V_{o1} = \frac{2V_s}{\pi},\quad V_{rms} = \frac{V_s}{2} \] \[ \text{Full-bridge sq.wave: } V_{o1} = \frac{4V_s}{\pi},\quad V_{rms} = V_s \] \[ \text{SPWM linear: } V_{o1,\text{peak}} = m_a \frac{V_s}{2} \text{ (half-bridge)} \]
Three-phase six-step VSI: \[ V_{LL,1,rms} = \frac{\sqrt{6}}{\pi}V_s \approx 0.7797\, V_s \] \[ V_{LL,rms} = \sqrt{\tfrac{2}{3}}\, V_s \approx 0.8165\, V_s \] \[ \text{THD}_{LL} \approx 31\% \] \[ \text{SPWM max linear } V_{LL,1} = \frac{\sqrt{3}}{2\sqrt{2}}V_s \approx 0.612\, V_s \] \[ \text{SVPWM max linear } V_{LL,1} = \frac{V_s}{\sqrt{2}} \approx 0.707\, V_s \;(\approx 15\% \text{ more than SPWM}) \]

GATE Problem-Solving Roadmap

Identify the topology: 1-phase/3-phase, half-wave/full-wave, controlled/uncontrolled, semi/full.
Identify the load: R / RL (continuous or discontinuous) / RLE (motor) / battery.
Determine the conduction mode: CCM vs DCM for choppers; continuous vs discontinuous for rectifiers.
Pick the correct formula for \( V_{dc} \), \( I_o \), or ripple.
Compute the fundamental of source current for PF/DPF calculations.
Cross-check units and limiting cases (\( \alpha = 0 \), \( D = 0 \), \( D = 1 \)).

Common GATE Traps — avoid these:

Using \(V_{rms}\) where \(V_{dc}\) is asked (or vice versa).
Forgetting \(\sqrt{2}\) when converting \(V_s \to V_m\).
Confusing 3-phase HW (3-pulse, \(\frac{3\sqrt{3}}{2\pi}\)) and 3-phase FW (6-pulse, \(\frac{3}{\pi}\)) constants.
Treating \(PF = \cos\alpha\) for non-sinusoidal source current (omitting distortion factor).
Applying the buck output-ripple formula to a boost converter.
Using SPWM peak (\( m_a V_s/2 \)) and forgetting it is per-phase, not line-to-line.
Forgetting that a freewheeling diode changes rectifier formulae entirely.
For semi-converter: range \( 0 \le \alpha \le \pi \); output is never negative.
Six-step VSI: triplen harmonics absent in line-to-line but present in phase voltage.

Worked Example 1 — Single-Phase Full-Bridge Rectifier

Problem: A single-phase fully-controlled bridge feeds a highly inductive load from a 230 V (rms), 50 Hz source. Firing angle \( \alpha = 45° \), load current \( I_o = 10 \) A (approximately constant). Find: (a) \( V_{dc} \), (b) input PF, (c) fundamental RMS source current, (d) DPF.

Solution:

\( V_m = \sqrt{2} \times 230 = 325.27 \) V.
\( V_{dc} = \dfrac{2V_m}{\pi}\cos\alpha = \dfrac{2 \times 325.27}{\pi} \times \cos 45° = 207.07 \times 0.7071 = \mathbf{146.42 \text{ V}} \).
Source current is a quasi-square wave of \(\pm I_o\):
\( I_s = I_o = 10 \) A (RMS).
Fundamental: \( I_{s1} = \dfrac{2\sqrt{2}\, I_o}{\pi} = \mathbf{9.003 \text{ A}} \).
DPF \( = \cos\alpha = \cos 45° = \mathbf{0.7071} \) (lagging).
Distortion factor: \( DF = I_{s1}/I_s = 0.9003 \).
\( PF = DF \times DPF = 0.9003 \times 0.7071 = \mathbf{0.6366} \) lagging.

GATE shortcut: For a 1-phase FW controlled bridge with continuous current and inductive load: \( PF = \dfrac{2\sqrt{2}}{\pi}\cos\alpha \approx 0.9\cos\alpha \). Check: \( 0.9 \times \cos 45° = 0.6364 \) ✓

Worked Example 2 — Boost Converter (CCM)

Problem: Boost converter: \( V_s = 12 \) V, \( V_o = 36 \) V, \( R = 30 \, \Omega \), \( L = 100 \, \mu\text{H} \), \( C = 100 \, \mu\text{F} \), \( f_s = 40 \) kHz, CCM operation. Find: (a) duty cycle \( D \), (b) inductor current ripple \( \Delta i_L \), (c) output voltage ripple \( \Delta v_o \).

Solution:

\( V_o/V_s = 1/(1-D) \Rightarrow 3 = 1/(1-D) \Rightarrow D = \mathbf{0.6667} \).
\( P_o = V_o^2/R = 36^2/30 = 43.2 \) W; \( I_L = P_o/V_s = 43.2/12 = 3.6 \) A.
\( \Delta i_L = \dfrac{V_s D}{L f_s} = \dfrac{12 \times 0.6667}{100 \times 10^{-6} \times 40 \times 10^3} = \mathbf{2 \text{ A}} \) (peak-to-peak).
CCM check: \( I_L = 3.6 > \Delta i_L/2 = 1 \) A ✓
\( \dfrac{\Delta v_o}{V_o} = \dfrac{D}{RCf_s} = \dfrac{0.6667}{30 \times 100 \times 10^{-6} \times 40 \times 10^3} = 5.556 \times 10^{-3} \).
\( \Delta v_o = 5.556 \times 10^{-3} \times 36 = \mathbf{0.2 \text{ V}} \) (peak-to-peak).

Caution: Buck output ripple formula uses \( 1/(8LCf_s^2) \) — this is an LC filter. Boost output ripple uses \( D/(RCf_s) \) — only the output capacitor C filters; the inductor L is on the input side. Never interchange these two formulas.

Worked Example 3 — Three-Phase Six-Step VSI

Problem: A three-phase six-step (180° conduction) VSI is fed from \( V_s = 600 \) V DC. Find: (a) RMS fundamental line-to-line voltage, (b) total RMS line-to-line voltage, (c) line-to-line THD.

Solution:

Fundamental (RMS): \( V_{LL,1} = \dfrac{\sqrt{6}}{\pi} \times 600 = \mathbf{467.83 \text{ V}} \).
Total RMS (quasi-square 120° waveform): \( V_{LL,rms} = \sqrt{2/3} \times 600 = 0.8165 \times 600 = \mathbf{489.90 \text{ V}} \).
\( \text{THD} = \sqrt{(V_{LL,rms}/V_{LL,1})^2 - 1} = \sqrt{(489.90/467.83)^2 - 1} = \sqrt{0.0966} = \mathbf{31.08\%} \).
Phase fundamental: \( V_{ph,1} = V_{LL,1}/\sqrt{3} = 270.1 \) V.

Constants worth memorising: \( \dfrac{\sqrt{6}}{\pi} \approx 0.7797 \), \quad \( \sqrt{\tfrac{2}{3}} \approx 0.8165 \). Six-step harmonics: only \( 6k \pm 1 \) (5, 7, 11, 13, …) survive in line-to-line. Each harmonic \( n \) has amplitude \( 1/n \) of the fundamental.

Worked Example 4 — SCR Protection (Snubber + di/dt)

Problem: An SCR has \( (dv/dt)_{\max} = 200 \) V/µs and \( (di/dt)_{\max} = 100 \) A/µs. Supply \( V_s = 400 \) V. Design (a) series inductor \( L_s \) for \( di/dt \) limiting, (b) RC snubber for \( dv/dt \) with damping ratio \( \xi = 0.65 \). Find \( C_s \) so the initial \( dv/dt \) on re-application of forward voltage equals the limit, then find \( R_s \).

Solution:

\( di/dt \) limiting: \( L_s \ge \dfrac{V_s}{(di/dt)_{\max}} = \dfrac{400}{100 \times 10^6} = \mathbf{4 \, \mu\text{H}} \).
The initial \( dv/dt \) on reapplication: \( (dv/dt)|_{0^+} = V_s / (2\xi\sqrt{L_s C_s}) \). Setting this equal to \( (dv/dt)_{\max} \): \[ C_s = \frac{V_s^2}{4\xi^2 L_s (dv/dt)_{\max}^2} = \frac{(400)^2}{4(0.65)^2(4 \times 10^{-6})(2 \times 10^8)^2} \approx \mathbf{0.59 \, \mu\text{F}} \]
Damping resistor: \( R_s = 2\xi\sqrt{L_s/C_s} = 2(0.65)\sqrt{4\,\mu\text{H}/0.6\,\mu\text{F}} = 1.3\sqrt{6.667} \approx \mathbf{3.36 \, \Omega} \).

Snubber roles: \( L_s \) in series limits \( di/dt \) at turn-on. \( R_s C_s \) across SCR limits \( dv/dt \) at turn-off and on re-application of forward voltage. \( R_s \) damps LC ringing and limits capacitor discharge current at the next turn-on.

9. The Power-Electronics Worldview: Eight Core Insights

Switches are ideal; losses come from transitions. Conduction loss \(\propto V_{\text{on}} I\); switching loss \(\propto V_{\text{off}} I_{\text{on}} (t_r + t_f) f_s\). Trade-off: higher \(f_s\) → smaller filter, more switching loss.
Inductors enforce current continuity; capacitors enforce voltage continuity. Every converter is built on this: \(L\) sees pulsed voltage and smooth current; \(C\) sees pulsed current and smooth voltage.
Volt-second balance and charge balance determine steady state. \(\langle v_L \rangle_{T_s} = 0\), \(\langle i_C \rangle_{T_s} = 0\). Apply these and the conversion ratio of any topology falls out in two lines.
Energy is conserved switch by switch. Boost: \(V_s I_s = V_o I_o \Rightarrow I_s / I_o = 1/(1-D)\). Step-up voltage means step-down current.
Fourier determines the harmonics; topology determines which survive. Six-step VSI kills triplens in LL voltage; 12-pulse rectifier cancels 5th and 7th harmonics; multilevel inverters reduce \(dv/dt\) and harmonics together.
Power factor has two independent components. \( PF = \underbrace{\cos\phi_1}_{DPF} \cdot \underbrace{I_{s1}/I_s}_{DF} \). Capacitor PFC corrects only DPF; active boost PFC corrects both DPF and DF.
Control loops are cascaded with the fastest loop innermost. In drives: torque (current) loop → speed loop → position loop. Bandwidth ratio ~5–10× between successive loops.
WBG devices (SiC, GaN) change the limits, not the laws. The same volt-second balance applies; smaller \(t_{\text{on}} + t_{\text{off}}\) enables MHz-frequency designs. Thermal management and EMI become the new limiting constraints.

References and Further Reading

Core Textbooks

Rashid, M. H., Power Electronics: Circuits, Devices, and Applications, 4th ed., Pearson.
Mohan, Undeland, and Robbins, Power Electronics: Converters, Applications and Design, 3rd ed., Wiley.
Bimbhra, P. S., Power Electronics, Khanna Publishers.
Erickson, R. W. and Maksimović, D., Fundamentals of Power Electronics, 3rd ed., Springer.

Specialised References

Bose, B. K., Modern Power Electronics and AC Drives, Prentice Hall.
Krishnan, R., Electric Motor Drives: Modelling, Analysis and Control, Prentice Hall.
Hingorani and Gyugyi, Understanding FACTS, IEEE Press.

GATE Preparation

Solve all GATE EE Power Electronics Previous Year Questions (2000–2025), topic-wise.
NPTEL: Power Electronics by L. Umanand (IISc); Switched-Mode Power Conversion by V. Ramanarayanan.
Made-Easy / ACE GATE Engineering booklets on Power Electronics.

Simulation and Hands-On Practice

LTspice, PLECS (free demo) — circuit-level simulation.
MATLAB/Simulink with Simscape Electrical — system-level simulation.
PSIM, Typhoon HIL — hardware-in-the-loop testing.

GATE Tip: Pair every formula in these notes with a 5-minute simulation in LTspice. Intuition cements far faster through simulation than through rote memorisation alone.

"Power electronics is the art of processing electrical energy with switches that are off most of the time — and on at exactly the right instant."
— Prof. Mithun Mondal, BITS Pilani – Hyderabad