Single-Phase Voltage Source Inverters

The RMS output is trivial, because the waveform has constant magnitude:

The fundamental, from the Fourier series of a square wave:

The peak fundamental exceeds the DC link voltage — 255 V from a 200 V source. That is not a violation of anything: the square wave contains the fundamental plus harmonics that subtract near the peak, and adding them back gives 200. It is also why the square-wave mode is kept as the ceiling of every modulation scheme.

The harmonics fall as \(1/n\), odd only:

The same 48.34% that the single-phase converter's current had in Set 16, and for the same reason — both are square waves. The inverter and the rectifier are duals: one makes a square voltage from a smooth current, the other a square current from a smooth voltage.

How much power the fundamental carries:

Nineteen per cent of the delivered power is at frequencies the load does not want. In a resistor that is merely wasteful; in a motor those harmonics produce torque pulsations and extra heating without contributing useful torque at all.

Device ratings:

Each switch conducts for a full half cycle. Note the switch blocks only \(V_{dc}\), not twice it — the bridge clamps it, exactly as the isolated bridge of Set 22 did.

The half bridge, for comparison, applies only \(\pm V_{dc}/2\):

Exactly half the output for the same link and the same device voltage — so a half bridge delivers a quarter of the power. It halves the switch count and needs a split capacitor to create the midpoint, and it survives mainly in low-power applications and as one leg of something larger.

How quasi-square works. Instead of switching both legs simultaneously, one leg is delayed so that the output spends part of each half cycle at zero — both upper devices or both lower devices conducting together:

The phase-shift angle between the two legs is the control input, and it varies the output continuously from full square wave down to zero — without any high-frequency switching at all.

The RMS falls with the square root of the conduction:

The harmonics acquire a sine factor:

A reduction of 13.4% in fundamental for a 33% reduction in conduction angle — the fundamental falls more slowly than the RMS, which is the first hint that the waveform has improved.

And now the third harmonic:

Exactly zero. Choosing \(\delta = 120^\circ\) makes \(3\delta/2 = 180^\circ\), where the sine vanishes — the largest harmonic in the spectrum is eliminated by a single choice of angle, with no switching penalty whatsoever.

The remaining spectrum:

A third off the distortion, from a waveform that switches no more often. And 31.1% is exactly the figure the six-pulse rectifier reached in Set 11 — both waveforms have had their triplens removed, one by choosing an angle and one by having no neutral.

What the method can and cannot do. One angle controls one thing:

Here the single angle was spent on nulling the third, which fixed the output at 155.9 V — no voltage control remains. Spending it on voltage control instead would leave the third harmonic present. Getting both requires two angles, which is the selective harmonic elimination of Set 27.

The fundamental is proportional to the modulation index:

Linear in \(m_a\) right up to \(m_a = 1\), which is what makes PWM so much easier to control than the quasi-square method — the output follows the reference directly with no trigonometry.

The total RMS is unchanged from the square wave, because bipolar switching means the output is always at \(\pm V_{dc}\):

Three times the square wave's distortion — and this is the better waveform. THD as a single number is nearly useless for a PWM inverter, because it counts a volt at 1050 Hz the same as a volt at 150 Hz.

Where the harmonics actually are. Sidebands cluster around multiples of the carrier:

The second row is the whole point: no low-order harmonics at all. The distortion has been moved from 150 Hz, where filtering it needs henries and millifarads, to 1050 Hz and above, where a small \(LC\) handles it.

Why \(m_f\) is chosen odd. An odd carrier ratio makes the waveform half-wave symmetric:

And no DC component — which matters enormously, because a DC offset on an inverter feeding a transformer will saturate it. Choosing \(m_f\) odd costs nothing and removes an entire family of harmonics.

Design the filter. The largest harmonic is 81.8 V peak at 1050 Hz, and a second-order \(LC\) attenuates as \((f/f_c)^2\):

And 250 Hz is comfortably above the 50 Hz fundamental, so the filter passes the wanted signal essentially unchanged. Note the ratio that made this easy: the carrier is 21 times the fundamental, so there is more than a decade of clear space to put the corner in.

The trade in \(m_f\):

The filter shrinks as \(1/m_f^2\) while switching loss grows as \(m_f\), so there is an optimum — the same shape of trade that Set 2 found for converter frequency, and it usually lands between 2 and 20 kHz.

What changes. In bipolar switching both legs are driven from one reference, so the two diagonals alternate and the output is always \(\pm V_{dc}\). In unipolar switching each leg has its own reference — one the negative of the other — so the two legs can be in the same state, giving zero output:

The fundamental is unchanged:

But the total RMS falls, because the output spends time at zero:

Same wanted output, nearly half the unwanted content — before any filtering. The zero state contributes nothing to either the fundamental or the harmonics, so replacing full-amplitude switching with it is pure gain.

And the harmonics move up an octave. Because the two legs switch at different instants, the output changes state twice per carrier period:

The devices still switch at 1050 Hz — the switching loss is unchanged — but the load sees 2100. This is exactly the trick the two-leg chopper of Set 17 used, and the interleaved buck of Set 18 before it: phase-shifting two switching cells doubles the effective frequency for free.

What the filter gains:

A quarter of the filter reactance for the same residual ripple. In the 2 kVA UPS of Problem 6 that is the difference between a 4 mH choke and a 1 mH one.

The third advantage is the voltage step. Bipolar switching swings the output through \(2V_{dc}\) at every transition; unipolar swings only \(V_{dc}\):

Halving the voltage step halves the \(dv/dt\), which halves the common-mode current into any stray capacitance and halves the stress on motor winding insulation. Set 26 shows why that matters in a drive.

Why bipolar survives. Two situations still favour it:

And (ii) bipolar switching guarantees that the output voltage can reverse instantly at any modulation index, so the current can be driven either way at every point in the cycle. For a four-quadrant converter that must cross zero current smoothly — the same argument as Set 17, Problem 5 — the simpler scheme can be the right one.

Why the dead time distorts. Set 7 inserted it to prevent shoot-through: for \(t_d\) at every transition, neither device in a leg is on. What the output does during that gap depends on which way the current is flowing:

The error always opposes the current — it acts like a resistance, but a nonlinear one that does not shrink with the signal.

The magnitude. Each switching period loses \(V_{dc}t_d\) of volt-seconds, and there are \(f_s\) of them per second:

Four volts of error, and independent of the modulation index — the same 4 V whether the inverter is producing 160 V or 40.

Its shape is a square wave, because it flips sign when the current does:

So the dead time reintroduces exactly the low-order harmonics that PWM was designed to eliminate — a 3rd, 5th and 7th appear where the spectrum of Problem 3 had none. And because they come from the current's sign, they are worst with a distorted or discontinuous current.

The severity depends entirely on the operating point:

The error is a fixed number of volts against a shrinking signal, so it dominates at low output. In a variable-speed drive that means low speed, where a 12% distortion produces torque ripple, audible noise, and in the worst case a dead band in which the machine will not start at all.

What makes it worse:

All three point the wrong way. A higher link voltage, a longer dead time for safety, and a higher switching frequency for a smaller filter each make the distortion worse — so the modern trend towards fast switching at high voltage aggravates it, and fast devices with short dead times are the compensating trend.

Compensation. Since the error is predictable, it can be cancelled:

The second row matters because the sign function is exactly what the compensator cannot know near zero crossing, where noise on the current measurement makes the sign flicker. That is precisely where the current is small and the distortion is proportionally largest — so dead-time compensation is hardest at the point it is most needed.

The modulation index:

Comfortably inside the linear range, with about 20% of headroom for the link voltage to sag as the battery discharges — which is exactly why 400 V was chosen for a 230 V output rather than something tighter.

The currents:

A 25 A device for 12.3 A of peak current looks generous, and it is deliberate: a UPS must survive the inrush of whatever is plugged into it, which for a switched-mode load is the capacitor charging current of Set 10.

Conduction loss. Over a sinusoid the average device current is:

Switching loss, with \(E_{sw} = 2\) mJ at rated current. The energy per switching follows the instantaneous current, whose average over a sinusoid is \(2/\pi\) of the peak:

Switching loss is nearly twice the conduction loss — the reverse of the chopper drive in Set 17, and the reason is that an inverter switches at 10 kHz where the chopper switched at 3. Halving the frequency would save 26 W and quadruple the filter.

The loss budget and efficiency:

The output filter. Size the inductor for 20% ripple at the worst case:

Then the capacitor from the corner frequency:

A corner at 1 kHz sits a decade above the fundamental and a decade below the carrier — the standard placement. Note that Problem 4's unipolar switching would put the harmonics at 20 kHz instead of 10, allowing the corner to move to 2 kHz and the inductor to fall to about 1 mH.

What else a UPS inverter must handle:

The first row is the one that sizes the hardware. A UPS almost always feeds capacitor-input rectifiers — the very loads of Set 10 — whose crest factor of 3 or more means the inverter must supply 37 A peaks while delivering 8.7 A of RMS. That is why a 2 kVA UPS carries devices that would serve a 6 kW resistive load.