Set 29 — Current Source, Multilevel and Resonant Inverters
Everything in Part 4 has been a two-level voltage source inverter: a stiff DC link, six switches, an output that jumps between two rails. That topology has three hard limits. Its output step is the whole link voltage, which stresses insulation and radiates. Its devices must block the entire link, which caps it at a few kilovolts. And it switches hard, so every transition costs the energy Set 2 budgeted.
Three families of answers exist, and each attacks a different limit. Replace the stiff voltage with a stiff current and the topology dualises; stack cells in series and the device voltage divides while the output gains levels; or make the current or voltage zero at the instant of switching and the transition energy disappears.
The CSI is the VSI's dual: stiff current in, PWM current out.
\[ I_{L,rms} = I_{dc}\sqrt{\tfrac23}, \qquad I_{L1} = \frac{\sqrt6}{\pi}I_{dc}, \qquad THD = 31.08\% \]An \(N\)-level inverter divides the device voltage and the output step:
\[ V_{device} = \frac{V_{dc}}{N-1}, \qquad \text{step} = \frac{V_{dc}}{N-1}, \qquad \text{line levels} = 2N-1 \]Cascaded H-bridges scale by cell count:
\[ N = 2n_{cell}+1, \qquad \hat V_{ph} = n_{cell}V_{cell}, \qquad \text{switches} = 12n_{cell} \]Series resonance sets the frequency and the impedance:
\[ f_0 = \frac{1}{2\pi\sqrt{LC}}, \qquad Z_0 = \sqrt{\frac{L}{C}}, \qquad Q = \frac{Z_0}{R} \]Switching relative to resonance decides which quantity is zero:
\[ f_s < f_0 \Rightarrow \text{ZCS}; \qquad f_s > f_0 \Rightarrow \text{ZVS} \]The LLC tank is designed from the reflected load:
\[ R_{ac} = \frac{8}{\pi^2}n^2R_L, \qquad Z_0 = QR_{ac}, \qquad L_r = \frac{Z_0}{2\pi f_r}, \qquad C_r = \frac{1}{2\pi f_rZ_0} \]
A three-phase current source inverter is fed from a stiff 100 A DC link and operates in 120° conduction. Find the output line currents, RMS and fundamental, the device currents, and the THD. Then tabulate the duality with the voltage source inverter of Set 26.
What makes it a current source. A large series inductor on the DC side holds the link current essentially constant, exactly as a large capacitor holds the VSI's link voltage constant:
The bridge then routes that constant current into whichever pair of output lines the gate signals select. The output is a current waveform, and the voltage is whatever the load produces.
The output current waveform is the familiar 120° block:
The same 31.08% for the fourth time in this book — a six-pulse rectifier's line current, a quasi-square voltage, a six-step inverter voltage, and now a CSI's output current. All four are the same waveform.
Device currents follow directly:
Independent of the modulation and the load — the devices always carry the full link current for exactly 120°. That predictability is one of the CSI's practical attractions.
The duality, term by term:
| Property | VSI | CSI |
|---|---|---|
| Link element | capacitor | inductor |
| Stiff quantity | voltage | current |
| Output PWM quantity | voltage | current |
| Load must be | inductive | capacitive |
| Forbidden | short the link (shoot-through) | open the link |
| Devices need | anti-parallel diodes | series (reverse-blocking) diodes |
| Output filter | series \(L\) | shunt \(C\) |
| Fault behaviour | capacitor dumps into the fault | inductor limits the current |
Every row is the exact dual. Note the fifth: a VSI must never have both devices in a leg on together, and a CSI must never have all six off — there must always be a path for the link current, so an overlap is required where the VSI needs a dead time.
Where each belongs:
| CSI advantage | CSI disadvantage |
|---|---|
| Inherent short-circuit protection | bulky, lossy DC link inductor |
| Regeneration without extra hardware | needs reverse-blocking devices |
| Reliable in high-power drives | output capacitors resonate with the machine |
| No capacitor ageing | slower dynamic response |
The first row is why the CSI survives at multi-megawatt ratings. An output short in a VSI lets the link capacitor deliver tens of kiloamps in microseconds; in a CSI the link inductor holds the current at its rated value and the drive simply rides through. For a large mill or compressor drive, that robustness outweighs the inductor.
A three-level neutral-point-clamped inverter operates from a 1000 V link split about a midpoint. Find the output levels, the device blocking voltage, the number of line-voltage levels, and the improvement in \(dv/dt\) and harmonic content over a two-level bridge. Identify the topology's characteristic problem.
The structure. Each leg has four devices in series with two clamping diodes tied to the capacitor midpoint. Three combinations are permitted:
| Devices on | Output | Value |
|---|---|---|
| Upper pair | \(+V_{dc}/2\) | +500 V |
| Middle pair | 0 (clamped to midpoint) | 0 V |
| Lower pair | \(-V_{dc}/2\) | −500 V |
The middle state is what the two-level bridge lacks: an output at the midpoint, held there by the clamping diodes. Three levels instead of two, from four devices instead of two per leg.
The device blocking voltage halves, which is the main prize:
Against 1000 V for a two-level bridge on the same link. And since \(R_{DS(on)}\) and \(V_{CE(sat)}\) both worsen sharply with rated voltage, two 600 V devices in series usually conduct better than one 1200 V device — so splitting the voltage improves conduction as well as making it feasible.
The line voltage gains more levels still. A difference of two three-level phases takes five values:
The waveform improvement, from two independent effects:
So for the same device switching frequency the output is four times cleaner in current terms — or, equivalently, the same quality can be had at half the switching frequency and half the switching loss.
The characteristic problem: neutral-point balance. When the output is at the middle level, load current flows into or out of the capacitor midpoint:
Left uncorrected, the midpoint drifts: one capacitor overvolts, the other collapses, and the output distorts. The drift depends on the load current and the modulation, so it cannot be prevented by sizing the capacitors — only by active control.
How it is corrected. The redundancy in the switching states provides the handle:
Exactly as the two zero states of Set 28 gave a free choice of common-mode voltage, the redundant small vectors of a three-level modulator give a free choice of neutral-point current. The modulator measures the midpoint voltage and biases its selection towards whichever member of each redundant pair pushes it back — a control loop that costs nothing in output.
The cost:
| Quantity | Two-level | Three-level NPC |
|---|---|---|
| Switches | 6 | 12 |
| Clamping diodes | 0 | 6 |
| Gate drives | 6 | 12 |
| Device voltage | \(V_{dc}\) | \(V_{dc}/2\) |
| Balancing control | none | required |
| Loss distribution | even | uneven — inner devices hotter |
The last row catches designers out. The inner and outer devices of an NPC leg conduct for different intervals, so they run at different temperatures and one pair limits the rating — which is why the active NPC variant, using controlled devices instead of clamping diodes, exists to redistribute it.
A cascaded H-bridge inverter drives a 6.6 kV motor. Each cell has an isolated 630 V DC source from its own rectifier. Determine the number of cells per phase, the number of output levels, the total switch count and the device voltage rating, and explain why this topology dominates medium-voltage drives.
The requirement. Each phase must produce the peak phase voltage:
Cells add in series, each contributing up to its own DC voltage:
Five per cent of margin, which is about right — enough for supply variation without wasting cells. Note that adding one more cell would give 11% margin and cost 12 more devices per phase, so the rounding decision matters.
The resulting structure:
A hundred and eight switches sounds prohibitive until the alternative is examined: a two-level bridge would need six devices each blocking 9330 V, which does not exist in a single package.
Why this is the right trade. Nineteen levels is a very fine staircase:
| Consequence | Detail |
|---|---|
| Output THD | < 3% without any filter |
| \(dv/dt\) | 630 V steps — standard motor insulation is fine |
| Devices | 1200 V IGBTs — cheap, fast, mature |
| Effective switching frequency | \(9\times\) the device rate, from phase-shifted carriers |
| Device switching frequency | can be a few hundred hertz — very low loss |
| Redundancy | a failed cell can be bypassed |
Rows four and five together are the topology's real magic. Phase-shifting the nine cells' carriers by \(360^\circ/9\) makes the output ripple appear at nine times the device switching frequency — so each IGBT can switch at 500 Hz while the motor sees 4.5 kHz. Switching loss becomes almost negligible.
The price: isolated sources. Twenty-seven cells each need their own floating DC supply:
A large, expensive, phase-shifted multi-winding transformer — which is the topology's dominant cost. But it is not wasted: shifting the secondaries by a few degrees each makes the whole drive draw a near-sinusoidal input current, giving 54-pulse rectification and an input THD below 1% with no filter at all.
The comparison at medium voltage:
| Approach | Verdict at 6.6 kV |
|---|---|
| Two-level, series devices | needs static and dynamic voltage sharing — fragile |
| Three-level NPC | works to ~4 kV with 6.5 kV IGBTs; expensive devices |
| Cascaded H-bridge | standard 1200 V devices, clean input and output |
| Modular multilevel (MMC) | dominant above 100 kV — HVDC |
The first row is what CHB replaced. Series-connecting devices requires every one of them to share voltage under all conditions, static and dynamic — the string problem of Set 5, with far worse consequences. Cascading complete cells sidesteps it entirely: each cell manages its own voltage.
Compare the neutral-point-clamped, flying-capacitor and cascaded H-bridge topologies at five levels on component count, balancing requirements and modularity, and state where each belongs.
All three produce the same output levels and differ only in how the intermediate voltages are created:
| Topology | Intermediate levels from |
|---|---|
| NPC | clamping diodes to capacitor taps |
| Flying capacitor | floating capacitors charged to fractions of \(V_{dc}\) |
| Cascaded H-bridge | separate isolated DC sources |
Component count at five levels, three phases:
| Component | NPC | FC | CHB |
|---|---|---|---|
| Switches | 24 | 24 | 24 |
| Clamping diodes | 36 | 0 | 0 |
| Flying capacitors | 0 | 18 | 0 |
| Isolated DC sources | 0 | 0 | 6 |
| DC link capacitors | 4 | 4 | — |
Same switch count in every case — the differences are entirely in the passive and auxiliary components. And the diode count for NPC grows as \((N-1)(N-2)\), which is why NPC rarely goes beyond three levels.
The balancing problem in each:
| Topology | What must be balanced | How |
|---|---|---|
| NPC | DC link midpoint | redundant small vectors — active control |
| FC | each flying capacitor | phase-shifted carriers — self-balancing |
| CHB | nothing | each cell has its own source |
The flying capacitor's self-balancing is genuinely elegant: the redundant switching states that produce each intermediate level charge and discharge the floating capacitor in opposite directions, and a phase-shifted carrier scheme visits them alternately without any measurement. The capacitor finds its own voltage.
Modularity and fault tolerance:
A nine-cell drive that loses one cell keeps running at 89% voltage. Neither NPC nor FC offers anything comparable — a failed device takes the leg with it. For a drive on a cement kiln or an oil pipeline, where an unplanned stop costs more than the drive, that redundancy alone decides the choice.
Where each belongs:
| Application | Topology | Reason |
|---|---|---|
| 690 V drives, high performance | NPC (3-level) | shared link, low \(dv/dt\) |
| 2.3–13.8 kV drives | CHB | commodity devices, modular, clean input |
| Traction, aerospace | FC | no diodes, self-balancing, compact |
| Grid-tied > 100 kV | MMC | scalable to hundreds of levels |
| Solar and storage inverters | NPC or T-type | cost-driven, three levels is enough |
The modular multilevel converter of the fourth row is the CHB idea with a shared DC link instead of isolated sources — each cell is a half bridge with a floating capacitor, and there can be hundreds of them. It is what made voltage-source HVDC possible, and Set 40 returns to it.
A series resonant inverter has \(L = 50\ \mu\text{H}\), \(C = 0.2\ \mu\text{F}\) and a \(5\ \Omega\) load, fed from a 400 V half bridge. Find the resonant frequency, characteristic impedance and quality factor, the output current and power at resonance, and quantify the switching loss saved against hard switching.
The tank parameters:
A \(Q\) of 3.16 is moderate — high enough for the current to be near-sinusoidal, low enough that the tank does not ring excessively when the load changes. Induction heating applications run at much higher \(Q\); power supplies at lower.
The output at resonance. The half bridge applies a square wave of \(\pm V_{dc}/2\), and at \(f_0\) the tank presents pure resistance, so only the fundamental drives current:
The tank filters the square wave's harmonics almost completely — at \(3f_0\) its impedance is roughly \(2.7Z_0 = 43\ \Omega\) against 5, so the third harmonic current is under 4% of the fundamental. That is the resonant converter's defining property: the current is sinusoidal however square the voltage is.
Which side of resonance to switch on. The answer determines which quantity is zero at the transition:
| Operating point | Tank looks | Current | Achieves |
|---|---|---|---|
| \(f_s < f_0\) | capacitive | leads | ZCS — zero-current turn-off |
| \(f_s = f_0\) | resistive | in phase | maximum power |
| \(f_s > f_0\) | inductive | lags | ZVS — zero-voltage turn-on |
Above resonance the current lags, so at each transition the anti-parallel diode conducts first and clamps the device's voltage to near zero before it is gated on. The device turns on with no voltage across it, so \(\tfrac12CV^2\) of output-capacitance energy is not dissipated — and that term dominates in a MOSFET.
The loss comparison. A hard-switched bridge at the same frequency, with \(E_{sw} = 1\) mJ per device:
Ninety watts recovered from a 6.5 kW converter — 1.4 percentage points of efficiency. But the real prize is not the efficiency: it is that the frequency can now be raised without the loss rising with it.
What soft switching actually buys. Set 2 established that switching loss is proportional to frequency, which capped every design:
| Consequence | Detail |
|---|---|
| Much higher \(f_s\) becomes affordable | hundreds of kHz to MHz |
| Magnetics shrink | Set 24's scaling, now without the loss penalty |
| EMI falls | sinusoidal currents, no sharp edges |
| No turn-on \(dv/dt\) | less common-mode current |
| Conduction loss rises | sinusoidal current has a higher RMS for the same average |
| Regulation needs frequency control | output varies with \(f_s\), not duty |
The last two rows are the bill. A resonant converter regulates by moving away from resonance, which means a variable switching frequency — harder to filter and harder to compensate. And the circulating current in the tank is real current, dissipating in the devices whether or not it delivers power.
Design an LLC resonant converter delivering 48 V at 1 kW from a 400 V PFC bus, with a resonant frequency of 100 kHz. Choose the turns ratio, find the equivalent AC load resistance, and size the resonant tank for \(Q = 0.4\).
Why LLC rather than a plain series resonant tank. The LLC adds the transformer's magnetising inductance as a third element:
That gives it a second, lower resonance involving \(L_r+L_m\), and between the two resonances the converter has gain above unity — so it can regulate against a falling input while staying in the ZVS region. A plain series tank can only step down.
The turns ratio. At \(f_r\) the series elements cancel and the gain is exactly unity, so the ratio is set by the nominal operating point:
Slightly above the 48 V target, which is deliberate: the converter regulates down to 48 V by operating just above \(f_r\), where the gain falls below unity and ZVS is guaranteed. Designing exactly at resonance would leave no room to reduce the output.
The equivalent AC load. The tank sees a rectifier and a filter, not a resistor, so the load must be referred through the first-harmonic approximation:
The \(8/\pi^2\) converts a square-wave rectifier load into the resistance a sinusoidal source would see delivering the same power — the same first-harmonic reasoning used throughout resonant design.
The tank, from the chosen quality factor:
The magnetising inductance sets the gain range and the ZVS current:
| \(L_m/L_r\) | Gain range | Circulating current | ZVS |
|---|---|---|---|
| 3 | wide | high | easy |
| 5 | moderate | moderate | reliable |
| 10 | narrow | low | marginal at light load |
The magnetising current is what discharges the devices' output capacitance during the dead time, so it must be large enough to do so before the next turn-on. A high ratio minimises circulating loss and risks losing ZVS at light load — where, awkwardly, there is least current available to achieve it.
Why LLC dominates modern power supplies:
| Property | Benefit |
|---|---|
| ZVS over the whole load range | switching loss nearly eliminated |
| Zero-current turn-off of the output rectifiers | no reverse recovery (Set 3) |
| Transformer leakage is used as \(L_r\) | the parasitic of Set 22 becomes a design element |
| Sinusoidal currents | low EMI, small filter |
| Runs at 100–500 kHz comfortably | small magnetics |
| Frequency-controlled | variable \(f_s\) — harder to filter |
The third row is elegant. Set 22 spent an entire problem burning the leakage inductance in a snubber; the LLC integrates it into the resonant tank as \(L_r\), so the transformer is deliberately built with a specific leakage and often needs no external inductor at all. A parasitic has become a component.
Key Formulas
| Quantity | Relation | Notes |
|---|---|---|
| CSI output current | \(I_{dc}\sqrt{2/3}\), \(I_{L1} = \frac{\sqrt6}{\pi}I_{dc}\) | Dual of the VSI voltage |
| CSI device currents | \(I_{dc}/3,\ I_{dc}/\sqrt3\) | Independent of load |
| CSI rule | overlap, never open the link | Dual of dead time |
| Multilevel device voltage | \(V_{dc}/(N-1)\) | Halved at 3 levels |
| Line voltage levels | \(2N-1\) | 5 for a 3-level bridge |
| NPC clamping diodes | \((N-1)(N-2)\) per phase | Grows quadratically |
| FC flying capacitors | \(\frac{(N-1)(N-2)}{2}\) per phase | Self-balancing |
| CHB levels | \(N = 2n_{cell}+1\) | \(12n_{cell}\) switches total |
| CHB cell count | \(n_{cell} = \hat V_{ph}/V_{cell}\) | Round up |
| Effective frequency | \(n_{cell}\times f_{device}\) | Phase-shifted carriers |
| Resonant frequency | \(f_0 = \frac{1}{2\pi\sqrt{LC}}\) | — |
| Characteristic impedance | \(Z_0 = \sqrt{L/C}\) | \(Q = Z_0/R\) |
| Switching side | \(f_s < f_0\) ZCS; \(f_s > f_0\) ZVS | ZVS usual |
| LLC turns ratio | \(n = \dfrac{V_{in}/2}{V_o}\) | Half bridge, unity gain at \(f_r\) |
| Reflected AC load | \(R_{ac} = \dfrac{8}{\pi^2}n^2R_L\) | First-harmonic approximation |
| LLC tank | \(L_r = \dfrac{QR_{ac}}{2\pi f_r},\ C_r = \dfrac{1}{2\pi f_rQR_{ac}}\) | \(L_m/L_r \approx 5\) |
Common Mistakes
Applying VSI dead time to a CSI. A CSI needs overlap — the link current must never be interrupted — Problem 1.
Using anti-parallel diodes in a CSI. Its devices must block reverse voltage, so the diodes go in series — Problem 1.
Assuming a multilevel inverter needs higher-rated devices. The whole point is that each blocks \(V_{dc}/(N-1)\) — Problem 2.
Ignoring neutral-point balancing in an NPC. The midpoint drifts under load and must be actively controlled — Problem 2.
Assuming NPC device losses are even. Inner and outer devices conduct for different intervals — Problem 2.
Rounding the CHB cell count down. Nine cells were needed for 8.55 — Problem 3.
Forgetting that CHB needs isolated sources. Twenty-seven of them, from one multi-winding transformer — Problem 3.
Comparing multilevel topologies by switch count. All three use 24 at five levels; the differences are in balancing and modularity — Problem 4.
Operating a resonant converter below resonance with MOSFETs. That gives ZCS but leaves the body diode to recover hard — above resonance for ZVS — Problem 5.
Neglecting circulating current in an LLC. The magnetising current provides ZVS and dissipates whether or not it delivers power — Problem 6.
That completes Part 4. Five sets built the inverter from a single H-bridge to a 19-level medium-voltage drive. The recurring lesson was that the two-level bridge's limits are all attacked by adding structure: a dual link element, series cells, or a resonant tank. And the recurring number was 31.08% — the distortion of a 120° quasi-square wave, which appeared as a rectifier's current, an inverter's voltage and a CSI's current, because they are all the same waveform seen from different terminals.
Every converter in Parts 2 to 4 has had a DC stage: rectify then invert, or rectify then chop. Some applications need neither — they need to change an AC voltage's magnitude or frequency directly, with no intermediate storage. Doing that with thyristors gives the simplest converter in this book and one of the worst waveforms; doing it with self-commutating switches gives one of the most elegant and one of the least used.
Next: Part 5 begins with Set 30 — AC Voltage Controllers, where phase control is applied directly to an AC waveform, the extinction angle returns for an inductive load, integral cycle control trades harmonics for flicker, and a soft starter is designed for a 30 kW motor — along with the reason it is not a substitute for a drive.