Network Theorems Notes for GATE Electrical Engineering (EE)

Kirchhoff’s Laws

Kirchhoff’s Current Law (KCL)

Statement

The algebraic sum of currents entering a node is zero.

Mathematical Form:

\[\sum_{k=1}^{n} I_k = 0\]

Alternative Form:

\[\sum I_{in} = \sum I_{out}\]

Physical Basis: Conservation of charge

Currents entering or leaving the node
Currents entering or leaving the node

Example: \(I_1 - I_2 - I_3 - I_4 = 0\)

GATE Tip

Sign convention: Current entering = +ve, Current leaving = -ve

Kirchhoff’s Voltage Law (KVL)

Statement

The algebraic sum of voltages around any closed loop is zero.

Mathematical Form:

\[\sum_{k=1}^{n} V_k = 0\]

Physical Basis: Conservation of energy

Steps:

  1. Choose loop direction

  2. Apply sign convention

  3. Write KVL equation

Voltage in a closed loop as per KVL
Voltage in a closed loop as per KVL

Example: \(V_s - I R_1 - I R_2 = 0\)

GATE Tip

Voltage rise = +ve, Voltage drop = -ve (or vice versa, be consistent)

Circuit Analysis Methods

Nodal Analysis

Procedure

  1. Select reference node (ground)

  2. Assign node voltages

  3. Apply KCL at each non-reference node

  4. Solve simultaneous equations

For node with voltage \(V_n\):

\[\sum \dfrac{V_n - V_{adjacent}}{R_{connecting}} = I_{sources}\]

Supernode: When voltage source connects two non-reference nodes

\[V_2 - V_1 = V_s \text{ (constraint equation)}\]

When to Use

  • More current sources than voltage sources

  • Number of nodes < Number of meshes

  • Circuits with supernodes

GATE Formula: For n nodes, write (n-1) KCL equations

Mesh Analysis

Procedure

  1. Identify independent meshes

  2. Assign mesh currents (clockwise)

  3. Apply KVL to each mesh

  4. Solve simultaneous equations

For mesh with current \(I_m\):

\[\sum R_{self} \cdot I_m - \sum R_{mutual} \cdot I_{adjacent} = \sum V_{sources}\]

Supermesh: When current source is common to two meshes

\[I_1 - I_2 = I_s \text{ (constraint equation)}\]

When to Use

  • More voltage sources than current sources

  • Number of meshes < Number of nodes

  • Planar circuits only

GATE Formula: For planar circuit: Meshes = Branches - Nodes + 1

Network Theorems

Superposition Theorem

Statement

In a linear circuit with multiple sources, the response is the algebraic sum of responses due to individual sources acting alone.

Procedure

  1. Consider one source at a time

  2. Replace other voltage sources with short circuits

  3. Replace other current sources with open circuits

  4. Calculate response due to active source

  5. Repeat for all sources

  6. Add all responses algebraically

GATE Important

  • Applicable only to LINEAR circuits

  • Power cannot be calculated using superposition

  • Dependent sources remain active

  • \(P_{total} \neq P_1 + P_2 + ... + P_n\)

Thevenin’s Theorem

Statement

Any linear two-terminal network can be replaced by a voltage source \(V_{th}\) in series with resistance \(R_{th}\).

Steps:

  1. Remove load resistance

  2. Find \(V_{th}\) = Open circuit voltage

  3. Find \(R_{th}\):

    • Kill independent sources

    • Look back into terminals

    • For dependent sources: \(R_{th} = \dfrac{V_{test}}{I_{test}}\)

  4. Draw Thevenin equivalent

Thevenin equivalent circuit
Thevenin equivalent circuit

GATE Tip

Alternative method: \(R_{th} = \dfrac{V_{oc}}{I_{sc}}\) (open circuit voltage / short circuit current)

Norton’s Theorem

Statement

Any linear two-terminal network can be replaced by a current source \(I_N\) in parallel with resistance \(R_N\).

Steps:

  1. Remove load resistance

  2. Find \(I_N\) = Short circuit current

  3. Find \(R_N = R_{th}\)

  4. Draw Norton equivalent

Source Transformation:

\[I_N = \dfrac{V_{th}}{R_{th}}\]
\[R_N = R_{th}\]
\[V_{th} = I_N \cdot R_N\]

Norton equivalent circuit
Norton equivalent circuit

GATE Important

Norton and Thevenin are dual theorems. Use Norton when current calculation is easier.

Maximum Power Transfer Theorem

Statement

Maximum power is transferred to load when load resistance equals source resistance.

Condition: \(R_L = R_{th}\)

Maximum Power:

\[P_{max} = \dfrac{V_{th}^2}{4R_{th}}\]

Load Current:

\[I_L = \dfrac{V_{th}}{2R_{th}}\]

Efficiency at Maximum Power:

\[\eta = \dfrac{P_L}{P_{total}} = 50\%\]

Thevenin’s circuit with load resistor
Thevenin’s circuit with load resistor
Power vs Load Resistance
Power vs Load Resistance

GATE Note

For AC circuits: \(Z_L = Z_{th}^*\) (complex conjugate matching)

Additional Important Theorems

Reciprocity Theorem

Statement

In a linear, bilateral network, if a voltage source in branch A produces current in branch B, then the same voltage source in branch B will produce the same current in branch A.

Mathematical Form:

\[\dfrac{I_2}{V_1} = \dfrac{I_1}{V_2}\]

Transfer Impedance:

\[Z_{12} = \dfrac{V_1}{I_2} = \dfrac{V_2}{I_1} = Z_{21}\]

Conditions

  • Linear network

  • Bilateral elements (R, L, C)

  • No dependent sources

  • Same frequency for AC analysis

GATE Application: Useful in analyzing two-port networks and transmission lines.

Millman’s Theorem

Statement

Used to find voltage across parallel branches with different voltage sources.

Formula:

\[V = \dfrac{\sum \dfrac{V_k}{R_k}}{\sum \dfrac{1}{R_k}} = \dfrac{\sum G_k V_k}{\sum G_k}\]

where \(V_k\) are source voltages, \(R_k\) are branch resistances, and \(G_k = \dfrac{1}{R_k}\) (conductance).

An example circuit
An example circuit

GATE Tip: Very useful for parallel voltage divider circuits and finding common voltage.

Compensation Theorem

Statement

When impedance in any branch changes from \(Z_1\) to \(Z_2\), the change in current can be calculated by considering a compensating voltage source.

Compensating Voltage:

\[V_c = I_1(Z_2 - Z_1)\]

where \(I_1\) is the original current through the branch.

Change in Current:

\[\Delta I = \dfrac{V_c}{Z_{th} + Z_2}\]

Applications

  • Fault analysis in power systems

  • Incremental analysis of circuits

  • Sensitivity analysis

  • Finding change in circuit parameters

GATE Usage: Useful for analyzing the effect of component variations on circuit behavior.

Substitution Theorem

Statement

Any branch in a network can be replaced by an equivalent branch that has the same voltage across it and current through it.

Equivalent Replacements:

  • Voltage source = Branch voltage (\(V_s = V_{branch}\))

  • Current source = Branch current (\(I_s = I_{branch}\))

  • Impedance = \(Z_{eq} = \dfrac{V_{branch}}{I_{branch}}\)

GATE Application

Very useful for:

  • Simplifying complex circuits

  • Finding equivalent circuits

  • Network reduction techniques

  • Analyzing one part of circuit independently

Note: The rest of the circuit behavior remains unchanged.

Tellegen’s Theorem

Statement

In any lumped network, the sum of instantaneous powers delivered to all branches is zero.

Mathematical Form:

\[\sum_{k=1}^{n} v_k(t) \cdot i_k(t) = 0\]

Physical Interpretation: Total power generated = Total power consumed

Applications

  • Power balance verification

  • Network analysis validation

  • Fundamental theorem for all network theorems

  • Circuit simulation algorithms

GATE Importance

Tellegen’s theorem is the most fundamental theorem - all other network theorems can be derived from it.

Star-Delta Transformation

Statement

Any three-terminal star (Y) network can be transformed to equivalent delta (\(\Delta\)) network and vice versa.

Star to Delta:

\[R_a = \dfrac{R_1 R_2 + R_2 R_3 + R_3 R_1}{R_3}\]
\[R_b = \dfrac{R_1 R_2 + R_2 R_3 + R_3 R_1}{R_1}\]
\[R_c = \dfrac{R_1 R_2 + R_2 R_3 + R_3 R_1}{R_2}\]

General Form:

\[R_{ab} = \dfrac{\text{Sum of products}}{\text{Opposite Star resistance}}\]

Delta to Star:

\[R_1 = \dfrac{R_b R_c}{R_a + R_b + R_c}\]
\[R_2 = \dfrac{R_a R_c}{R_a + R_b + R_c}\]
\[R_3 = \dfrac{R_a R_b}{R_a + R_b + R_c}\]

General Form:

\[R_n = \dfrac{\text{Product of adjacent }~ \Delta \text{resistances}}{\text{Sum of all }~\Delta ~\text{resistances}}\]

GATE Tip

For equal resistances: \(R_Y = \dfrac{R_\Delta}{3}\) and \(R_\Delta = 3R_Y\)

Advanced Concepts

Dependent Sources and Network Theorems

Key Points

  • Dependent sources are never killed/deactivated

  • They remain active during Thevenin/Norton analysis

  • Superposition: Only independent sources are considered one at a time

  • For \(R_{th}\) with dependent sources: Apply test voltage/current method

Test Source Method:

  1. Kill all independent sources

  2. Apply test voltage \(V_t\) (or current \(I_t\))

  3. Calculate resulting current \(I_t\) (or voltage \(V_t\))

  4. \(R_{th} = \dfrac{V_t}{I_t}\)

GATE Common Error

Students often try to kill dependent sources - this is incorrect!

AC Circuit Analysis

Impedance Form

All theorems apply to AC circuits using complex impedances:

  • Resistance \(R ~\to\) Impedance \(Z\)

  • DC voltage/current \(\to\) Phasor voltage/current

  • \(R_{th}\) becomes \(Z_{th}\)

Maximum Power Transfer (AC):

\[Z_L = Z_{th}^*\]
\[P_{max} = \dfrac{|V_{th}|^2}{4 \cdot \text{Re}(Z_{th})}\]

Phasor Analysis:

  • Use \(j\omega L\) for inductors

  • Use \(\dfrac{1}{j\omega C}\) for capacitors

  • All calculations in complex domain

GATE Tip

For purely resistive loads: \(R_L = |Z_{th}|\) for maximum power transfer

Quick Reference

GATE Quick Reference Card

Key Formulas

  • KCL: \(\sum I = 0\) at any node

  • KVL: \(\sum V = 0\) around any loop

  • Thevenin: \(V_{th}\) (open circuit), \(R_{th}\) (kill sources or \(V_{oc}/I_{sc}\))

  • Norton: \(I_N\) (short circuit), \(R_N = R_{th}\)

  • Max Power: \(R_L = R_{th}\), \(P_{max} = \dfrac{V_{th}^2}{4R_{th}}\), \(\eta = 50\%\)

  • Millman: \(V = \dfrac{\sum G_k V_k}{\sum G_k}\)

  • Star-Delta: \(R_Y = \dfrac{R_\Delta}{3}\) (equal resistances)

Method Selection

  • Nodal: More current sources, fewer nodes

  • Mesh: More voltage sources, planar circuit

  • Thevenin/Norton: Load analysis, source equivalents

  • Superposition: Multiple sources, linear circuits

  • Star-Delta: Non-planar circuits, bridge circuits

Common GATE Problem Types

Numerical Problems

  1. Direct Application: Find current/voltage using specific theorem

  2. Equivalent Circuits: Thevenin/Norton equivalents

  3. Maximum Power: Load resistance and power calculations

  4. Comparative Analysis: Which method is most efficient?

  5. Mixed Circuits: AC and DC sources, dependent sources

  6. Network Simplification: Using multiple theorems

Common GATE Mistakes

  • Killing dependent sources in Thevenin analysis

  • Using superposition for power calculations

  • Wrong sign conventions in KCL/KVL

  • Forgetting complex conjugate in AC maximum power transfer

  • Not considering all constraint equations in supernode/supermesh

Time-Saving Techniques

Quick Methods

  • Voltage Divider: \(V_R = V_s \dfrac{R}{R_{total}}\)

  • Current Divider: \(I_R = I_s \dfrac{R_{other}}{R + R_{other}}\)

  • Source Transformation: Convert between voltage and current sources

  • Series/Parallel Combinations: Simplify before applying theorems

  • Symmetry: Use circuit symmetry to reduce calculations

GATE Strategy

  • Identify the quickest method first (30 seconds)

  • Check if answer choices give clues about approach

  • Use approximations when exact values aren’t needed

  • Verify answers using alternative methods if time permits

Memory Aids

Mnemonics

  • KCL: "Current In = Current Out"

  • KVL: "Voltage Rises = Voltage Falls"

  • Thevenin: "Open circuit voltage, Kill sources for resistance"

  • Norton: "Short circuit current, Same resistance"

  • Max Power: "Match the load, Get half efficiency"

  • Superposition: "One source at a time, others killed"

Quick Checks

  • Power balance: \(\sum P_{generated} = \sum P_{consumed}\)

  • Dimension analysis: Check units in final answer

  • Limiting cases: What happens when \(R \to 0\) or \(R \to \infty\)?

  • Symmetry: Equal components should have equal currents/voltages