Operational Amplifiers - Basics
Operational Amplifier (Op-Amp) Introduction
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High-gain differential amplifier with very high input impedance
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Ideal Op-Amp characteristics:
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Infinite open-loop gain (\(A_0 = \infty\))
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Infinite input impedance (\(Z_i = \infty\))
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Zero output impedance (\(Z_0 = 0\))
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Infinite bandwidth
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Zero offset voltage
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Two inputs: Inverting (-) and Non-inverting (+)
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Output: \(V_0 = A_0(V_+ - V_-)\)
Op-Amp Parameters - Real vs Ideal
Real Op-Amp:
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Open-loop gain: \(10^4\) to \(10^6\)
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Input impedance: \(10^6\) to \(10^{12}\) \(\Omega\)
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Output impedance: 10 to 100 \(\Omega\)
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Bandwidth: Limited
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Offset voltage: 1-10 mV
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Slew rate: 0.1 to 100 V/\(\mu\)s
Key Parameters:
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CMRR: 80-120 dB
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Input bias current: 10 pA to 1 \(\mu\)A
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Input offset current
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Power supply rejection ratio (PSRR)
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Gain-bandwidth product (GBW)
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Temperature drift
Op-Amp Non-Idealities and Compensation
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Input Offset Voltage (\(V_{OS}\)):
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Causes DC error at output
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Compensation: External potentiometer or chopper stabilization
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Input Bias Current (\(I_B\)):
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\(I_B = \dfrac{I_{B+} + I_{B-}}{2}\)
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Compensation: Equal source resistances
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Input Offset Current (\(I_{OS}\)):
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\(I_{OS} = |I_{B+} - I_{B-}|\)
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Creates additional DC error
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Temperature Drift: \(\Delta V_{OS}/\Delta T\) (typically \(10-50~\mu V/^{\circ}C\))
Op-Amp Configurations
Inverting Amplifier
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Gain: \(A_v = -\dfrac{R_f}{R_i}\)
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Input impedance: \(Z_i = R_i\)
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Output impedance: \(Z_o \approx 0\)
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Virtual short concept: \(V_+ = V_- = 0\) (for ideal op-amp)
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Bandwidth: \(BW = \dfrac{GBW}{|A_v|}\)
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DC Error Analysis:
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Due to \(V_{OS}\): \(V_{o,error} = V_{OS}(1 + \dfrac{R_f}{R_i})\)
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Due to \(I_B\): \(V_{o,error} = I_B \times R_f\)
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Non-Inverting Amplifier
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Gain: \(A_v = 1 + \dfrac{R_f}{R_i}\)
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Input impedance: Very high (ideally infinite)
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Output impedance: \(Z_o \approx 0\)
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Minimum gain = 1 (unity gain buffer)
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Better input characteristics than inverting amplifier
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DC Error Analysis:
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Due to \(V_{OS}\): \(V_{o,error} = V_{OS}(1 + \dfrac{R_f}{R_i})\)
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Compensation resistor: \(R_c = R_i || R_f\)
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Other Op-Amp Configurations
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Voltage Follower (Buffer):
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Gain = 1, very high input impedance
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Used for impedance matching
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Summing Amplifier:
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\(V_o = -R_f(\dfrac{V_1}{R_1} + \dfrac{V_2}{R_2} + \dfrac{V_3}{R_3})\)
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Difference Amplifier:
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\(V_o = \dfrac{R_f}{R_i}(V_2 - V_1)\) (for balanced resistor ratios)
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Instrumentation Amplifier:
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High CMRR, high input impedance
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Used in precision measurements
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Integrator and Differentiator
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Integrator:
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\(V_o = -\dfrac{1}{RC}\int V_{in} dt\)
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Transfer function: \(H(s) = -\dfrac{1}{sRC}\)
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DC gain = \(\infty\), requires bias resistor
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Applications: Analog computers, waveform generation
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Differentiator:
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\(V_o = -RC\dfrac{dV_{in}}{dt}\)
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Transfer function: \(H(s) = -sRC\)
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Susceptible to noise, requires input resistor
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Applications: Edge detection, wave shaping
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Feedback Amplifiers
Feedback Amplifier Fundamentals
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Closed-loop gain: \(A_f = \dfrac{A}{1 + A\beta}\)
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Loop gain: \(A\beta\) (determines stability)
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Positive feedback: \(A\beta > 0\) (can cause oscillation)
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Negative feedback: \(A\beta < 0\) (stabilizes amplifier)
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Feedback factor: \(\beta = \dfrac{V_f}{V_o}\)
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Desensitivity factor: \(D = 1 + A\beta\)
Effects of Negative Feedback
Advantages:
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Stabilizes gain: \(\dfrac{dA_f}{dA} = \dfrac{1}{(1+A\beta)^2}\)
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Reduces distortion by factor \((1+A\beta)\)
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Increases bandwidth by factor \((1+A\beta)\)
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Improves input/output impedance
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Reduces noise
Disadvantages:
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Reduces overall gain
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Requires additional components
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Can cause instability if not properly designed
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Increased complexity
Four Types of Feedback Amplifiers
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Voltage Series (Series-Shunt):
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\(Z_{if} = Z_i(1 + A\beta)\), \(Z_{of} = \dfrac{Z_o}{1 + A\beta}\)
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Example: Non-inverting op-amp
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Current Series (Series-Series):
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\(Z_{if} = Z_i(1 + A\beta)\), \(Z_{of} = Z_o(1 + A\beta)\)
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Voltage Shunt (Shunt-Shunt):
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\(Z_{if} = \dfrac{Z_i}{1 + A\beta}\), \(Z_{of} = \dfrac{Z_o}{1 + A\beta}\)
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Example: Inverting op-amp
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Current Shunt (Shunt-Series):
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\(Z_{if} = \dfrac{Z_i}{1 + A\beta}\), \(Z_{of} = Z_o(1 + A\beta)\)
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Feedback Amplifier Analysis Method
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Step 1: Identify feedback topology
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Step 2: Find open-loop parameters \(A\), \(Z_i\), \(Z_o\)
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Step 3: Calculate feedback factor \(\beta\)
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Step 4: Determine loop gain \(A\beta\)
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Step 5: Calculate closed-loop parameters
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Loading effects:
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Input loading: \(A' = A \times \dfrac{Z_i}{Z_i + Z_s}\)
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Output loading: \(A'' = A' \times \dfrac{Z_L}{Z_o + Z_L}\)
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Oscillators
Oscillator Fundamentals
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Oscillator: Circuit that generates periodic waveforms without external input
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Barkhausen Criteria for Oscillation:
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Loop gain \(|A\beta| = 1\)
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Phase shift around loop = \(0^{\circ}\) or \(360^{\circ}\)
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Oscillation condition: \(A\beta = 1 \angle 0^{\circ}\)
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Startup condition: \(|A\beta| > 1\) initially
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Steady state: \(|A\beta| = 1\) (amplitude limiting)
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Frequency of oscillation: Determined by phase shift network
Types of Oscillators
Sinusoidal Oscillators:
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RC Oscillators
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LC Oscillators
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Crystal Oscillators
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Negative resistance oscillators
Non-Sinusoidal Oscillators:
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Relaxation oscillators
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Astable multivibrators
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Monostable multivibrators
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Bistable multivibrators
RC Oscillators
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Phase Shift Oscillator:
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Uses RC network providing \(180^{\circ}\) phase shift
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Op-amp provides additional \(180^{\circ}\) shift
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Frequency: \(f = \dfrac{1}{2\pi RC\sqrt{6}}\)
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Gain required: \(A = 29\) minimum
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Wien Bridge Oscillator:
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Uses Wien bridge network
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Frequency: \(f = \dfrac{1}{2\pi RC}\)
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Gain required: \(A = 3\) minimum
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Better frequency stability
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Amplitude stabilization using AGC
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LC Oscillators
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Hartley Oscillator:
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Uses tapped inductor
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Frequency: \(f = \dfrac{1}{2\pi\sqrt{L_T C}}\)
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\(L_T = L_1 + L_2 + 2M\) (where M is mutual inductance)
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Good frequency stability
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Colpitts Oscillator:
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Uses capacitive voltage divider
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Frequency: \(f = \dfrac{1}{2\pi\sqrt{LC_T}}\)
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\(C_T = \dfrac{C_1 C_2}{C_1 + C_2}\)
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Better frequency stability than Hartley
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Clapp Oscillator:
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Modified Colpitts with series capacitor
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Frequency: \(f = \dfrac{1}{2\pi\sqrt{LC_3}}\) (approximately)
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Excellent frequency stability
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Crystal Oscillators
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Piezoelectric effect: Mechanical stress produces electrical charge
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Equivalent circuit: Series RLC with parallel capacitance
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Two resonant frequencies:
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Series resonance: \(f_s = \dfrac{1}{2\pi\sqrt{LC}}\)
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Parallel resonance: \(f_p = \dfrac{1}{2\pi\sqrt{L(C + C_p)}}\)
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Advantages:
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Very high Q factor (10,000 to 100,000)
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Excellent frequency stability (\(\pm 10\) ppm)
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Low temperature coefficient
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Applications: Clock generators, frequency standards
Negative Resistance Oscillators
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Principle: Use devices with negative resistance characteristics
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Oscillation condition: \(R_{neg} + R_{pos} = 0\)
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Tunnel Diode Oscillator:
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Exhibits negative resistance in certain region
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Very high frequency operation possible
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Low power consumption
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Gunn Diode Oscillator:
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Microwave frequency oscillator
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Based on Gunn effect in GaAs
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Frequency: 1-100 GHz
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Applications: Microwave oscillators, high-frequency sources
Multivibrators
Multivibrator Types
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Astable Multivibrator:
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No stable state, continuously oscillates
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Generates square/rectangular waves
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Period: \(T = 0.693(R_1 + R_2)C_1 + 0.693R_2C_2\)
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Duty cycle: \(D = \dfrac{t_{ON}}{T}\)
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Monostable Multivibrator:
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One stable state, triggered to quasi-stable state
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Pulse width: \(t_p = 0.693RC\)
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Used for pulse generation and timing
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Bistable Multivibrator (Flip-Flop):
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Two stable states
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Triggered between states
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Memory element
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555 Timer IC
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Internal components:
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Two comparators, SR latch, discharge transistor
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Voltage divider providing reference voltages (\(V_{CC}/3\), \(2V_{CC}/3\))
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Astable Mode:
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Frequency: \(f = \dfrac{1.44}{(R_1 + 2R_2)C}\)
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Duty cycle: \(D = \dfrac{R_1 + R_2}{R_1 + 2R_2}\)
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\(t_{HIGH} = 0.693(R_1 + R_2)C\)
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\(t_{LOW} = 0.693R_2C\)
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Monostable Mode:
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Pulse width: \(t_p = 1.1RC\)
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Triggered by negative edge on trigger pin
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Applications: Timing circuits, PWM generation, frequency division
Waveform Generators
Function Generator Circuits
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Triangular Wave Generator:
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Integrator + Schmitt trigger combination
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Frequency: \(f = \dfrac{1}{4RC}\) (for symmetric output)
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Slope: \(\dfrac{dV}{dt} = \dfrac{V_{sat}}{RC}\)
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Sawtooth Wave Generator:
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Uses constant current source for linear ramp
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Reset transistor for flyback
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Applications: CRO timebase, ADC ramp
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Square Wave from Triangular:
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Use comparator with reference
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Adjustable duty cycle possible
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Voltage-Controlled Oscillator (VCO)
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Principle: Output frequency varies with input voltage
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Implementation methods:
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Varactor diode in LC tank
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Current-controlled integrator
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Voltage-controlled delay line
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Key parameters:
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Sensitivity: \(K_o = \dfrac{df}{dV}\) (Hz/V)
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Linear range
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Output frequency range
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Applications:
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Phase-locked loops (PLL)
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Frequency modulation
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Frequency synthesis
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Frequency Response and Stability
Frequency Response of Op-Amps
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Open-loop gain: Decreases at -20 dB/decade after unity gain frequency
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Gain-Bandwidth Product (GBW): Constant for given op-amp
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Unity gain frequency: \(f_t = A_0 \times f_0\)
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Closed-loop bandwidth: \(BW = \dfrac{GBW}{|A_f|}\)
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Slew rate: Maximum rate of change of output voltage
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\(SR = \dfrac{dV_o}{dt}_{max}\)
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Causes distortion in high-frequency signals
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Full power bandwidth: \(f_{FP} = \dfrac{SR}{2\pi V_m}\)
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Stability Analysis
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Nyquist Stability Criterion:
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System stable if Nyquist plot doesn’t encircle (-1, 0)
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Critical for feedback amplifier design
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Phase Margin: \(PM = 180^{\circ} - \phi\) at gain crossover frequency
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Gain Margin: \(GM = -|A\beta|\) at phase crossover frequency
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Stability criteria:
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\(PM > 45^{\circ}\) for good stability
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\(GM > 6\) dB for good stability
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Compensation techniques:
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Dominant pole compensation
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Lead/lag compensation
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Miller compensation
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Active Filters
Active Filter Advantages
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Advantages over passive filters:
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No loading effects
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Gain possible
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No inductors required
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Better isolation
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Easy to tune
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First-order filter responses:
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Low-pass: \(H(s) = \dfrac{K}{1 + sRC}\), \(f_c = \dfrac{1}{2\pi RC}\)
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High-pass: \(H(s) = \dfrac{sRC}{1 + sRC}\), \(f_c = \dfrac{1}{2\pi RC}\)
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Roll-off: 20 dB/decade
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Second-Order Active Filters
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Sallen-Key Low-Pass:
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\(H(s) = \dfrac{K}{s^2 + s\omega_0/Q + \omega_0^2}\)
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\(\omega_0 = \dfrac{1}{\sqrt{R_1 R_2 C_1 C_2}}\)
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\(Q = \dfrac{\sqrt{R_1 R_2 C_1 C_2}}{R_1 C_2 + R_2 C_2(1-K)}\)
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Multiple Feedback (MFB) Low-Pass:
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Uses inverting op-amp configuration
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Better for high-Q applications
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Band-Pass Filter:
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\(H(s) = \dfrac{K s\omega_0/Q}{s^2 + s\omega_0/Q + \omega_0^2}\)
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Gain at center frequency: \(K\)
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Bandwidth: \(BW = \dfrac{f_0}{Q}\)
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Filter Design Considerations
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Filter approximations:
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Butterworth: Maximally flat passband
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Chebyshev: Equiripple in passband
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Elliptic: Equiripple in both bands
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Quality factor (Q):
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\(Q = \dfrac{f_0}{BW}\) for band-pass
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Higher Q = sharper cutoff
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Stability concerns for high Q
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Sensitivity:
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\(S_x^F = \dfrac{x}{F}\dfrac{\partial F}{\partial x}\)
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Lower sensitivity = better performance
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Comparators and Schmitt Triggers
Comparators
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Function: Compares two analog voltages, outputs digital signal
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Op-amp as comparator:
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Open-loop configuration
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Output saturates to \(\pm V_{sat}\)
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Very sensitive to noise
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Slow switching due to saturation
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Dedicated comparator ICs:
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Faster switching than op-amps
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Better suited for digital interface
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Examples: LM311, LM393
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Open-collector outputs
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Window comparator: Detects if input is within specified range
Schmitt Trigger
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Purpose: Provides hysteresis to reduce noise sensitivity
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Inverting Schmitt Trigger:
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\(V_{TH} = +\dfrac{R_1}{R_1 + R_2}V_{sat}\) (Upper threshold)
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\(V_{TL} = -\dfrac{R_1}{R_1 + R_2}V_{sat}\) (Lower threshold)
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Hysteresis: \(V_H = V_{TH} - V_{TL} = \dfrac{2R_1 V_{sat}}{R_1 + R_2}\)
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Non-inverting Schmitt Trigger:
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Different threshold calculations
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Opposite switching behavior
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Applications: Noise immunity, waveform squaring, oscillators
Precision Rectifiers and Peak Detectors
Precision Rectifiers
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Need: Eliminate forward voltage drop of diodes
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Half-wave precision rectifier:
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Uses op-amp to overcome diode drop
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Output follows input for positive half-cycle
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Zero output for negative half-cycle
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Full-wave precision rectifier:
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Rectifies both half-cycles
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Two op-amp design for better performance
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Output: \(V_o = |V_i|\)
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Applications:
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AC-DC conversion
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RMS-to-DC conversion
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Signal processing
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Peak Detectors
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Function: Captures and holds peak value of input signal
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Basic peak detector:
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Op-amp + diode + capacitor
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Charges capacitor to peak input voltage
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Holds peak value when input decreases
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Precision peak detector:
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Uses op-amp to eliminate diode drop
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Better accuracy for small signals
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Faster response time
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Reset mechanism:
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MOSFET switch to discharge capacitor
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Allows detection of new peaks
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Applications:
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Peak voltage measurement
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Envelope detection
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Signal analysis
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Sample-and-Hold Circuits
Sample-and-Hold (S/H) Circuits
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Purpose: Capture and hold analog signal value at specific time
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Basic S/H circuit:
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Analog switch + hold capacitor + buffer amplifier
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Sample mode: Switch closed, capacitor charges to input
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Hold mode: Switch open, capacitor holds voltage
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Key parameters:
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Acquisition time: Time to charge capacitor to final value
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Droop rate: Rate of voltage decay during hold
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Feedthrough: Coupling from input to output during hold
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Aperture time: Delay between command and actual switching
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Applications:
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ADC front-end
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Data acquisition systems
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Signal processing
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Analog-to-Digital Converters
ADC Fundamentals
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Quantization: Converting continuous analog signal to discrete digital values
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Resolution: Number of bits determines quantization levels
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n-bit ADC has \(2^n\) levels
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LSB = \(\dfrac{V_{ref}}{2^n}\)
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Quantization error: \(\pm \dfrac{LSB}{2}\)
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Key specifications:
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Resolution (bits)
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Conversion time
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Sampling rate
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Accuracy (INL, DNL)
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Signal-to-noise ratio (SNR)
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ADC Types
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Flash ADC:
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Parallel comparison with \(2^n - 1\) comparators
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Fastest conversion time
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High power consumption
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Limited to low resolution (6-8 bits)
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Successive Approximation (SAR) ADC:
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Binary search algorithm
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Conversion time: n clock cycles
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Moderate speed and power
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Most common type (8-18 bits)
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Dual-slope ADC:
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Integrating type converter
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High accuracy, noise rejection
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Slow conversion time
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Used in digital multimeters
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ADC Errors and Specifications
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Integral Non-Linearity (INL):
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Deviation from ideal transfer function
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Measured in LSB units
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Differential Non-Linearity (DNL):
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Variation in code width from ideal 1 LSB
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DNL > 1 LSB causes missing codes
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Offset Error: DC shift in transfer function
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Gain Error: Slope error in transfer function
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Aperture Jitter: Timing uncertainty in sampling
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Effective Number of Bits (ENOB):
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\(ENOB = \dfrac{SNR - 1.76}{6.02}\)
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Accounts for all noise sources
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Digital-to-Analog Converters
DAC Fundamentals
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Function: Convert digital code to analog voltage/current
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Transfer function: \(V_o = V_{ref} \times \dfrac{D}{2^n}\)
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Key specifications:
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Resolution (bits)
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Settling time
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Accuracy (INL, DNL)
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Monotonicity
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Glitch energy
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DAC types:
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R-2R ladder
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Weighted resistor
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Current steering
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Delta-sigma
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R-2R Ladder DAC
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Advantages:
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Only two resistor values required
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Good accuracy with matched resistors
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Easy to implement in IC form
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Operation:
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Binary switches connect to \(V_{ref}\) or ground
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Current division by factor of 2 at each node
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MSB contributes most current
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Output current: \(I_o = \dfrac{V_{ref}}{2R} \times \dfrac{D}{2^n}\)
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Disadvantages:
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Switch resistance affects accuracy
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Glitches during code transitions
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Phase-Locked Loop (PLL)
PLL Fundamentals
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Function: Synchronize output frequency to input frequency
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Basic PLL blocks:
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Phase Detector (PD)
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Loop Filter (LF)
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Voltage-Controlled Oscillator (VCO)
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Operation modes:
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Free-running: No input signal
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Acquisition: Trying to lock to input
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Locked: Output frequency = Input frequency
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Lock range: Frequency range where PLL can maintain lock
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Capture range: Frequency range where PLL can acquire lock
PLL Analysis
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Loop gain: \(K = K_d \times K_v \times F(s)\)
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Closed-loop transfer function:
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\(H(s) = \dfrac{K \times F(s)}{s + K \times F(s)}\)
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First-order PLL: \(F(s) = 1\)
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\(H(s) = \dfrac{K}{s + K}\)
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Always stable
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Type 1 system (zero steady-state error for step input)
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Second-order PLL: \(F(s) = \dfrac{s + a}{s}\)
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\(H(s) = \dfrac{K(s + a)}{s^2 + Ks + Ka}\)
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Type 2 system (zero steady-state error for ramp input)
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Stability depends on damping factor
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PLL Applications
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Frequency synthesis:
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Divide-by-N counter in feedback
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Output frequency = N × Input frequency
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Fractional-N synthesis for fine resolution
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Clock recovery:
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Extract clock from data stream
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Used in digital communication
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Frequency modulation/demodulation:
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VCO output follows input frequency variations
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Control voltage represents demodulated signal
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Motor speed control:
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Maintain constant motor speed
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Feedback from tachometer
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Power Amplifiers
Power Amplifier Classes
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Class A:
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Conducts for full cycle (\(360^{\circ}\))
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Low distortion, low efficiency ( 25%)
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High heat dissipation
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Class B:
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Conducts for half cycle (\(180^{\circ}\))
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Push-pull configuration required
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Efficiency 78.5%, crossover distortion
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Class AB:
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Conducts for more than \(180^{\circ}\) but less than \(360^{\circ}\)
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Compromise between Class A and B
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Efficiency 50-70%, reduced crossover distortion
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Class C:
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Conducts for less than \(180^{\circ}\)
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High efficiency ( 80%), high distortion
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Used in RF applications with tuned loads
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Power Amplifier Design Considerations
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Thermal management:
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Heat sinks for power dissipation
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Thermal resistance calculations
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Temperature-dependent biasing
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Protection circuits:
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Short-circuit protection
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Over-temperature protection
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Current limiting
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Efficiency: \(\eta = \dfrac{P_{out}}{P_{in}} \times 100\%\)
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Total Harmonic Distortion (THD):
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\(THD = \dfrac{\sqrt{V_2^2 + V_3^2 + V_4^2 + ...}}{V_1} \times 100\%\)
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Measure of signal quality
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GATE Problems and Solutions
Typical GATE Problems - Op-Amps
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Problem 1: Find gain of inverting amplifier with \(R_f = 100k\Omega\), \(R_i = 10k\Omega\)
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Solution: \(A_v = -\dfrac{R_f}{R_i} = -\dfrac{100k}{10k} = -10\)
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Problem 2: Calculate bandwidth of non-inverting amplifier with gain = 20 and GBW = \(1 ~\mathrm{MHz}\)
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Solution: \(BW = \dfrac{GBW}{|A_v|} = \dfrac{1~\mathrm{MHz}}{20} = 50kHz\)
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Problem 3: Find oscillation frequency of Wien bridge oscillator with \(R = 10~\mathrm{k\Omega}\), \(C = 100~\mathrm{nF}\)
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Solution: \(f = \dfrac{1}{2\pi RC} = \dfrac{1}{2\pi \times 10k \times 100n} = 159.2 Hz\)
Typical GATE Problems - Oscillators
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Problem 1: Phase shift oscillator with \(R = 1~\mathrm{k\Omega}\), \(C = 1~\mathring{\mu F}\)
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Solution: \(f = \dfrac{1}{2\pi RC\sqrt{6}} = \dfrac{1}{2\pi \times 1k \times 1\mu \times \sqrt{6}} = 65.0 Hz\)
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Problem 2: Find minimum gain for oscillation in phase shift oscillator
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Solution: Minimum gain = 29
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Problem 3: Colpitts oscillator with \(L = 100~\mu H\), \(C_1 = C_2 = 100~\mathrm{pF}\)
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Solution: \(C_T = \dfrac{C_1 C_2}{C_1 + C_2} = 50~\mathrm{pF}\)
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\(f = \dfrac{1}{2\pi\sqrt{LC_T}} = \dfrac{1}{2\pi\sqrt{100\mu \times 50p}} = 7.12 ~\mathrm{MHz}\)
Typical GATE Problems - Feedback
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Problem 1: Feedback amplifier with \(A = 1000\), \(\beta = 0.01\)
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Solution: \(A_f = \dfrac{A}{1 + A\beta} = \dfrac{1000}{1 + 1000 \times 0.01} = \dfrac{1000}{11} = 90.9\)
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Problem 2: Find desensitivity factor for above amplifier
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Solution: \(D = 1 + A\beta = 1 + 10 = 11\)
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Problem 3: If open-loop gain changes by \(20\%\), find change in closed-loop gain
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Solution: \(\dfrac{dA_f}{A_f} = \dfrac{1}{1 + A\beta} \times \dfrac{dA}{A} = \dfrac{1}{11} \times 0.2 = 1.8\%\)
Important Formulas Summary
Key Formulas - Op-Amps and Feedback
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Inverting amplifier: \(A_v = -\dfrac{R_f}{R_i}\)
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Non-inverting amplifier: \(A_v = 1 + \dfrac{R_f}{R_i}\)
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Feedback amplifier: \(A_f = \dfrac{A}{1 + A\beta}\)
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Bandwidth with feedback: \(BW_f = BW \times (1 + A\beta)\)
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Integrator: \(V_o = -\dfrac{1}{RC}\int V_{in} dt\)
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Differentiator: \(V_o = -RC\dfrac{dV_{in}}{dt}\)
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Voltage follower: \(A_v = 1\)
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Summing amplifier: \(V_o = -R_f\left(\dfrac{V_1}{R_1} + \dfrac{V_2}{R_2} + \dfrac{V_3}{R_3}\right)\)
Key Formulas - Oscillators
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Wien bridge: \(f = \dfrac{1}{2\pi RC}\), Gain = 3
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Phase shift: \(f = \dfrac{1}{2\pi RC\sqrt{6}}\), Gain = 29
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Hartley: \(f = \dfrac{1}{2\pi\sqrt{L_T C}}\)
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Colpitts: \(f = \dfrac{1}{2\pi\sqrt{LC_T}}\), \(C_T = \dfrac{C_1 C_2}{C_1 + C_2}\)
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555 Timer (Astable): \(f = \dfrac{1.44}{(R_1 + 2R_2)C}\)
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555 Timer (Monostable): \(t_p = 1.1RC\)
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Crystal oscillator: \(f_s = \dfrac{1}{2\pi\sqrt{LC}}\)
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Barkhausen criterion: \(|A\beta| = 1\), \(\angle A\beta = 0^{\circ}\)
Key Formulas - Filters and Converters
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First-order filter: \(f_c = \dfrac{1}{2\pi RC}\)
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Second-order filter: \(Q = \dfrac{f_0}{BW}\)
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Schmitt trigger hysteresis: \(V_H = \dfrac{2R_1 V_{sat}}{R_1 + R_2}\)
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ADC resolution: LSB = \(\dfrac{V_{ref}}{2^n}\)
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DAC output: \(V_o = V_{ref} \times \dfrac{D}{2^n}\)
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PLL (first-order): \(H(s) = \dfrac{K}{s + K}\)
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Power amplifier efficiency: \(\eta = \dfrac{P_{out}}{P_{in}} \times 100\%\)
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ENOB: \(ENOB = \dfrac{SNR - 1.76}{6.02}\)