Introduction
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FET amplifiers are preferred for:
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High input resistance
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Low noise
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Low power consumption
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Widely used in:
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Communication receivers
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Switching circuits
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Digital and analog systems
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FET vs BJT Amplifiers
FET
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Voltage-controlled
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High input impedance
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Lower gain
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Low noise
BJT
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Current-controlled
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Moderate input impedance
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Higher gain
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Better linearity
FET Amplifier Configurations
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Common-Source (CS): High voltage gain, inverted output
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Common-Drain (CD): Unity gain, no inversion (buffer)
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Common-Gate (CG): Gain with no inversion, low input impedance
Amplifier Classes with FETs
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Class A: Linear operation, low distortion
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Class B and AB: Improved efficiency
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Class C: High efficiency, used in RF
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Class D: Switching amplifier, very efficient
Note: FETs dominate in Class D due to superior switching performance
Switching and Digital Applications
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FETs are ideal for:
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Analog/digital switches
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CMOS logic circuits
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Multiplexers, switched-capacitor circuits
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Enhancement-mode MOSFETs are widely used in CMOS
FET Characteristics and Modeling
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Voltage-controlled: Gate voltage controls drain current
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Transconductance \(g_m = \frac{\Delta I_D}{\Delta V_{GS}}\)
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AC Modeling: Simpler than BJT models
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Impedance:
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Input: Very high
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Output: Comparable to BJT
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Application Areas
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Low-noise amplifiers
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RF and high-frequency designs
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Buffering and signal interfacing
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Power switching and control
THE COMMON-SOURCE AMPLIFIER
FET AC Model
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\(r_{gs}^{\prime}\) and \(r_{ds}^{\prime}\) are very high so neglected in the simplified circuit.
- The voltage gain :
Introduction to Common-Source JFET Amplifier
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A common-source JFET amplifier is characterized by:
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AC input at the gate.
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AC output from the drain.
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The source terminal is common to both.
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Source is at AC ground:
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No source resistor, or a bypassed one.
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Ensures the amplifier gain is maximized.
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Self-Biased JFET Configuration
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Circuit Overview :
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Input signal coupled via capacitor to the gate.
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\(R_G\) ensures:
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Gate is held near 0 V (since \(I_{GSS} \approx 0\)).
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Very high input resistance \(\rightarrow\) avoids loading the signal source.
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Bias voltage appears across \(R_S\), and bypass capacitor \(C_2\) ensures:
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Source is at AC ground.
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Signal Operation
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Gate-source voltage swings about its Q-point \(V_{GSQ}\).
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As \(V_{GS}\) becomes less negative, \(I_D\) increases.
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As \(I_D\) increases, \(V_D\) drops (since \(V_D = V_{DD} - I_D R_D\)).
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Result:
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\(V_{DS}\) is 180° out of phase with \(V_{GS}\).
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This is characteristic of a common-source amplifier.
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Graphical Illustration
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Transfer Characteristic Curve :
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Sinusoidal \(V_{GS}\) causes sinusoidal \(I_D\).
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Drain Curve : Signal causes Q-point to shift along the load line.
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Nonlinear nature of transfer curve causes distortion.
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Minimize distortion: Keep signal swing within a limited range on the load line.
DC Analysis – Graphical and Mathematical Approaches
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Objective: Find Q-point \((I_D, V_{GS})\)
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Graphical Method:
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Use transconductance curve.
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Plot load line: Intersection gives Q-point.
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Mathematical Method:
- Based on the relation:
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This results in a quadratic equation in \(I_D\).
AC Analysis – Equivalent Circuit
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Replace capacitors with shorts (AC coupling).
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Replace \(V_{DD}\) with AC ground.
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Resulting AC equivalent circuit:
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Drain and source both tied to AC ground.
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Gate Signal and Input Resistance
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: appears at the Almost all of
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Very high input resistance:
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Due to reverse-biased gate–source junction.
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- Total input resistance:
Voltage Gain of Common-Source Amplifier
- Voltage Gain:
- Output Voltage:
- Where:
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Important Note:
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\(V_{\text{out}}\) is 180° out of phase with \(V_{\text{in}}\)
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Hence, \(A_v\) is negative.
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Summary of Common-Source JFET Amplifier
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Advantages:
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High input resistance.
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Voltage amplification with phase inversion.
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- Key Equations
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Design Consideration:
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Ensure Q-point lies in the linear region for undistorted amplification.
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D-MOSFET Amplifier Operation
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Configuration: Zero-biased common-source n-channel D-MOSFET
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DC Conditions:
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Gate at \(0 \, \text{V dc}\)
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Source grounded \(\rightarrow\) \(V_{GS} = 0 \, \text{V} \Rightarrow I_D = I_{DSS}\)
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Signal Behavior:
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\(V_{gs}\) swings above and below 0 V
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Negative swing \(\rightarrow\) Depletion mode \(\rightarrow\) \(I_D \downarrow\)
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Positive swing \(\rightarrow\) Enhancement mode \(\rightarrow\) \(I_D \uparrow\)
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- DC Output Voltage
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AC Analysis: Same as in JFET amplifier
E-MOSFET Amplifier Operation
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Configuration: Common-source n-channel E-MOSFET with voltage-divider bias
- to ensure: Gate is
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Signal Swing :
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\(V_{gs}\) varies around \(V_{GSQ}\)
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\(I_D\) swings around \(I_{DQ}\)
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Operation stays in enhancement mode
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DC Analysis for E-MOSFET
- Gate Voltage
- Drain Current
- Drain-to-Source Voltage
AC Analysis and Input Resistance
- Voltage Gain
- AC Input Resistance
- Where:
Comparison of JFET, D-MOSFET, and E-MOSFET
Characteristic | JFET | D-MOSFET | E-MOSFET |
---|---|---|---|
Full Form | Junction Field Effect Transistor | Depletion-mode Metal-Oxide-Semiconductor FET | Enhancement-mode Metal-Oxide-Semiconductor FET |
Channel Type | Physically present (n or p) | Physically present (n or p) | Not present initially; formed by VGS |
Operation Mode | Only depletion mode | Depletion and enhancement modes | Only enhancement mode |
Gate-Source Voltage (VGS) | Negative (n-channel), Positive (p-channel) | 0, negative, or positive | Must be positive (n-channel) or negative (p-channel) |
Gate Current | Small (reverse-biased pn junction) | Very small (insulated gate) | Very small (insulated gate) |
Input Impedance | High (less than MOSFETs) | Very high | Very high |
Control Mechanism | Gate voltage controls channel width | Modulates conductivity of existing channel | Gate voltage induces channel |
Turn-on Behavior | Conducts at VGS = 0 V | Conducts at VGS = 0 V | Requires threshold VGS to turn ON |
Symbol Difference | Gate arrow touches channel | Arrow does not touch (bar in symbol) | Arrow does not touch channel |
Manufacturing Complexity | Simpler | More complex | Most complex |
Applications | Low-noise amplifiers, analog circuits | Analog and RF circuits | Digital circuits, power switching |
The Common-Drain (CD) Amplifier
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Also known as a Source-Follower (analogous to the Emitter-Follower in BJT)
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Circuit Example:
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Self-biased JFET
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\(\mathbf{C_1}/\mathbf{C_2}\): Input/Output coupling capacitor
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Key Characteristics:
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Input: Gate and Output: Source
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Drain is common to both input and output \(\rightarrow\) No drain resistor needed
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Output voltage follows input: \(V_{\text{source}} \approx V_{\text{gate}}\) (in phase)
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Voltage Gain of Source-Follower
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Observation:
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\(A_v < 1\), always slightly less
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If \(g_m R_S \gg 1\), then \(A_v \approx 1\)
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No phase inversion: Output is in-phase with input
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Input Resistance of CD Amplifier
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As in common-source configuration:
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Gate is reverse-biased \(\rightarrow\) Very high input resistance
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- Total input resistance:
- Where:
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Conclusion:
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\(R_{\text{in}}\) is typically very large, dominated by \(R_G\)
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Excellent for buffering applications due to high input, low output impedance
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The Common-Gate (CG) Amplifier
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Analogous to: Common-Base (CB) BJT amplifier
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Key Features:
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Input: Source terminal
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Output: Drain terminal
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Gate is common \(\rightarrow\) connected to ground
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Low input resistance (unlike CS and CD configurations)
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Circuit Reference:
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Self-biased configuration
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\(\mathbf{C_1}/\mathbf{C_2}\): Input/Output coupling capacitor
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Voltage Gain of CG Amplifier
- Starting from definition:
- Final expression:
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Where: \(R_d = R_D \parallel R_L\)
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Observation:
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Same gain expression as common-source amplifier
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No phase inversion (output in phase with input)
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Input Resistance of CG Amplifier
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Unlike CS and CD (which use gate as input), CG uses source as input:
- Input current
- Input voltage
- Therefore:
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Conclusion:
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Low input resistance
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Suitable for low-impedance signal sources
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Introduction to Class D Amplifier
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Uses: Primarily MOSFETs, not BJTs or linear-mode FETs
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Fundamental difference:
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Operates with switching transistors (ON/OFF)
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Not linear amplification like Class A, B, or AB
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Key advantage:
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Theoretical Efficiency:\(100\%\)
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Practical Efficiency: \(> 90\%\)
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Compared to:
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Class A: \(\sim 25\%\)
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Class B/AB: \(\sim 79\%\)
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Block Diagram:
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Pulse-width modulator → MOSFET switch stage → Low-pass filter → Speaker
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Pulse-Width Modulation (PWM)
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PWM: Converts analog input to pulses of varying width
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Wider pulse = Higher input amplitude
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Narrower pulse = Lower input amplitude
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Zero input = Square wave output
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Generated using: Comparator
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Comparator Behavior:
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Outputs high or low depending on input polarity
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Operates with a sine wave (input) and triangular wave (carrier)
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Output swings rail-to-rail (e.g., \(\pm 12\) V to \(\pm 24\) V)
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Frequency Spectrum of PWM
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PWM spectrum includes:
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Input signal frequency (\(f_{in}\))
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Modulator frequency (\(f_m\))
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Harmonics above and below \(f_m\)
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Requirement:
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\(f_m\) must be much higher than max \(f_{in}\)
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Why?
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To easily filter out harmonics
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Pass only the original input signal through the low-pass filter
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Power Stage & Switching
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MOSFET Configuration:
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Complementary push-pull
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Operate in ON/OFF mode, not linear
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Switching logic:
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When \(Q_1\) is ON \(\rightarrow\) \(Q_2\) is OFF and vice versa
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ON: High current, low voltage drop \(\rightarrow\) Low power dissipation
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OFF: No current \(\rightarrow\) No power dissipation
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Power dissipation occurs only during switching transitions
Efficiency of Class D
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Ideal Power Dissipation:
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\(P_{DQ1} = 0 \, \text{W}\), \(P_{DQ2} = 0 \, \text{W}\)
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- Output Power
- Maximum Efficiency
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Practical Limitations:
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Small \(V_{DS(on)}\)
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Switching losses
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Losses in comparators & wave generator
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Signal Flow in Class D Amplifier
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Stages:
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Small analog audio input
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PWM modulator (Comparator + triangle wave)
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MOSFET switching stage (with gain)
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Low-pass filter \(\rightarrow\) Removes PWM carrier & harmonics
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Amplified analog output to speaker
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