Operational Amplifier Circuits

Apply the two rules. The non-inverting input is grounded, so \(v_+ = 0\), and the virtual short gives

The inverting node sits at zero volts without being connected to ground — a virtual ground. Nothing holds it there but the feedback.

KCL at the inverting node, remembering that no current enters the op-amp:

The source current. The source sees 10 kΩ to a node held at 0 V, so

and since none of it enters the op-amp, all 40 µA continues through the feedback resistor: \(v_o = 0 - (40\ \mu\text{A})(50\ \text{k}\Omega) = -2\ \text{V}\;\checkmark\)

The input resistance is therefore just

— a genuine drawback of this configuration. The source is loaded by \(R_1\), and raising \(R_1\) to reduce the loading also reduces the gain unless \(R_f\) rises with it.

Where the output current comes from. The op-amp supplies whatever the feedback resistor and any load demand. That current does not appear in the KCL above, which is why the equation was written at the inverting node and not at the output.

The exact model. The op-amp is a dependent source of exactly the kind Set 6 handles:

so \(v_- = -v_o/A\), which is not assumed zero.

KCL at the inverting node, still with no input current:

Substituting \(v_- = -v_o/A\) and collecting terms:

The extra term in the denominator is the entire departure from ideal. As \(A \to \infty\) it vanishes and the gain becomes \(-R_f/R_1\).

Evaluating for \(R_1 = 10\ \text{k}\Omega\), \(R_f = 50\ \text{k}\Omega\):

A typical general-purpose op-amp has \(A \approx 10^5\) at DC, so the ideal answer is wrong by six parts per hundred thousand — far below the tolerance of the resistors themselves.

How small is the input voltage difference? With \(v_o = -2\ \text{V}\) and \(A = 10^5\):

Twenty microvolts, against a 400 mV input — five parts in a hundred thousand. Calling that zero is an excellent approximation, and it is forced by the requirement that the output remain finite.

The logic worth internalising. The virtual short is not a property of the op-amp; it is a property of the op-amp with negative feedback and an unsaturated output. Remove the feedback, or drive the output to a rail, and \(v_+ - v_-\) is free to be large — which is exactly what Problems 13 and 15 exploit.

The virtual short now places the input voltage on the inverting node:

KCL at the inverting node. The two resistors form a divider from \(v_o\) to ground, tapped at \(v_-\), and no current is drawn from the tap:

An equivalent reading. The output drives a divider whose tap must equal \(v_{in}\):

The output does whatever it must to make the divider output match the input — which is a useful way to see every negative-feedback circuit.

Comparing the two configurations:

The gain of 1 is a hard floor. Since \(R_f/R_1 \ge 0\) for real resistors, a non-inverting stage can never attenuate. Attenuation requires either the inverting configuration or a divider before the input.

Direct connection. The sensor and load form a divider:

Nine-tenths of the signal is lost inside the sensor — and the error depends on the load, so it changes whenever anything else is connected.

The buffer is the non-inverting amplifier of Problem 3 with \(R_f = 0\) and \(R_1 = \infty\):

The output is simply connected back to the inverting input, so \(v_o = v_- = v_+ = v_{in}\).

With the buffer inserted. Its input draws no current, so the sensor is unloaded:

The full signal reaches the load — an elevenfold improvement from a device with a gain of one.

What the buffer actually provides is not gain but isolation:

The output current now comes from the op-amp's power supply rather than from the sensor. Energy is not created — it is simply drawn from a different place.

The general principle. Set 13, Problem 18 established that a voltage source should see \(R_L \gg R_{TH}\). A buffer makes that true by construction, whatever the real load is — and it makes each stage of a cascade independent of the next, which is what Problem 7 relies on.

KCL at the virtual ground, where every input resistor terminates:

Substituting:

Why the inputs do not interact. Every input resistor terminates on a node held at exactly 0 V, whatever the other inputs are doing. So the current each source delivers,

depends only on that source and its own resistor. The currents then simply add at the node — which is what makes the circuit a true summer rather than an averager.

Compare with resistors meeting at an ordinary node. There the common voltage would depend on all three sources, each source's current would depend on the others, and the result would be Millman's weighted average (Set 14) rather than a weighted sum. The virtual ground is what breaks the coupling.

Two standard specialisations:

The last is the weighted-resistor DAC, and it is the reason the R–2R ladder of Set 10, Problem 17 exists — matching resistors in a binary sequence is far harder than matching two values.

Superposition is the cleanest route (Set 11), since the op-amp is linear.

a\(v_1\) alone, with \(v_2\) grounded. Then \(v_+ = 0\) and the circuit is Problem 1's inverting amplifier:

b\(v_2\) alone, with \(v_1\) grounded. The divider sets \(v_+\), and the stage is non-inverting for that voltage:

Adding, and imposing the matching condition \(R_4/R_3 = R_2/R_1\):

The common part of the two inputs cancels exactly — but only because the ratios match.

Now break the matching. With \(R_4 = 50.5\ \text{k}\Omega\) the two gains no longer cancel:

Read what that means. Perfect matching gives infinite CMRR; a single resistor 1% out reduces it to 56 dB. A 10 V common-mode signal — mains hum on both leads, say — then appears at the output as

which would swamp a millivolt-level differential signal entirely.

The practical consequence. CMRR is set by resistor matching, not by the op-amp. Achieving 100 dB needs matching to about 0.001%, which is why precision difference amplifiers come as integrated parts with laser-trimmed on-chip resistors rather than being built from discrete components.

The gains multiply:

Why they multiply. An op-amp output is an ideal voltage source — zero output resistance, by Problem 11 almost exactly true. So the second stage's input resistance, whatever it is, does not load the first:

Each stage can be designed in isolation, and the results composed.

Contrast with two passive dividers. Cascade two \(10\ \text{k}\Omega\!/\!10\ \text{k}\Omega\) dividers, each apparently halving:

But the second divider's 20 kΩ loads the first. The first now sees \(10 \parallel 20 = 6.67\ \text{k}\Omega\) in its lower arm, giving \(6.67/16.67 = 0.4\), and the overall ratio is \(0.4 \times 0.5 = 0.2\), not 0.25 — a 20% error.

The general rule:

Design freedom this gives. A required gain of \(-12\) could be one stage with \(R_f/R_1 = 12\), but splitting it as here keeps both resistor ratios small — easier to match, and, by Problem 17, each stage retains more bandwidth than a single high-gain stage would.

All the input current flows through the feedback resistor, since none enters the op-amp:

The transfer function has units of ohms — hence transimpedance, here \(-100\ \text{k}\Omega\).

Why not just use a resistor to ground? That would also give 1 V from 10 µA, but with two serious penalties.

Penalty 1 — the diode's bias changes. With a plain resistor, the diode's terminal voltage swings by the full 1 V of output. A photodiode's junction capacitance depends on that voltage, so the response becomes signal-dependent and non-linear. With the op-amp, the inverting node stays at a virtual ground:

Penalty 2 — speed. The diode's capacitance \(C_d\) with a plain resistor gives a time constant \(R_fC_d\). With \(C_d = 50\ \text{pF}\) and \(R_f = 100\ \text{k}\Omega\):

The transimpedance amplifier holds the diode voltage constant, so its capacitance is never charged by the signal and the bandwidth is set by the op-amp instead.

Penalty 3 — output impedance. The plain resistor presents 100 kΩ to whatever follows and is loaded by it, as in Problem 4. The op-amp output is stiff.

Choosing \(R_f\) is the whole design: it sets the gain directly, so large \(R_f\) gives more volts per amp. The limits are the op-amp's input bias current (Problem 16), which flows through \(R_f\) and appears as an output offset, and the resistor's own thermal noise, which grows as \(\sqrt{R_f}\) while the signal grows as \(R_f\) — so a larger \(R_f\) actually improves the signal-to-noise ratio.

The first stage. Each op-amp's virtual short puts its input voltage on its own inverting node, so the voltage across \(R_g\) is exactly the differential input:

That same current flows through both \(R_1\) resistors, since no current enters either op-amp input. So the outputs of the two buffers differ by

The second stage is a unity-gain difference amplifier, so

What it fixes. Three things, each a defect of the simple difference amplifier:

The second point is the important one. A common-mode signal applied to both inputs appears at both buffer outputs unchanged — no current flows in \(R_g\), so there is no differential drive and the first stage has a common-mode gain of exactly 1. The differential gain is 51. The stage therefore improves the signal-to-common-mode ratio by 51 before the difference amplifier's imperfect matching ever acts on it.

The consequence for CMRR. With the 55.6 dB matching of Problem 6, the overall CMRR becomes

from exactly the same 1%-tolerance resistors. Raising the first-stage gain raises the CMRR proportionally.

The feedback fraction. The resistor divider returns a fraction of the output to the inverting input:

so the ideal gain is \(1/\beta = 10\).

The exact closed-loop gain. With \(v_o = A(v_{in} - \beta v_o)\):

The second form separates the ideal gain \(1/\beta\) from a correction factor that approaches 1 as the loop gain \(A\beta\) grows.

The fractional error:

The error is simply the reciprocal of the loop gain, and the closed-loop gain is always slightly low.

Loop gain is the quantity that matters, not open-loop gain. An op-amp with \(A = 10^5\) used at a closed-loop gain of 1000 has \(A\beta = 100\) and a 1% error — the same as a much poorer op-amp used at a gain of 10.

Feedback also desensitises the gain to changes in \(A\). Differentiating,

With \(A\beta = 10^4\), a 50% fall in open-loop gain — common with temperature and between production samples — changes the closed-loop gain by 0.005%. This is the real reason op-amps are usable at all: their open-loop gain is neither accurate nor stable, and feedback makes that irrelevant.

The loop gain, from Problem 10 with \(\beta = 0.1\):

Input resistance. The voltage across the op-amp's input terminals is only \(v_o/A\), so the current the source must supply is smaller than \(v_{in}/R_{id}\) by the loop-gain factor:

Series feedback raises input resistance. In practice the figure is meaningless — stray leakage and the op-amp's common-mode input resistance dominate long before 20 GΩ — but the conclusion that the source is essentially unloaded is sound.

Output resistance. If the load pulls the output down, the feedback detects it and the op-amp drives harder, opposing the change:

Which is why Problem 7's cascade works and Problem 4's buffer is effective.

The general rule depends on how the feedback is connected:

Voltage feedback always lowers output resistance. Whether input resistance rises depends on whether the feedback is applied in series with the input or in shunt with it — which is why the inverting amplifier's input resistance is stubbornly \(R_1\) (Problem 1).

The pattern across Problems 10 and 11. Every desirable property improves by the same factor:

The test. Reciprocity (Set 14, Problem 5) requires that interchanging an ideal source and an ideal meter leaves the reading unchanged. Take Problem 1's inverting amplifier:

Nothing like symmetry. The transfer impedance in one direction is thousands of times the other.

Why, in matrix terms. Set 14 traced reciprocity to \(\mathbf{R} = \mathbf{R}^{\mathsf T}\), which holds when every element is bilateral. The op-amp's VCVS contributes to the equation for the output node without any matching term in the input node's equation:

Why this is the point. A reciprocal network cannot amplify. If it could deliver more power at the output than it received at the input, running it backwards would deliver more still — and reciprocity guarantees the reverse path is as good as the forward one. Gain requires non-reciprocity:

The practical consequence is isolation. Because the reverse transmission is negligible, what happens after a stage cannot affect what happens before it — which is exactly the property Problem 7 used to multiply the gains of cascaded stages, and Problem 4 used to unload a sensor.

Where the energy comes from. The op-amp does not create power; it draws it from its supply rails and uses the input only to control that flow. This is the physical content of the dependent source. A circuit with no power supply and only bilateral elements is necessarily reciprocal and necessarily passive.

The linear range ends when the output reaches a saturation limit:

a\(v_{in} = 2\ \text{V}\): within range, so the linear result stands:

b\(v_{in} = 4\ \text{V}\): the linear formula predicts 20 V, which the supplies cannot deliver. The output simply sits at the rail:

What breaks when the op-amp saturates. The virtual short fails, because Problem 2's argument required the output to be free to move:

In saturation the output is stuck, the feedback no longer controls anything, and \(v_+ - v_-\) becomes whatever the input demands. Here \(v_- = 13.5/5 = 2.7\ \text{V}\) while \(v_+ = 4\ \text{V}\) — a difference of 1.3 V, not microvolts.

Why \(V_{sat} < V_{supply}\). The output stage's transistors need a volt or two of headroom to conduct. "Rail-to-rail" devices reduce this to millivolts but never to zero.

The procedural rule. Always compute the linear answer first, then check it against the rails. If it exceeds them, the true output is the rail and every ideal-op-amp conclusion about that circuit is void.

The procedure. Four steps, and every configuration in this set follows them:

Rule 1 — never write KCL at an op-amp output. The op-amp supplies an unknown current from its rails, so the node equation would introduce an unknown that appears nowhere else:

The equation is true but useless. Skipping it is not an approximation — it is the correct treatment of a node attached to an ideal source, exactly as Set 7 skipped nodes attached to voltage sources.

Rule 2 — the virtual short replaces one equation. Each op-amp adds one unknown (its output voltage) and one constraint (\(v_+ = v_-\)), so the count stays balanced. For \(n\) non-reference nodes and \(m\) op-amps:

An immediate consequence: the op-amp's output node never needs its own equation, so a circuit with several op-amps is usually no harder than one with none. Problem 9's three-op-amp instrumentation amplifier needed no simultaneous equations at all.

The relationship to earlier sets. This is Set 6's nodal analysis with Set 7's supernode idea applied to a different kind of source. Nothing is new — the op-amp output is simply a node whose voltage is set by something other than the resistors attached to it.

The virtual short does not apply. Feedback to the non-inverting input is positive: any small difference is amplified and drives the output further in the same direction, so the output is always at one rail or the other.

The threshold is the divider's output, which depends on which rail the output currently occupies:

The switching behaviour. The output flips when \(v_{in}\) crosses the current threshold:

Why hysteresis is wanted. A plain comparator with a single threshold chatters when a slowly-changing noisy signal crosses it — each noise excursion causes another transition. With hysteresis, once the output has switched, the threshold moves away from the signal by 2.6 V, so noise smaller than that cannot cause a second transition.

Positive and negative feedback compared:

The connection to negative resistance. Set 9, Problem 14 built a network with \(R_{TH} < 0\) and Set 13, Problem 13 showed the maximum-power theorem fails for it. Positive feedback is the same phenomenon: the circuit reinforces its own response, and the linear model predicts unbounded growth. What limits it here is saturation — the non-linearity the linear model does not contain.

Offset voltage is the input difference needed to make the output zero — a real op-amp's inputs are not perfectly matched. It sits in series with the input and is amplified by the full closed-loop gain:

Bias current is the small DC current each input actually draws — the golden rule \(i_\pm = 0\) is an approximation. Flowing through the feedback network, it produces

The bias-current term can be cancelled. Insert a resistor \(R_3\) in series with the non-inverting input equal to the resistance seen from the inverting input:

Then equal bias currents produce equal drops at both inputs and the effect cancels. What remains is only the difference between the two bias currents:

A fourfold improvement from one resistor.

Total worst-case output error:

Offset voltage now dominates entirely, which is typical for a modern op-amp — bias currents have fallen much faster than offset voltages.

Whether 21.8 mV matters depends on the signal:

The third row is the usual escape: a series capacitor removes the DC error entirely, at the cost of losing DC response.

The remaining remedies are a chopper-stabilised or auto-zero op-amp (offsets of microvolts), or trimming — though trimming corrects only at one temperature, and drift with temperature is often the real limit.

The open-loop gain rolls off above a very low corner frequency — typically a few hertz — as a single pole:

So above the corner, \(|A|f\) is constant and equal to the unity-gain frequency \(f_T = A_0f_c = 1\ \text{MHz}\).

Closed-loop bandwidth. Problem 10 showed the closed-loop gain stays accurate while the loop gain \(A\beta \gg 1\). The response falls off where \(|A|\) drops to the closed-loop gain, so

Why it is constant. Loop gain is the resource (Problem 10), and it is being spent twice over. Raising the closed-loop gain lowers \(\beta\), which lowers \(A\beta\) at every frequency — so the frequency at which the loop gain runs out falls in exact proportion.

The design implication: split the gain. A gain of 100 in one stage gives 10 kHz. Two cascaded stages of gain 10 each give 100 kHz per stage — and although the cascade's overall bandwidth is somewhat less than 100 kHz because two roll-offs combine, it remains far better than 10 kHz.

This is the quantitative reason for Problem 7's cascade, beyond the convenience of smaller resistor ratios.

Why the single pole is deliberate. The internal compensation capacitor that produces this roll-off is put there on purpose: it guarantees the phase shift stays below 180° while the loop gain exceeds 1, so the amplifier is stable at any closed-loop gain. Bandwidth is traded for unconditional stability — Set 28's Bode plots make the argument precise.

Slew rate is the maximum rate at which the output can change, set by how fast the internal compensation capacitor can be charged by a limited current:

For a sine wave \(v_o = V_p\sin\omega t\), the fastest rate occurs at the zero crossings:

This is the full-power bandwidth — and note it is over a hundred times lower than the small-signal bandwidth of Problem 17 at unity gain.

At 20 kHz the amplitude must be reduced:

For a 10 V step, the output cannot jump — it ramps at the slew rate:

During that ramp the op-amp is not behaving linearly at all, and the virtual short does not hold.

The two limits compared:

A slew-limited sine wave is distorted, not merely attenuated — the output tries to follow at the maximum rate and produces straight segments, generating harmonics that were never in the input.

Which limit binds is decided by amplitude. Small signals are bandwidth-limited; large ones are slew-limited. A design must check both, and for power-amplifier stages the slew limit is almost always the binding one.

The integrator. The input resistor delivers \(v_{in}/R\) to the virtual ground, and all of it flows into the capacitor. Using Set 17's element law:

For a 1 V input lasting 5 ms, starting from an uncharged capacitor:

A constant input gives a linear ramp — the op-amp version of Set 17, Problem 3, but now with the capacitor voltage appearing directly at a low-impedance output.

Why this beats a plain \(RC\) circuit. A passive \(RC\) only approximates an integral, and only while its output stays small compared with the input. Here the virtual ground holds the resistor's right-hand end at exactly 0 V, so the input current is \(v_{in}/R\) exactly, whatever the output does. The integration is ideal over the full output range.

The integrator's practical problem is DC. At zero frequency the capacitor is an open circuit, so the DC gain is infinite — and the offset voltage of Problem 16 is integrated without limit until the output saturates. The cure is a large resistor across the capacitor, which caps the DC gain at \(-R_f/R\) while leaving the integration intact above \(1/2\pi R_fC\).

The differentiator exchanges the components — capacitor at the input, resistor in feedback:

With the same \(RC = 10\ \text{ms}\), an input ramping at 100 V/s gives \(v_o = -1\ \text{V}\).

Why it is troublesome. Its gain rises with frequency — at 20 dB per decade, indefinitely. Three consequences follow:

The standard fix is a small resistor in series with the input capacitor, which limits the high-frequency gain to \(R_f/R_s\) and restores stability.

What is not new. The analysis. An op-amp is a VCVS, and Sets 4, 6 and 11 have handled dependent sources throughout. Problem 14's procedure is Set 6's nodal analysis with one rule added and one node skipped.

What is genuinely new is that a single component now delivers gain, and with it three things no passive network can do:

Where each idealisation breaks:

Only the last is genuinely eliminated by feedback. The others set real limits, and a design is usually bounded by one of them.

The unifying idea is loop gain. Gain accuracy, input and output resistance and linearity all improve by \(1+A\beta\), and bandwidth is where that factor runs out. Loop gain is finite, so every benefit is finite and they compete with each other.

And one boundary worth naming. The op-amp is the first device in this book that requires a power supply to function. Everything before Set 15 was passive or a source; the dependent source is a model of energy being controlled, not created, and Problem 12 showed that this is exactly what non-reciprocity means.